DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3,5,8-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 2020/0314360 to Sakai et al. (“Sakai”).
Regarding claim 1, Iwata teaches a photoelectric conversion apparatus comprising a pixel array provided with a plurality of pixels, a plurality of A/D conversion circuits configured to convert pixel signals output from the pixel array into digital signals, and a plurality of reference signal lines to which reference signals with different gradients of changes are supplied (Figure 1 shows the pixel array, reference number 1, with a plurality of pixels 10 and a plurality of A/D conversion circuits, reference number 3; see paragraph [0030] teaching that the column circuit 3 converts the pixel signal as an analog signal to a digital signal. Paragraph [0031] further teaches that the reference signal circuit 4 generates multiple reference signals),
wherein each of the plurality of A/D conversion circuits includes a comparison circuit configured to compare the pixel signal with the reference signal (reference number 36 comparator), a selector configured to select a reference signal line, of the plurality of reference signal lines, to which a reference signal used for A/D conversion is supplied (reference number 35 is the reference signal select unit), and a connector configured to connect a reference signal line, of the plurality of reference signal lines, which is selected by the selector to the comparison circuit via a buffer and connect a reference signal line, of the plurality of reference signal lines, which is not selected by the selector to a load capacitance element via another buffer different from the buffer (see paragraph [0044, [0101]-[0103], and Figures 8A-8B)] .
Regarding claim 2, Sakai teaches the apparatus according to claim 1, wherein the buffer and the other buffer include source follower circuits (see paragraph [0041] regarding the source follower circuit, reference number 31H, which is a buffer circuit of the reference signal and includes a current source).
Regarding claim 3, Sakai teaches the apparatus according to claim 1, wherein the capacitance value of the load capacitance element is variable (paragraph [0103] further teaches how the capacitance is changed by the gate voltage to increase).
Regarding claim 5, Sakai teaches the apparatus according to claim 1, wherein the selector determines a signal level of the pixel signal and selects a reference signal line, of the plurality of reference signal lines, to which a reference signal used for A/D conversion is supplied (see paragraph [0043] discussing the reference signal select unit to select the reference signals based on the control signal to supply to the A/D column circuitry).
Regarding claim 8, Sakai teaches the apparatus according to claim 1, wherein the load capacitance element is a grounded capacitance element (see paragraph [0103]).
Regarding claim 9, Sakai teaches an equipment comprising: the photoelectric conversion apparatus according to claim 1; and a processor configured to process a signal output from the photoelectric conversion apparatus (see paragraph [0033] regarding the processing circuit 7).
Allowable Subject Matter
Claims 4, 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY R HSU whose telephone number is (571)270-3012. The examiner can normally be reached 9am-5pm.
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AMY R. HSU
Examiner
Art Unit 2664
/AMY R HSU/Primary Examiner, Art Unit 2638
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