Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 8 is objected to because of the following informalities: claim 8 discloses “deg” instead of “degrees”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Zhu et al. (CN 116846381 and Zhu hereinafter.) in view of Kuo et al. (US 9966670 B1 and Kuo hereinafter.).
Regarding claim 1, Zhu discloses a phase shift attenuation circuit [fig. 12], comprising: a plurality of first differential circuits [differential circuits SPDT and DPDT modules coupled to one another…] electrically connected in sequence […in series]; an electrical connection between two adjacent first differential circuits of the plurality of first differential circuits including at least one of a straight-through connection [two lower “straight-through” connections connecting adjacent SPDT/DPDT modules together] or a connection through an attenuator unit [pg. 13-14 regarding 6-bit numerical control attenuator].
Zhu does not explicitly disclose wherein the phase shift attenuation circuit realizes 8-bit step attenuation through the attenuator unit; 7-bit step attenuation among the 8-bit step attenuation is configured to realize a phase shift function, and the 8-bit step attenuation is configured to realize phase shift and attenuation functions.
However, Zhu already discloses using 6-bit numerical control of phase shifting and attenuation via attenuation units and differential circuits [pg. 13-14 regarding embodiment 4 and 5]. Kuo discloses the use of 10-bit data to set the phase shift and attenuation [col 23 lines 63 – 67] within phase shifters and attenuators for use in radio frequency transmitting and receiving devices [fig. 22].
Therefore, it would have been obvious to modify the phase shift circuit as described by Zhu to increase bit count from 6-bit to 10-bit and utilize 8-bits of the 10-bits for step attenuation through the attenuator unit; 7-bits of the 10-bits for step attenuation among the 8-bit step attenuation being configured to realize a phase shift function, and the 8-bits of the 10-bits is configured to realize phase shift and attenuation functions as taught by Kuo to improve resolution and functionality of a phase shifting and attenuation system.
Regarding claim 2, Zhu in view of Kuo discloses further wherein each of the plurality of first differential circuits includes: one or more first differential input ports [Zhu, fig. 1 showing differential circuit with differential input 1], one or more first differential output ports [Zhu, fig. 1 showing differential circuit with differential output 2], and a plurality of switching tube chips [Zhu, fig. 2 showing plurality of switching elements]; wherein one of the plurality of switching tube chips is connected between a positive and negative interface of each of the one or more first differential input ports and a positive and negative interface of each of the one or more first differential output ports [Zhu, fig. 2 showing plurality of switches coupled between differential inputs and outputs]; connection or disconnection between the one or more first differential input ports and the one or more first differential output ports is achieved by the plurality of switching tube chips to determine the electrical connection between the two adjacent first differential circuits [pg. 9].
Regarding claim 3, Zhu discloses further wherein the plurality of first differential circuits are different [Zhu, differing versions of differential circuits shown in fig. 12].
Regarding claim 5, Zhu in view of Kuo discloses further a phase shift attenuation network [network of switches], comprising the phase shift attenuation circuit of claim 1 [as shown in fig. 12].
Regarding claim 10, Zhu in view of Kuo discloses further a radio frequency (RF) microwave system [Abstract of Zhu], comprising the phase shift attenuation circuit of claim 1 [Zhu, pg. 6 regarding “fourth aspect, the present invention”].
Regarding claim 11, Zhu in view of Kuo discloses further a radio frequency (RF) microwave system [Abstract of Zhu], comprising the phase shift attenuation network of claim 5 [pg. 6 regarding “fourth aspect, the present invention”].
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Zhu in view of Kuo further in view of Pang et al. (CN 114665908 A and Pang hereinafter.).
Regarding claim 4, Zhu in view of Kuo discloses all the features regarding claim 1 as indicated above. Zhu in view of Kuo does not explicitly disclose wherein an attenuation range of the 7-bit step attenuation is in a range of 0-31.75 dB for realizing phase shifting in a range of 0 deg-90 deg; an attenuation range of the 8-bit step attenuation is in a range of 0-63.75 dB for realizing phase shifting in a range of 0 deg-90 deg and amplitude attenuation.
However, Zhu in view of Kuo discloses 10-bit control of serially connected phase shifting and attenuation circuits. Combining this with the teachings of Pang, wherein Pang discloses the use of controlling bits to achieve 31.5dB of attenuation (serially connected attenuation of 0.5db, 1db, 2db, 4db etc.) with a total phase shift of 0 to 354.375 degrees. This increase in bit count would allow for a subsequent phase shifting to allow an approximate attenuation of 64dB.
Therefore, it would be obvious to one skilled in the art before the effective filing date to modify Zhu in view of Kuo to include the ascending attenuation and phase shifting capabilities as taught by Pang to increase attenuation of a phase shifting capabilities within a phase shifting and attenuation circuit.
Claims 6-7 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Zhu in view of Kuo further in view of Tahara et al. (WO 2023203857 A1 and Tahara hereinafter.).
Regarding claim 6, Zhu in view of Kuo discloses all the features of claim 5 as indicated above. Zhu in view of Kuo does not explicitly disclose further comprising: a first node circuit; a second node circuit; and a first signal channel and a second signal channel which are coupled between the first node circuit and the second node circuit; wherein the first node circuit and the second node circuit include the phase shift attenuation circuit, respectively.
However, Tahara discloses further comprising: a first node circuit [fig. 1, transformer 41]; a second node circuit [transformer 42]; and a first signal channel [phase shifter 31] and a second signal channel [phase shifter 32] which are coupled between the first node circuit and the second node circuit [as shown in fig. 1]; wherein the first node circuit and the second node circuit include the phase shift attenuation circuit, respectively [31 and 32 being phase shifters].
Therefore it would have been obvious to one skilled in the art before the effective filing date to include a first and second phase shift attenuation circuit as taught by Zhu within the communication device of Tahara, shown in fig. 1, with the first phase shift attenuation circuit of Zhu corresponding to phase shifter 31 of Tahara and the second phase shift attenuation circuit of Zhu corresponding to phase shifter 32 of Tahara to improve input and output impedance performance of a radio frequency processing circuit.
Regarding claim 7, Zhu in view of Kuo further in view of Tahara does not explicitly disclose wherein the first node circuit and the second node circuit respectively include a quadrant conversion circuit electrically connected with the phase shift attenuation circuit; wherein the quadrant conversion circuit is constructed based on a second differential circuit; the second differential circuit realizes quadrant conversion of a phase through connection or disconnection between a positive and negative interface of a second differential input port and a positive and negative interface of a second differential output port, and realizes phase shifting in a preset range based on the phase shift attenuation circuit.
However, fig. 7 of applicants specs show details of the quadrant conversion circuit and are structurally same as fig. 12 of Zhu showing details of the SPST. Both are used in phase shifting of signals and it is well known in the art that quadrant conversion is used in radio frequency engineering for phase shifting purposes.
Therefore, the SPST as disclosed by Zhu is a quadrant conversion circuit and with the first and second node circuits as taught by Tahara, Zhu in view of Kuo further in view of Tahara discloses the first node circuit and the second node circuit respectively include a quadrant conversion circuit [Zhu, fig. 7] electrically connected with the phase shift attenuation circuit [fig. 12 of Zhu]; wherein the quadrant conversion circuit is constructed based on a second differential circuit [fig. 7 of Zhu showing a SPDT]; the second differential circuit realizes quadrant conversion of a phase through connection or disconnection between a positive and negative interface of a second differential input port and a positive and negative interface of a second differential output port [switches T1-T4 coupling and decoupling I1+/I1- with O1+/O1-], and realizes phase shifting in a preset range based on the phase shift attenuation circuit [pg. 13-14 regarding 4th and 5th embodiment along with pg. 2 of Zhu and pg. 2 of Kuo]. Since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
Regarding claim 8, Zhu in view of Kuo further in view of Tahara does not explicitly disclose wherein a phase shift range of the first node circuit or the second node circuit is in a range of 0 deg-360 deg.
However, Zhu discloses a full 360 degree phase shift [fig. 13b showing a full -180 degree and +180 degree phase shift].
Therefore, it would have been obvious to one skilled in the art before the effective filing date to provide the full 360 degree phase shift with the full -180 degree and +180 degree phase shift as taught by Zhu to improve functionality and phase shifting performance of a phase shifting circuit.
Regarding claim 9, Zhu in view of Kuo further in view of Tahara wherein the second node circuit includes a third differential circuit [a third SPDT shown in fig. 12 of Zhu with details shown in fig. 8, coupled to transformer 42 of Tahara],
the third differential circuit includes: an input differential network including a first port [Zhu, fig. 8, port Idiff+] and a second port [Zhu, fig. 8, port Idiff-]; an input differential unit including an input differential coupling line [Zhu, fig. 8, port Ze3]; an output differential unit including a first coupling line [Zhu, fig. 8, port Ze4] and a second coupling line [Zhu, fig. 8, port Ze5]; and an output differential network including a first output differential port [Zhu, fig. 8, port Odiff2+ and Odiff2-] and a second output differential port [Zhu, fig. 8, port Odiff3+ and Odiff3-]; wherein a positive input terminal of the input differential coupling line is connected with the first port [Idiff+ coupled to I2+ through Ze3 as shown in fig. 8 of Zhu], and a negative input terminal of the input differential coupling line is connected with the second port [Idiff- coupled to I2- through Ze3 as shown in fig. 8 of Zhu]; a positive input terminal of the first coupling line is connected with a positive output terminal of the input differential coupling line [O2+ coupled to Odiff+ through Ze4 as shown in fig. 8 of Zhu], and a negative input terminal of the second coupling line is connected with a negative output terminal of the input differential coupling line [O3- coupled to I2- through T11]; a negative input terminal of the first coupling line is connected with a positive input terminal of the second coupling line [Zhu, fig. 8, port Idiff1- coupled to O3+ through T10 and Ze3]; a positive interface of the first output differential port is connected with a positive output terminal of the first coupling line [Zhu, fig. 8, port Odiff2+ coupled to Ze4], and a negative interface of the first output differential port is connected with a negative output terminal of the second coupling line [Zhu, fig. 8, port Odiff2- coupled to Odiff3- through T7]; a positive interface of the second output differential port is connected with a positive output terminal of the second coupling line [Zhu, fig. 8, port Odiff3+ coupled to Ze5], and a negative interface of the second output differential port is connected with a negative output terminal of the first coupling line [Zhu, fig. 8, port Odiff2- coupled to Odiff3- through T7]; the first output differential port and the second output differential port of the output differential network are configured to receive a first phase shift signal and a second phase shift signal [Zhu, SPDT circuit of fig 8, pg. 13-14 regarding SPDT receiving phase shift signals], respectively, and the input differential network is configured to output a synthesized signal [vector summation via quadrant conversion/switching resulting in a synthesized signal].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's
disclosure, Ning et al. (US 20220131726 A1) is cited to teach a wideband vector modulator phase shifter.
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/JAMES G YEAMAN/Examiner, Art Unit 2836
/TAELOR KIM/Supervisory Patent Examiner, Art Unit 2836
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