Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: the Zener diode connecting the gate driver unit and the drain of the power device. The figures show the diode connected to the drain and ground, not the drain and the gate. To connect the diode between the drain and the gate would be confusing to one ordinarily skilled in the art as to how that connection would accomplish the diode’s goal of being a sensor.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-5, 7-8, and 10-12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2017/0093283 (Leoncini).
For claim 1, Leoncini figure 3a teaches a semiconductor device connected to a power device, comprising a gate driver unit including a first circuit and a second circuit (108a and 108b);
a resistor unit (302 and 304) connecting the gate of the power device and the gate driver unit; and
a first control circuit (392) connected to the gate driver unit, wherein the first control circuit is configured to increase the resistance of the power device by issuing an instruction to reduce the slew rate of the power device to the first circuit during the turn-off of the power device (see, e.g., para [0029], “FIG. 3a illustrates one embodiment of a driver with adaptive dead time control 392, slew resistors 302, 304, 306, 308, and upper and lower MOSFETs 108A, 108B. The slew resistors 302, 304, 306, and 308 permit independently adjusting the slew rate of rising and falling edges of UGate control signal 132 and LGate control signal 134. By increasing the resistance of a resistor in series with the input of the power transistor, the slew rate of the gate voltage is decreased but ringing of the gate voltage, and the resulting electromagnetic interference, are reduced.”).
For claim 2, Leoncini further teaches a detection circuit having a monitor unit and a comparator, wherein the monitor unit is configured to observe the voltage of the gate of the power device, the comparator is configured to compare the observed voltage with a predetermined threshold, and the first control circuit is configured to increase the resistance of the power device when the voltage is below the predetermined threshold (see, e.g., para [0033], “in one embodiment, when one of the MOSFETs, e.g. the upper MOSFET 108A, is turned off, and its gate is discharging through the second slew resistor 304, the gate voltage can be monitored and sensed by the first comparator 335a through the first slew resistor 302. The first comparator 335a may also be referred to as a first threshold sense circuit. Only when the gate voltage drops below a first threshold level 335b (e.g. a reference voltage) at which the MOSFET is turned off, e.g. a threshold voltage of the corresponding MOSFET, will the other MOSFET, e.g. the lower MOSFET 108B, be turned on. Thus shoot through current is avoided.”).
For claim 4, Leoncini further teaches a detection circuit having a monitor unit and a comparator, wherein the monitor unit is configured to observe the voltage between the source and drain of the power device, the comparator is configured to compare the observed voltage with a predetermined threshold, and the first control circuit is configured to increase the resistance of the power device when the voltage is above the predetermined threshold (see, e.g., para [0033], “in one embodiment, when one of the MOSFETs, e.g. the upper MOSFET 108A, is turned off, and its gate is discharging through the second slew resistor 304, the gate voltage can be monitored and sensed by the first comparator 335a through the first slew resistor 302. The first comparator 335a may also be referred to as a first threshold sense circuit. Only when the gate voltage drops below a first threshold level 335b (e.g. a reference voltage) at which the MOSFET is turned off, e.g. a threshold voltage of the corresponding MOSFET, will the other MOSFET, e.g. the lower MOSFET 108B, be turned on. Thus shoot through current is avoided.”).
For claim 5, Leoncini further teaches a detection circuit having a monitor unit and a comparator, wherein the monitor unit is configured to observe the load current of the power device, the comparator is configured to compare the observed load current with a predetermined threshold, and the first control circuit is configured to increase the resistance of the power device when the load current is below the predetermined threshold (see, e.g., figure 1, para [0018], “In one embodiment, a current sensor 142 is coupled to a terminal of the inductor 163 of the output filter 110. The current sensor 142 generates an inductor current sense signal 152, I.sub.SENSE, representative of the inductor current 162, I.sub.L. The current sensor 142 and corresponding inductor current sense signal 152 are coupled to the PWM controller and adaptive driver 106.”).
For claim 7, Leoncini further teaches a register circuit (figure 5, 594) connected to the first control circuit, wherein the register circuit is configured to issue an instruction to the first control circuit to increase the resistance of the power device after a predetermined time has elapsed from the start of the turn-off of the power device (see, e.g., para [0066], “The programmable dead time circuitry 594 is well known to those skilled in the art, and facilitates a user settable dead time. Should the user settable dead time be too short and risk shoot through, the adaptive dead time circuitry illustrated above will increase the dead time to prevent such shoot through. The programmable dead time can be configured by choosing a suitable resistance for the external resistor 596 configured to be coupled to the programmable dead time circuitry 594”).
For claim 8, Leoncini further teaches a detection circuit having a monitor unit (392) and a comparator (335a);
a second control circuit connected to the second circuit (the part of 392 that’s connected to 108B); and
a register circuit connected to the detection circuit, the first control circuit, and the second control circuit, wherein the monitor unit is configured to observe the voltage of the gate of the power device, the comparator is configured to compare the observed voltage with a predetermined threshold, and the register circuit is configured to issue an instruction to the second control circuit to turn on the power device after a predetermined time has elapsed from detecting that the voltage is below the predetermined threshold, and subsequently issue an instruction to the first control circuit to increase the resistance of the power device (see, e.g., para [0033]).
For claim 10, Leoncini further teaches a detection circuit having a monitor unit (392) and a comparator (335a);
a second control circuit connected to the second circuit (the part of 392 that’s connected to 108B); and
a register circuit connected to the detection circuit, the first control circuit, and the second control circuit, wherein the monitor unit is configured to observe the voltage between the source and drain of the power device, the comparator is configured to compare the observed voltage with a predetermined threshold, and the register circuit is configured to issue an instruction to the second control circuit to turn on the power device after a predetermined time has elapsed from detecting that the voltage is above the predetermined threshold, and subsequently issue an instruction to the first control circuit to increase the resistance of the power device (see, e.g., para [0033]).
For claim 11, Leoncini further teaches a detection circuit having a monitor unit (392) and a comparator (335a);
a second control circuit connected to the second circuit (the part of 392 that’s connected to 108B); and
a register circuit connected to the detection circuit, the first control circuit, and the second control circuit, wherein the monitor unit is configured to observe the load current of the power device, the comparator is configured to compare the observed load current with a predetermined threshold, and the register circuit is configured to issue an instruction to the second control circuit to turn on the power device after a predetermined time has elapsed from detecting that the load current is below the predetermined threshold, and subsequently issue an instruction to the first control circuit to increase the resistance of the power device (see, e.g., para [0033]).
For claim 12, Leoncini further teaches a second control circuit (the part of 392 that’s connected to 108B) connected to the second circuit and a register circuit connected to the first control circuit and the second control circuit, wherein the register circuit is configured to issue an instruction to the second control circuit to turn on the power device after a predetermined time has elapsed from detecting the start of the turn-off of the power device, and subsequently issue an instruction to the first control circuit to increase the resistance of the power device (see, e.g., para [0033]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Leoncini as applied to claim 2 and 8 above, respectively, and further in view of US 2024/0128852 (D’Souza).
For claim 3, Leoncini does not explicitly teach the values of its gate voltages.
Nevertheless, D’Souza figure 4 teaches a control circuit is configured to increase the resistance of the power device after the voltage becomes lower than the Miller plateau voltage (see, e.g., para [0053], “At t415, the value of Vgs approaches close to (but not below) Vth and the HS switch begins to turn OFF. At some point in the duration t415-t425 (closer to time t425 than to time t415), Vgs crosses (goes below by a few tens of milli-volts but not substantially below) Vth, HS switch turns OFF and correspondingly, Rds(ON) reaches maximum value (increases steeply). It may be appreciated that the specific point in time when Rds(ON) begins to rise steeply would depend on the power-switch characteristics. Due to the sudden/drastic variation in the value of Rds(ON) around the threshold voltage Vth (of the HS switch) in the region 420 (and hence corresponding large dI/dt variation of the currents in the parasitic inductances noted above), it is particularly important to reduce the slew-rate of the gate-control Vgs in region 420 (as is shown in FIG. 4) in order to avoid or at least minimize ringing effects noted above. Starting from t425, since the HS switch has turned OFF completely, Vgs can be pulled down quickly to zero. Region 420 is termed the ‘Miller plateau’, as is well known in the relevant arts”).
Given D’Souza, it would have been obvious to one ordinarily skilled in the art to bring the gate voltage down below the miller plateau for the benefit of minimizing ringing effects.
For claim 9, Leoncini does not explicitly teach the values of its gate voltages.
Nevertheless, D’Souza figure 4 teaches a control circuit is configured to increase the resistance of the power device after the voltage becomes lower than the Miller plateau voltage (see, e.g., para [0053], “At t415, the value of Vgs approaches close to (but not below) Vth and the HS switch begins to turn OFF. At some point in the duration t415-t425 (closer to time t425 than to time t415), Vgs crosses (goes below by a few tens of milli-volts but not substantially below) Vth, HS switch turns OFF and correspondingly, Rds(ON) reaches maximum value (increases steeply). It may be appreciated that the specific point in time when Rds(ON) begins to rise steeply would depend on the power-switch characteristics. Due to the sudden/drastic variation in the value of Rds(ON) around the threshold voltage Vth (of the HS switch) in the region 420 (and hence corresponding large dI/dt variation of the currents in the parasitic inductances noted above), it is particularly important to reduce the slew-rate of the gate-control Vgs in region 420 (as is shown in FIG. 4) in order to avoid or at least minimize ringing effects noted above. Starting from t425, since the HS switch has turned OFF completely, Vgs can be pulled down quickly to zero. Region 420 is termed the ‘Miller plateau’, as is well known in the relevant arts”).
Given D’Souza, it would have been obvious to one ordinarily skilled in the art to bring the gate voltage down below the miller plateau for the benefit of minimizing ringing effects.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Leoncini as applied to claim 1 above, and further in view of US 2015/0194811 (Mao).
For claim 6, Leoncini does not explicitly teach how to implement its current sensor.
Nevertheless, Mao figure 15 teaches a detection circuit having a monitor unit and a comparator (1504), and a clamp circuit connecting the drain and gate of the power device (S1), wherein the clamp circuit includes a Zener diode (Ddn) connecting the gate driver unit and the drain of the power device, the comparator is configured to detect ringing by observing the current flowing through the Zener diode, and the first control circuit is configured to increase the resistance of the power device when ringing is detected (see, e.g., para [0093], “Zener diode Ddn starts to conduct, and through a resistor Rdn2, a signal is coupled to the Shutdown Control block. The Shutdown Control block processes the signal and generates a signal to turn off Sdn. After Sdn is turned off or at least operates at a linear mode temporarily, through another resistor Rdn1, the gate voltage of S1 can be charged up so that S1 starts to conduct some current again. As a result, energy in the inductance coupled to S1 can be dissipated in S1”).
Given Mao, it would have been obvious to one ordinarily skilled in the art to use a Zener diode and comparator to monitor for ringing for the benefit of minimizing parts and reducing cost.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D HOUSTON whose telephone number is (571)270-3901. The examiner can normally be reached M-F 10-7 CST.
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/ADAM D HOUSTON/ Primary Examiner, Art Unit 2836
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