DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
Claim 12 objected to because of the following informalities: “six” should be changed to “sixth. Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
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Claim 1 – 2, 7 – 9 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3, 8 and 11 of U.S. Patent No. 12,324,265. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1 – 2, 7 – 9 and 15 of the instant application are broader and fully encompassed by claims 1, 3, 8 and 11 of ‘265.
Instant Claim
Patent ‘265 Claim
Differences
1. A photoelectric conversion apparatus comprising: a semiconductor layer having a first surface and a second surface, the second surface being a surface opposite to the first surface; and a plurality of avalanche photodiodes arranged on the semiconductor layer and including a first avalanche photodiode, and a second avalanche photodiode, and a third avalanche photodiode; wherein each of the plurality of avalanche photodiodes includes an avalanche multiplication unit formed by a first semiconductor region of a first conductivity type in which a carrier of a same conductivity type as a signal charge is regarded as a majority carrier and which is arranged at a first depth with respect to the first surface, and a second semiconductor region of a second conductivity type different from the first conductivity type and which is arranged at a second depth deeper than the first depth with respect to the first surface, wherein, in a plan view, the first avalanche photodiode and the second avalanche photodiode are arranged adjacently in a first direction, and the second avalanche photodiode and the third avalanche photodiode are arranged adjacently in a second direction orthogonal to the first direction. wherein a third semiconductor region of the second conductivity type is arranged between the first avalanche photodiode and the second avalanche photodiode, wherein a fourth semiconductor region is arranged between the first avalanche photodiode and the second avalanche photodiode at a position shallower than the third semiconductor region, wherein a fifth semiconductor region of the second conductivity type is arranged at the first depth, between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode, and wherein the fourth semiconductor region is either a semiconductor region of the second conductivity type, in which an impurity concentration of the second conductivity type is lower than an impurity concentration of the second conductivity type of the third semiconductor region, or a semiconductor region of the first conductivity type.
1. A photoelectric conversion apparatus comprising: a semiconductor layer having a first surface and a second surface, the second surface being a surface opposite to the first surface; and a plurality of avalanche photodiodes arranged on the semiconductor layer and including a first avalanche photodiode, a second avalanche photodiode and a third avalanche photodiode, wherein each of the plurality of avalanche photodiodes includes an avalanche multiplication unit formed by a first semiconductor region of a first conductivity type in which a carrier of a same conductivity type as a signal charge is regarded as a majority carrier and which is arranged at a first depth, and a second semiconductor region of a second conductivity type different from the first conductivity type and which is arranged at a second depth deeper than the first depth with respect to the first surface, wherein a third semiconductor region of the second conductivity type is arranged between the first avalanche photodiode and the second avalanche photodiode, wherein a fourth semiconductor region is arranged between the first avalanche photodiode and the second avalanche photodiode at a position shallower than the third semiconductor region with respect to the first surface, wherein the fourth semiconductor region is a second conductivity type semiconductor region in which an impurity concentration of the second conductive type is lower than an impurity concentration of the second conductive type in the third semiconductor region, or a first conductivity type semiconductor region, wherein the second semiconductor region is arranged in contact with the third semiconductor region, wherein the first avalanche photodiode and the second avalanche photodiode are arranged adjacently in a first direction, wherein the second avalanche photodiode and the third avalanche photodiode are arranged adjacently in a second direction orthogonal to the first direction, wherein a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode is longer than a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the second avalanche photodiode, wherein an isolation region including a trench structure is arranged between the first avalanche photodiode and the second avalanche photodiode, wherein the third semiconductor region and the fourth semiconductor region are arranged in a side wall portion of the trench structure, wherein the first semiconductor region includes a top surface and a bottom surface, wherein the top surface of the first semiconductor region is arranged on the first surface of the semiconductor layer and the bottom surface is a surface opposite to the top surface of the first semiconductor region, wherein the third semiconductor region includes a top surface and a bottom surface, wherein the bottom surface of the third semiconductor region is arranged on the second surface of the semiconductor layer and the top surface is a surface opposite to the bottom surface of the third semiconductor region, and wherein the top surface of the third semiconductor region is deeper than the bottom surface of the first semiconductor region with respect to the first surface.
+
3. The photoelectric conversion apparatus according to claim 1, wherein the fourth semiconductor region is a semiconductor region of the first conductivity type
+
8. The photoelectric conversion apparatus according to claim 3, wherein a semiconductor region of the second conductivity type is arranged between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode, and an impurity concentration of the semiconductor region of the second conductivity type is higher than the impurity concentration of the second conductive type in the third semiconductor region.
Instant claim is broader than ‘265 combined claims.
2. The photoelectric conversion apparatus according to claim 1, wherein the second semiconductor region is in contact with the third semiconductor region, and wherein, with respect to the first surface, a surface of the third semiconductor region which is close to the first surface is arranged at a depth deeper than a surface of the first semiconductor region which is close to the second surface.
See claim 1 above
… wherein the second semiconductor region is arranged in contact with the third semiconductor region…wherein the top surface of the third semiconductor region is deeper than the bottom surface of the first semiconductor region with respect to the first surface.
Broader
7. The photoelectric conversion apparatus according to claim 1, wherein a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode is longer than a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the second avalanche photodiode.
See claim 1 above
… wherein a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode is longer than a distance between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the second avalanche photodiode
same
8. The photoelectric conversion apparatus according to claim 1, wherein an impurity concentration of the second conductivity type of the fifth semiconductor region is higher than the impurity concentration of the second conductivity type of the third semiconductor region.
See claim 8 above…
wherein a semiconductor region of the second conductivity type is arranged between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode, and an impurity concentration of the semiconductor region of the second conductivity type is higher than the impurity concentration of the second conductive type in the third semiconductor region.
same
9. The photoelectric conversion apparatus according to claim 1, wherein a contact plug configured to supply a potential to the first avalanche photodiode is arranged between the first avalanche photodiode and the third avalanche photodiode in a third direction in which the first avalanche photodiode and the third avalanche photodiode are arranged.
See rejection of claim 1 and…
11. The photoelectric conversion apparatus according to claim 8, wherein a contact plug configured to supply a potential to the first avalanche photodiode is arranged between the first avalanche photodiode and the third avalanche photodiode in a third direction in which the first avalanche photodiode and the third avalanche photodiode are arranged.
same
15. further comprising an isolation region including a trench structure arranged between the first avalanche photodiode and the second avalanche photodiode, wherein the third semiconductor region and the fourth semiconductor region are arranged in a side wall portion of the isolation region
See rejection of claim 1 above
… wherein an isolation region including a trench structure is arranged between the first avalanche photodiode and the second avalanche photodiode, wherein the third semiconductor region and the fourth semiconductor region are arranged in a side wall portion of the trench structure
same
Claims 3 – 6, 10 – 14, 16 – 24 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3 and 8 of U.S. Patent No. 12,324,265 in view of Furumi (US 2022/0052092).
Regarding claim 3, ‘265 discloses the limitations of claim 1. ‘265 fails to explicitly disclose wherein the fourth semiconductor region is a semiconductor region of the second conductivity type, and wherein a width of the fourth semiconductor region is narrower than a width of the third semiconductor region.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, conductivity type and concentration of the impurity layer are exemplary, and P and N may be switched with each other and the anode and the cathode may be set to opposite conductivity types; width as measure from front to back (fig. 2-3; ¶88). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 4, ‘265 discloses the limitations of claim 1. ‘265 fails to explicitly disclose wherein the fourth semiconductor region is a semiconductor region of the first conductivity type.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and conductivity type and concentration of the impurity layer are exemplary, and P and N may be switched with each other and the anode and the cathode may be set to opposite conductivity types… An N-type layer (a first semiconductor layer) 180...A low-concentration N-type layer is used as the pixel separation portion 150 (fig. 2-3; ¶85-88). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 5, ‘265 in view of Furumi discloses the limitations of claim 4. Furumi also teaches wherein a depth of a boundary portion between the third semiconductor region and the fourth semiconductor region is shallower than a depth of a surface of the second semiconductor region which is close to the first surface with respect to the first surface, or same as a depth at which the second semiconductor region is arranged (fig. 2-5).
Regarding claim 6, ‘265 in view of Furumi discloses the limitations of claim 4. Furumi also teaches wherein a depth of a boundary portion between the third semiconductor region and the fourth semiconductor region is shallower than a depth of a surface of the second semiconductor region which is close to the first surface with respect to the first surface (fig. 2-5).
Regarding claim 10, ‘265 discloses the limitations of claim 1. ‘265 fails to explicitly disclose wherein each of the plurality of avalanche photodiodes includes a sixth semiconductor region that performs photoelectric conversion and is arranged at a third depth deeper than the second depth with respect to the first surface.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and multiple semiconductor regions arranged at different depths (fig. 2-3; ¶85). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 11, ‘265 in view of Furumi discloses the limitations of claim 10. Furumi also teaches wherein the third semiconductor region is arranged between the sixth semiconductor region of the first avalanche diode and the sixth semiconductor region of the second avalanche diode (fig. 2).
Regarding claim 12, ‘265 in view of Furumi discloses the limitations of claim 11. Furumi also teaches wherein the second semiconductor region includes a first portion between the first semiconductor region and the six semiconductor region and a second portion around the first portion, and wherein a potential magnitude for the signal charge is lower in the first portion of the second semiconductor region than in the second portion of the second semiconductor region (¶85-88).
Regarding claim 13, ‘265 in view of Furumi discloses the limitations of claim 10. Furumi also teaches wherein each of the plurality of avalanche photodiodes includes a seventh semiconductor region of the second conductivity type arranged at a fourth depth deeper than the third depth with respect to the first surface (fig. 3).
Regarding claim 14, ‘265 in view of Furumi discloses the limitations of claim 13. Furumi also teaches wherein the seventh semiconductor region is in contact with the third semiconductor region (fig. 3).
Regarding claim 16, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein the trench structure penetrates the semiconductor layer from the second surface of the semiconductor layer to the first surface of the semiconductor layer.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 17, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein the trench structure is formed from the first surface of the semiconductor layer.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 18, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein the trench structure is formed from the second surface of the semiconductor layer.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 19, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein, between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode, the trench structure is not arranged.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 20, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein, between the first semiconductor region of the first avalanche photodiode and the first semiconductor region of the third avalanche photodiode, the trench structure is arrange.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 21, ‘265 in view of Furumi disclose the limitations of claim 20. ‘265 also discloses wherein a length of the trench structure in a depth direction of a cross section passing through the first avalanche photodiode and the third avalanche photodiode differs from a length of the trench structure in a depth direction of a cross section passing through the first avalanche photodiode and the second avalanche photodiode (claim 10).
Regarding claim 22, ‘265 discloses the limitations of claim 15. ‘265 fails to explicitly disclose wherein at least any one of metal material, insulating material, and air is arranged inside the trench structure.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the trench penetrates the semiconductor layer from the second surface to the first surface (fig. 2-3; ¶88: buried insulation film or the like may be provided as the pixel separation portion 150). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 23, ‘265 discloses the limitations of claim 1. ‘265 fails to explicitly disclose a signal processing unit configured to generate an image using a signal output by the photoelectric conversion apparatus.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and a signal processor (fig. 20; ¶11). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
Regarding claim 24, ‘265 discloses the limitations of claim 1. ‘265 fails to explicitly disclose the movable body comprising: a control unit configured to control a movement of the movable body using a signal output by the photoelectric conversion apparatus.
In the same field of endeavor, Furumi teaches an imaging device including: a first semiconductor layer formed on a semiconductor substrate; a second semiconductor layer formed on the first semiconductor layer with opposite conductivity type to the first semiconductor layer; a pixel separation portion; a first electrode; and a metal layer, and the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles which can be recognized by the driver of the vehicle 12100 and obstacles which it is difficult to recognize. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which there is a possibility of collision at which the collision risk is equal to or greater than a set value, driving support for collision avoidance can be performed by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062 or performing forced deceleration or avoidance steering via the driving system control unit 12010. (fig. 35-36; ¶169, 176-177, 183-187). In light of the teaching of Furumi, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use Furumi’s teaching in ‘265’s system because an artisan of ordinarily skill would recognize that this would result in a low noise of pixels, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing interference between the pixels and variation in each pixel.
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/ANTOINETTE T SPINKS/Primary Examiner, Art Unit 2639
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