DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is responsive to the application filed 17 April 2025.
Claims 1-25 are pending and have been presented for examination.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 4, 6, 8-11, 13, 14, 16 and 17 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by ASHMORE (U.S. Patent Application Publication #2008/0120463).
1. ASHMORE discloses A host device, comprising: processing circuitry associated with one or more memory devices and configured to cause the host device (see [0029]: RAID controller includes a CPU; [0032]: RAID controller interfaces with the Disk arrays; [0034]: CPU issues commands to the disk array) to: transmit, to a memory device, a first message comprising a plurality of commands, wherein the first message comprises a field indicating a type of the plurality of commands (see [0049]: coalescer of the RAID controller creates a buffer data structure to hold multiple commands, a type field indicates the type of disk command), and wherein each command of the plurality of commands is a memory device profile query command or a memory device provisioning command (see [0048]:reconstruct utility and scrub utility are considered provisioning commands as they repair the storage device and allow replacement devices to be initialized for use; [0071]]: commands from utility threads are accumulated); and receive, from the memory device, one or more second messages comprising information for each command of the plurality of commands based at least in part on transmitting the first message (see [0064]: coalescer is notified of completion status).
4. The host device of claim 1, wherein the first message indicates for the memory device to access a respective portion of one or more memory arrays of the memory device for each command of the plurality of commands (see [0095]: the coalesced command structure specifies the disk blocks to be accessed).
6. The host device of claim 1, wherein the processing circuitry is further configured to cause the host device to: transmit, to the memory device, a third message comprising a plurality of second commands, wherein the third message comprises the field indicating the type of the plurality of second commands (see [0049]: coalescer of the RAID controller creates a buffer data structure to hold multiple commands, a type field indicates the type of disk command), wherein each second command of the plurality of second commands is a read command or a write command (see [0056]: read or write command); and receive, from the memory device, one or more fourth messages comprising data for each second command of the plurality of second commands based at least in part on transmitting the third message (see [0064]: completion status of read or write command).
8. The host device of claim 1, wherein the information associated with each command comprises query response information or interconnect response information (see [0053]; query the device type).
9. ASHMORE discloses A memory device, comprising: one or more memory arrays (see [0032]: Disk arrays); and processing circuitry coupled with the one or more memory arrays and configured to cause the memory device (see [0029]: RAID controller includes a CPU; [0032]: RAID controller interfaces with the Disk arrays; [0034]: CPU issues commands to the disk array) to: receive, from a host device, a first message comprising a plurality of commands, wherein the first message comprises a field indicating a type of the plurality of commands (see [0049]: coalescer of the RAID controller creates a buffer data structure to hold multiple commands, a type field indicates the type of disk command), and wherein each command of the plurality of commands is a memory device profile query command or a memory device provisioning command (see [0048]:reconstruct utility and scrub utility are considered provisioning commands as they repair the storage device and allow replacement devices to be initialized for use; [0071]]: commands from utility threads are accumulated); and transmit, to the host device, one or more second messages comprising information associated with each command of the plurality of commands based at least in part on receiving the first message (see [0064]: coalescer is notified of completion status).
10. The memory device of claim 9, wherein the processing circuitry is further configured to cause the memory device to: perform a plurality of operations corresponding to the plurality of commands based at least in part on receiving the first message, wherein transmitting the one or more second messages is based at least in part on performing the plurality of operations (see [0064]: execute the coalesced commands and return a completion response).
11. The memory device of claim 10, wherein the information associated with each command comprises query response information or interconnect response information (see [0064]: completion response).
13. The memory device of claim 9, wherein the processing circuitry is further configured to cause the memory device to: access a respective portion of the one or more memory arrays of the memory device for each command of the plurality of commands (see [0095]: the coalesced command structure specifies the disk blocks to be accessed), wherein transmitting the one or more second messages is based at least in part on accessing the respective portion of the one or more memory arrays for each command of the plurality of commands (see [0064]: completion response would occur after accessing the disk array).
14. The memory device of claim 13, wherein the information associated with each command comprises data associated with accessing the respective portion of the one or more memory arrays for the respective command of the plurality of commands (see [0064]: completion response would include data from a read command).
16. The memory device of claim 9, wherein the processing circuitry is further configured to cause the memory device to: receive, from the host device, a third message comprising a plurality of second commands, wherein the third message comprises the field indicating the type of the plurality of second commands (see [0049]: coalescer of the RAID controller creates a buffer data structure to hold multiple commands, a type field indicates the type of disk command), and wherein each second command of the plurality of second commands is a read command or a write command (see [0056]: read or write command); and transmit, to the host device, one or more fourth messages comprising data associated with each second command of the plurality of second commands based at least in part on receiving the third message (see [0064]: completion status of read or write command).
17. The memory device of claim 16, wherein the processing circuitry is further configured to cause the memory device to: access a respective portion of the one or more memory arrays of the memory device for each second command of the plurality of second commands (see [0095]: the coalesced command structure specifies the disk blocks to be accessed), wherein transmitting the one or more fourth messages is based at least in part on accessing the respective portion of the one or more memory arrays for each second command of the plurality of second commands (see [0064]: completion response would include data from a read command).
Allowable Subject Matter
Claims 19-25 are allowed.
Claims 2, 3, 5, 7, 12, 15 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The state of the art fails to anticipate, or render obvious, a boot loader communicating with a host device and buffering the plurality of commands, as recited in claims 2, 3 and 19.
The state of the art fails to anticipate, or render obvious, a single device command with an extra header segment to contain the plurality of commands, as recited in claims 5 and 15.
The state of the art fails to anticipate, or render obvious, transmitting the plurality of commands as part of a boot procedure, as recited in claims 7 and 18.
The state of the art fails to anticipate, or render obvious, a single bundled command that corresponds to a single response to the host device as recited in claim 12.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
TAI [2023/0127869] discloses batch processing of jobs being sent to memory devices. [0046]-[0061]
GIUM BERNAT [2019/0102107] discloses batch operations for read and write commands and a buffer to hold batched commands. [0022]-[0032]
WU [9,811,421] discloses a provisioning task for a storage system that consists of multiple individual tasks. [Column 10]
MA [2015/0347409] discloses combining multiple repeated operations into a single command. [0013]-[0017]
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD J DUDEK JR whose telephone number is (571)270-1030. The examiner can normally be reached Monday - Friday, 8:00A-4:00P.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain T Alam can be reached at 571-272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EDWARD J DUDEK JR/Primary Examiner, Art Unit 2132
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