Prosecution Insights
Last updated: October 02, 2026
Application No. 19/183,384

METHOD FOR PERFORMING GARBAGE COLLECTION, AND ELECTRONIC DEVICE SUPPORTING SAME

Non-Final OA §103§112
Filed
Apr 18, 2025
Priority
Oct 20, 2022 — RE 10-2022-0135900 +2 more
Examiner
BELKHAYAT, ZAKARIA MOHAMMED
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
23 granted / 26 resolved
+33.5% vs TC avg
Strong +19% interview lift
Without
With
+19.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
18 currently pending
Career history
50
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
70.4%
+30.4% vs TC avg
§102
14.3%
-25.7% vs TC avg
§112
11.1%
-28.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 26 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of some certified copies of papers required by 37 CFR 1.55. Acknowledgment is made of applicant's claim for foreign priority based on an application filed in REPUBLIC OF KOREA on 9 November, 2022. It is noted, however, that applicant has not filed a certified copy of application KR10-1022-0148892 as required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on 18 April, 2025 and 18 February, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Specification Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections Claims 2-6 and 12-16 objected to because of the following informalities: In claim 2, line 2, “asynch of write” should read “an asynchronous write”. In claim 5, line 2, “read or write synch” should read “a synchronous read or write”. In claim 12, line 3, “asynch of write” should read “an asynchronous write”. In claim 15, line 3, “read or write synch” should read “a synchronous read or write”. Claims depending from those identified above are seen to contain the same deficiencies and are also objected to. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 8 and 18 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 8 and 18 both reference “the screen” (Claim 8, line 2; Claim 18, line 3). There is insufficient antecedent basis for this limitation in the claims. A screen is not established as a limitation in independent claims 1 and 11, but is established in dependent claims 7 and 17. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-2, 5, 11-12, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al (U.S. Patent No. 9,690,700), hereinafter referred to as Choi, and Hahn et al (U.S. Patent Pub. No. 2015/0134857), hereinafter referred to as Hahn. In regard to claim 1, Choi teaches an electronic device (Fig. 1) comprising: a storage device (Fig. 1 310A, 320A); and a host electrically connected to the storage device (Fig. 1 200A), wherein the host is configured to: based on at least one information related to the electronic device (Column 4, lines 5-10), determine a start time of garbage collection (GC) to be performed by the storage device and a throughput of the GC (Column 4, lines 25-36 execution period and quantity of memory to be freed), based on determining the start time of GC and the throughput of the GC, transmit information related to the start time of the GC and the throughput of the GC to the storage device (Column 4, lines 25-36 host transmits command including data as parameters). Choi does not teach the remaining limitations of claim 1. However, Hahn teaches methods to identify whether an input/output (IO) operation occurs, while the GC is performed by the storage device, identify a property of the IO operation, based on occurrence of the IO operation (¶ 0038 commands are put into different queues; ¶ 0056-0058 commands added with a high priority property pause garbage collection), based on the property of the IO operation indicating a first property, determine to delay processing of the IO operation, to continue the GC performed by the storage device (¶ 0058, garbage collection is only deferred if commands have a high-priority indication, i.e. garbage collection is continued if the command property is low priority), and based on the property of the IO operation indicating a second property, control the storage device, so that the storage device at least temporarily pauses the GC and processes the IO operation (¶ 0058, lines 1-4 GC may be deferred based on high priority commands), achieving the claimed limitations. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Hahn in order to selectively pause garbage collection and benefit from IO optimization techniques (¶ 0024, lines 1-3). As for claim 2, the previously cited references teach the device of claim 1. Additionally, Hahn teaches an embodiment wherein based on a flag of the IO operation indicating asynch of write, determine the first property as the property of the IO operation, and based on determining the first property as the property of the IO operation, determine to perform the GC with a priority that is higher than a priority of the IO operation processing. According to ¶ 0038, asynchronous writes are placed in a low-priority queue, and in ¶ 0058, garbage collection is only deferred if high-priority writes are present (i.e. GC is executed with a higher priority than asynchronous writes). In combination with the host-controlled garbage collection of Choi, a person of ordinary skill in the art could implement this control at the host, achieving the claimed limitation. As for claim 5, the previously cited references teach the device of claim 1. Additionally, Hahn teaches an embodiment wherein based on a flag of the IO operation indicating read or write synch, determine the second property as the property of the IO operation, and based on determining the second property as the property of the IO operation, determine to process the IO operation with a priority that is higher than a priority of the GC. According to ¶ 0038, synchronous reads and writes are placed in high-priority queues, and in ¶ 0058, lines 1-8 high priority commands may be executed out-of-order (i.e. GC is executed with a lower priority). In combination with the host-controlled garbage collection of Choi, a person of ordinary skill in the art could implement this control at the host, achieving the claimed limitation. As for claim 11, Applicant is directed to the rejection of claim 1 above, as the claims include the same limitations and are rejected on the same rationale. As for claim 12, Applicant is directed to the rejection of claim 2 above, as the claims include the same limitations and are rejected on the same rationale. As for claim 15, Applicant is directed to the rejection of claim 5 above, as the claims include the same limitations and are rejected on the same rationale. Claims 3-4, 6, 13-14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Choi, Hahn, and Nimura et al (U.S. Patent Pub. No. 2018/0039441), hereinafter referred to as Nimura. As for claim 3, the previously cited references teach the device of claim 2. They do not teach the remaining limitations of claim 3. However, Nimura teaches an embodiment wherein the storage device is a first storage device, the electronic device further comprising a second storage device, wherein the host is further configured to: based on determining to perform the GC with the priority that is higher than the priority of the IO operation processing, store the IO operation in the second storage device. Fig. 16 and related description in ¶ 0152-0155, when GC is prioritized in a first device, a command may be sent to another device. In combination with the host-controlled garbage collection of Choi, a person of ordinary skill in the art could implement this control at the host, achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Nimura in order to process commands during garbage collection and benefit from reduced deterioration in response performance (¶ 0042). As for claim 4, the previously cited references teach the device of claim 3. Additionally, Nimura teaches an embodiment wherein the host is further configured to: receive information indicating execution completion of the GC from the first storage device, and based on receiving the information indicating the completion of the GC, transmit the IO operation stored in the second storage device to the first storage device. Fig. 16 and related description in ¶ 0158 disclose that a write request transmitted to another device due to GC execution at the target is mirrored to the target after GC completion, achieving the claimed limitation. As for claim 6, the previously cited references teach the device of claim 5. Choi teaches performing garbage collection based on GC throughput and a remaining throughput indication (Column 4, lines 5-36 garbage collection state and free space is part of the information used to execute garbage collection to recover a desired number of blocks) but the references do not explicitly teach the remaining limitations of claim 6. However, Nimura teaches an embodiment wherein the host is further configured to: receive from the storage device, information indicating processing completion of the IO operation (¶0175), and based on receiving the information indicating processing completion of the IO operation, transmit to the storage device, information to resume the at least temporarily paused GC (¶ 0178; ¶ 0172 GC is controlled by storage controller, i.e. host in the combination, so paused GC would be resumed by it as well), achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Nimura in order to process commands during garbage collection and benefit from reduced deterioration in response performance (¶ 0042). As for claim 13, Applicant is directed to the rejection of claim 3 above, as the claims include the same limitations and are rejected on the same rationale. As for claim 14, Applicant is directed to the rejection of claim 4 above, as the claims include the same limitations and are rejected on the same rationale. As for claim 16, Applicant is directed to the rejection of claim 6 above, as the claims include the same limitations and are rejected on the same rationale. Claims 7 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Choi, Hahn, Mauro et al (U.S. Patent Pub. No. 2022/0164283), hereinafter referred to as Mauro, and Seto (U.S. Patent Pub. No. 2021/0141438). As for claim 7, the previously cited references teach the device of claim 1. They do not teach the remaining limitations of claim 7. However, Mauro ¶ 0081 discloses determin[ing] whether the electronic device executes a charging function (¶ 0078 discloses power parameter is satisfied if device is charging), based on determining that the electronic device executes the charging function, determine an idle state, and based on determining an idle state, determine the start time of the GC (¶ 0081, power parameter is checked, then idle state is determined, and garbage collection is set for that idle period). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Mauro in order to schedule GC operations during idle periods of sufficient power and address increased power consumption and performance loss during garbage collection (¶ 0011-0012). Previously cited references do not teach a screen of the electronic device, however Seto discloses a power state wherein the display is disabled in an idle mode and background processing occurs (¶ 0060-0061). A person of ordinary skill in the art could combine this with the disclosure of Mauro in order to only activate garbage collection if the device is charging and the screen is off (i.e. idle), achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Seto in order to reduce power consumption of a device including a screen (¶ 0026). As for claim 17, Applicant is directed to the rejection of claim 7 above, as the claims include the same limitations and are rejected on the same rationale. Claims 8 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Choi, Hahn, Mauro, Seto, and He et al (U.S. Patent Pub. No. 2021/0073121), hereinafter referred to as He. As for claim 8, the previously cited references teach the device of claim 1. Additionally, the embodiment described in the rationale for rejection of claim 7 includes determining an idle state when the screen of a device is inactive. The references do not explicitly teach the remaining limitations of claim 8, however He teaches determin[ing] whether an idle state of the electronic device is maintained for a period of time, and based on determining that the idle state of the electronic device is maintained for the period of time, determine the start time of the GC (¶ 0040 discloses adjusting garbage collection execution based on detected idle times, including suppressing GC during short idle periods). A person of ordinary skill in the art could combine these disclosures in order to only execute garbage collection during sufficient screen-off idle periods, achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of He in order to dynamically adjust GC performance and reduce write amplification and user experience degradation (¶ 0015, lines 1-7). As for claim 18, Applicant is directed to the rejection of claim 8 above, as the claims include the same limitations and are rejected on the same rationale. Claims 9 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Choi, Hahn, and Dalmatov. As for claim 9, the previously cited references teach the device of claim 1. Additionally, Choi teaches determining the throughput of GC based on write volume (Column 7, line 60 to Column 8, line 1). The references do not explicitly teach the remaining limitations of claim 9. However, Dalmatov teaches obtain[ing] write information recorded in an operating system of the electronic device, based on the write information, determine a daily write volume (¶ 0023 discloses determining write rate by querying a storage device daily). When combined with the data-based garbage collection of Choi, the claimed limitation is achieved. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Dalmatov in order to improve system performance by balancing wear (¶ 0026, lines 1-4). As for claim 19, Applicant is directed to the rejection of claim 9 above, as the claims include the same limitations and are rejected on the same rationale. Claims 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi, Hahn, and He. As for claim 10, the previously cited references teach the device of claim 1. They do not teach the remaining limitations of claim 10. However, He discloses a dynamic garbage collection process wherein based on determining the throughput of the GC, identify an average idle time of the electronic device, and based on the average idle time of the electronic device, adjust the throughput of the GC (¶ 0030 discloses recording an average of idle times, and ¶ 0031 discloses separating a garbage collection workload i.e. adjusting throughput based on average idle time), achieving the claimed limitation. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of He in order to dynamically adjust GC performance and reduce write amplification and user experience degradation (¶ 0015, lines 1-7). As for claim 20, Applicant is directed to the rejection of claim 10 above, as the claims include the same limitations and are rejected on the same rationale. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim (U.S. Patent Pub. No. 2020/0310968) discloses techniques for monitoring garbage collection in a multi-device system. Zhang et al (“GCL”) discloses techniques for reducing IO operation conflicts with garbage collection. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAKARIA MOHAMMED BELKHAYAT whose telephone number is (571)270-0472. The examiner can normally be reached Monday thru Thursday 7:30AM-5:30PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571)272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ZAKARIA MOHAMMED BELKHAYAT/Examiner, Art Unit 2139 /REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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Prosecution Timeline

Apr 18, 2025
Application Filed
Jul 08, 2026
Non-Final Rejection mailed — §103, §112
Aug 31, 2026
Interview Requested
Sep 10, 2026
Examiner Interview Summary
Sep 10, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+19.4%)
2y 1m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 26 resolved cases by this examiner. Grant probability derived from career allowance rate.

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