Prosecution Insights
Last updated: May 29, 2026
Application No. 19/186,697

PROTECTION CIRCUIT AND DISPLAY DEVICE INCLUDING THE PROTECTION CIRCUIT

Non-Final OA §102§103
Filed
Apr 23, 2025
Priority
Jun 27, 2024 — JP 2024-103814
Examiner
MATTHEWS, ANDRE L
Art Unit
2621
Tech Center
2600 — Communications
Assignee
Japan Display Inc.
OA Round
1 (Non-Final)
61%
Grant Probability
Moderate
1-2
OA Rounds
2y 5m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allowance Rate
311 granted / 508 resolved
-0.8% vs TC avg
Strong +17% interview lift
Without
With
+16.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
16 currently pending
Career history
545
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
87.4%
+47.4% vs TC avg
§102
5.9%
-34.1% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 508 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 12-14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Aoki(US 2006/0017672). Regarding claim 12, Aoki teaches A protection circuit (Fig. 7 protection circuit 211) comprises: a first resistor element (Fig. 7 one R31b); and a second resistor element(Fig. 7 any other R31b), wherein a first end of the first resistor element and a first end of the second resistor element are electrically connected to each other and are configured to be supplied with a control signal (Fig. 7 show connected to each other at control ling V1), a second end of the second resistor element and a second end of the first resistor element are electrically connected to each other (Fig. 7 show the resistors connected to each to other through the pixel display), and the control signal is selected from a clock signal, an image signal, a reset signal, and an initialization signal ([0005]). Regarding claim 13, Aoki discloses wherein the control signal is a clock signal ([0005]). Regarding claim 14, Aoki teaches wherein each of the protection circuits comprises a first diode, a second diode, a third diode, and a fourth diode, and wherein, in each of the plurality of protection circuits, the second end of the first resistor element is electrically connected to an input terminal of the first diode and an output terminal of the second diode, the second end of the second resistor element is electrically connected to an input terminal of the third diode and an output terminal of the fourth diode, an output terminal of the first diode and an output terminal of the third diode are electrically connected to each other, and an input terminal of the second diode and an input terminal of the for diode are electrically connected to each other (Fig. 2 shows that the resistor R31 and R32 connected between the input and output of the first and second diode of ESD1 and ESD5. It is obvious that this connection would be applied to the protection circuit of Fig. 7). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6, 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Katsuta US 2018/0067357) in view of Aoki (US 2006/0017672). Regarding claim 1, Katsuta teaches A display device comprising: a plurality of pixels (Fig.3); a driver circuit configured to control the plurality of pixels ([0040-0041 driver chip DRC and scanning line circuit); a first power-source line configured to provide the plurality of pixels with a first potential( Fig. 19 power source wiring line VDW [0127]); a second power-source line configured to provide the plurality of pixels with a second potential lower than the first potential ( Fig. 19 power source wiring line GDW, ground potential [0127]; a plurality of protection circuits (Protection circuits shown in Fig. 17 and 19); and a plurality of control-signal wirings electrically connecting the plurality of protection circuits to the driver circuit([0130] teaches the driver chips DRC are connected to plurality of terminals TPD and the protection circuits are connected to the terminal TPD. Fig. 16 shows control wiring GW (GW1) connecting driver circuits GD, terminal pad TPD, Protection circuit PC and driver chip DRC) , wherein each of the plurality of protection circuits comprises: a first resistor element (Fig. 19 RES1) configured so that a first end of the first resistor element is supplied with a control signal (Fig. 19 RES1 is supplied with a control signal from TPD [0123-0127]) and a second end of first resistor element is electrically connected to one of the plurality of control-signal wirings; and a second resistor element configured so that a first end of the second resistor element is supplied with the control signal and a second end of the second resistor element is electrically connected to the one of the plurality of control-signal wirings. Although Katsuta teaches the protection circuit as discussed above and a second resistor would be a duplication of parts (. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8.), he fails to teach he fails to teach a second end of first resistor element is electrically connected to one of the plurality of control-signal wirings; and a second resistor element configured so that a first end of the second resistor element is supplied with the control signal and a second end of the second resistor element is electrically connected to the one of the plurality of control-signal wirings. However in the field of protecting a display device from surge current, Aoki teaches a protection circuit with a first resistor (Fig. 7 protection circuit 211 comprising resistor R31b) so that a second end of the first resistor element is electrically connected to one of the plurality of control-signal wirings (Fig. 7 R31b has one end electrically connected to current supply line L32 through ESD circuits) and a second resistor element configured so that a first end of the second resistor element is supplied with a control signal (Fig. 7 R31a connected to control signal of data line I1) and a second end of the second resistor element is electrically connected to the one of the plurality of control-signal wirings(Fig. 7 R31a has one end electrically connected to current supply line L32 through ESD circuits). Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Katsuta with the method of multiple protection circuits as taught by Aoki. This combination provides a method of prolonging the life of the display device as disclosed by Aoki [0013]. Regarding claim 2, Aoki teaches wherein each of the protection circuits comprises a first diode, a second diode, a third diode, and a fourth diode, and wherein, in each of the plurality of protection circuits, the second end of the first resistor element is electrically connected to an input terminal of the first diode and an output terminal of the second diode, the second end of the second resistor element is electrically connected to an input terminal of the third diode and an output terminal of the fourth diode (Fig. 2 shows that the resistor R31 and R32 connected between the input and output of the first and second diode of ESD1 and ESD5. It is obvious that this connection would be applied to the protection circuit of Fig. 7), and Katsuta discloses the first power-source line is electrically connected to an output terminal of the first diode and an output terminal of the third diode, and the second power-source line is electrically connected to an input terminal of the second diode and an input terminal of the fourth diode( Fig. 19 power source wiring line VDW and GDW ground potential [0127]. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have the input and output terminals of the diodes of the protection circuits connected to the same respective power source line, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Regarding claim 3, Aoki discloses supplying a clock signal as a control signal to a protection circuit ([0005]. Regarding claim 4, Aoki teaches wherein the control signal is selected from an image signal, a reset signal, and an initialization signal (Fig. 7 shows that control signal input at resistor R31a being data signal I1). Regarding claim 6, Aoki teaches wherein a first power-source line (power source line 216) and the second power-source line (power source line 217) intersect the plurality of control-signal wirings (control wiring V1,V2,V3) , and wherein, with respect to each of the protection circuits, an electrical connection of the protection circuit and the control-signal wiring is performed between the first power-source line and the protection circuit and between the second power-source line and the protection circuit ([0195][0197][0199]). Regarding claim 9, Katsuta in view of Aoki teach the limitations of claim 1 as discussed above but do not explicitly teach wherein each of the plurality of protection circuits further comprises a third resistor element, a first end of the third resistor element is configured to be supplied with the control signal, and a second end of the third resistor element is electrically connected to the control-signal wiring. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have each of the plurality of protection circuits further comprises a third resistor element, a first end of the third resistor element is configured to be supplied with the control signal, and a second end of the third resistor element is electrically connected to the control-signal wiring, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Regarding claim 10, Katsuta in view of Aoki teach the limitations of claims 1 and 9 as discussed above but do not explicitly teach wherein each of the plurality of protection circuits further comprises a fifth diode and a sixth diode, the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode, the first power-source line is electrically connected to an output terminal of the fifth diode, and the second power-source line is electrically connected to an input terminal of the sixth diode. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have each of the plurality of protection circuits wherein each of the plurality of protection circuits further comprises a fifth diode and a sixth diode, the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode, the first power-source line is electrically connected to an output terminal of the fifth diode, and the second power-source line is electrically connected to an input terminal of the sixth diode, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Katsuta US 2018/0067357) in view of Aoki (US 2006/0017672) and Park (US 2020/0373374). Regarding claim 5, Katsuta in view of Aoki teach the limitations as discussed above, and Katsuta further teach a flexible printed circuit board electrically connected to the driver circuit ([0048]), while Aoki teaches but they fail to teach wherein the first end of the first resistor element and the first end of the second resistor element of each of the plurality of protection circuits are electrically connected to each other (Fig. 7 R31a/R31b connected to each other), but they fail to teach the resistors of the protection circuit are connected over the flexible printed circuit board. However in the same field of applying a protection circuit to a display device, Park teaches disposing an protection circuit on a flexible circuit board (Fig. 4 protection circuit ESD is disposed on circuit board FCB.). Therefore it would have been obvious to one of skill in the art that disposing a protection circuit as taught by Katsuta and Aoki on a flexible circuit board as taught by Park would result of the resistors of both Katsuta and Aoki being electrically connected over the circuit board. This combination provides a method of prolonging the life of the display device as disclosed by Aoki [0013]. Claims 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Aoki (US 2006/0017672). Regarding claim 16, Aoki teach the limitations of claim 1 as discussed above but does not teach a third resistor element with a first end electrically connected to the first end of the first resistor element and a second end electrically connected to the second end of the first resistor element. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have each of the plurality of protection circuits wherein each of the plurality of protection circuits further comprises a third resistor element with a first end electrically connected to the first end of the first resistor element and a second end electrically connected to the second end of the first resistor element., since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Regarding claim 17, Aoki teach the limitations of claim 1 as discussed above but does not teach a comprising a fifth diode and a sixth diode, wherein the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode.. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have each of the plurality of protection circuits wherein each of the plurality of protection circuits further comprises comprising a fifth diode and a sixth diode, wherein the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode.., since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Regarding claim 18, Aoki teach the limitations of claim 1 as discussed above but does not teach a comprising a third resistor element with a first end electrically connected to the first end of the first resistor element and a second end electrically connected to the second end of the first resistor element; and a fifth diode and a sixth diode, wherein the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode, an output terminal of the fifth diode is electrically connected to the output terminal of the first diode and the output terminal of the third diode, and an input terminal of the sixth diode is electrically connected to the input terminal of the second diode and the input terminal of the fourth diode.. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have each of the plurality of protection circuits wherein each of the plurality of protection circuits further comprises a third resistor element with a first end electrically connected to the first end of the first resistor element and a second end electrically connected to the second end of the first resistor element; and a fifth diode and a sixth diode, wherein the second end of the third resistor element is electrically connected to an input terminal of the fifth diode and an output terminal of the sixth diode, an output terminal of the fifth diode is electrically connected to the output terminal of the first diode and the output terminal of the third diode, and an input terminal of the sixth diode is electrically connected to the input terminal of the second diode and the input terminal of the fourth diode, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Allowable Subject Matter Claims 7-8, 11, 15, and 19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 7, 11, 15, and 19 are indicated allowable based on the auxiliary resistors and the connection. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRE L MATTHEWS whose telephone number is (571)270-5806. The examiner can normally be reached Mon-Fri 9:00-6:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amr Awad can be reached at 571-272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANDRE L MATTHEWS/ Primary Examiner, Art Unit 2621
Read full office action

Prosecution Timeline

Apr 23, 2025
Application Filed
Apr 02, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
61%
Grant Probability
78%
With Interview (+16.6%)
3y 6m (~2y 5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 508 resolved cases by this examiner. Grant probability derived from career allowance rate.

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