DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 14 July, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claims 4, 12, 17, and 20 are objected to because of the following informalities:
Claims 4, 12, and 20 each contain the limitation:
“wherein the second parameter is associated with one of a ratio of FIFO queues of a first SLC bypass, a ratio of width of FIFO to width of bypass lane in a second SLC bypass, and a ratio of width of FIFO to width of bypass lane in a third SLC bypass in the second portion.”
For clarity, this should read:
“wherein the second parameter is associated with one of:
a ratio of FIFO queues of a first SLC bypass,
a ratio of width of FIFO to width of bypass lane in a second SLC bypass, or [[and]]
a ratio of width of FIFO to width of bypass lane in a third SLC bypass in the second portion.”
Or similar.
In claim 17, line 1, “adjustability” should read “adjust”
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 9, and 16 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 8, 15, and 1 (respectively) of U.S. Patent No. 12,314,163. Although the claims at issue are not identical, they are not patentably distinct from each other because the claimed “first portion” of hierarchical queues in the instant application may be mapped to the priority queue, die queue, and write queue of patent ‘163, the claimed “second portion” of hierarchical queues in the instant application may be mapped to the power token queues of patent ‘163 (as they are equivalent in width to die queues as claimed, i.e. they are also parallel per-die queues; each portion would then include bypass lanes and FIFO queues), and a person of ordinary skill in the art would find it an obvious modification to explicitly [transfer] the queue items from the second portion to the plurality of solid-state storage dies as claimed in the instant application to achieve the expected result of executing commands.
Claims 5, 13, and 17 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 8, 15, and 1 (respectively) of U.S. Patent No. 12,314,163. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims depend from patentably indistinct claims and include the additional shared limitation of adjusting a ratio relating to handling the queue items in at least one queue in the hierarchy of queues responsive to real-time monitoring of throughput.
Claim 7 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 12,314,163. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims depend from patentably indistinct claims and include shared additional limitations (in the first portion in the instant claims is patentably indistinct from in the priority queue in patent ‘163).
Claims 8 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 13 and 19 (respectively) of U.S. Patent No. 12,314,163. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims depend from patentably indistinct claims and include shared additional limitations (in the second portion in the instant claims is patentably indistinct from in the power token queue, in a third SLC bypass in patent ‘163).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 16 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, at the time the application was filed, had possession of the claimed invention. The specification and drawings of the instant application do not sufficiently disclose “A system, comprising: a memory having solid state storage dies; an interface to a storage device having a plurality of solid-state storage dies; a processor, coupled to the memory and the interface for I/O (input/output) processing; and a hierarchy of queues, implemented through at least the processor and the memory”. The disclosed embodiments do not indicate to one of ordinary skill in the art that the claimed invention includes solid state storage dies in both a system memory as well as a storage device. Numerous drawings (Figs. 1C, 2C, 2D) and descriptions in the instant application indicate a difference between system memory units (DRAM, NVRAM; volatile memory backed by a capacitor i.e. not solid state) and storage memory having several solid-state flash dies.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 9, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Inbar et al (U.S. Patent Pub. No. 2018/0239532), hereinafter referred to as Inbar, in view of Staelin et al (U.S. Patent Pub. No. 2012/0066685), hereinafter referred to as Staelin, and Neuman (U.S. Patent No. 7,631,132).
In regard to claim 1, Inbar teaches routing queue items from a first portion of hierarchical queues to a plurality of FIFO (first in first out) queues in parallel in a second portion of the hierarchical queues in the storage system , wherein each individual FIFO queue corresponds to one of a plurality of solid-state storage dies in the storage system (see Fig. 9 queues 902-906 feed die queues 606-612; ¶ 0083 lines 5-12 controller may schedule operations concurrently; ¶ 0090 commands are propagated from higher level queues to lower level die queues), and transferring the queue items from the second portion to the plurality of solid-state storage dies (¶0102-0104 memory commands are sent to memory dies after queue hierarchy). Inbar does not explicitly teach the remaining limitations of claim 1. However, Staelin teaches a method, comprising: prioritizing received read and write operations for I/O (input/output) processing as queue items through a first portion of hierarchical queues in a storage system. In ¶ 0031-0032, access requests are submitted to scheduling system 10 in Fig. 1 and placed into prioritized pending request queues. In ¶ 0039, requests are submitted to the storage device 18 and placed in outstanding request queue 22, creating a queue hierarchy. This may be implemented by one of ordinary skill as an algorithm (¶ 0023 lines 1-7) in the controller of Inbar which manages access requests. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Staelin in order to prioritize incoming requests and improve performance via better parallelism (¶ 0023 lines 7-11). The previously cited references do not teach wherein at least one queue of the first portion and at least one queue of the second portion comprise a bypass lane and a FIFO queue, however Neuman Fig. 3 discloses a hierarchical queue structure wherein each queue level includes a bypass lane and a FIFO queue, achieving the claimed limitation. Additionally, the disclosure of Neuman is applicable to FIFO buffers/queues handling prioritized requests in general as an improvement (Column 2, lines 6-11). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Neuman in order to prioritize certain requests in multiple queues via bypass lanes, reduce FIFO insertion delay (and therefore latency; Column 4 lines 4-13), and improve system performance (Column 4, lines 48-55).
As for claim 9, Applicant is directed to the rejection of claim 1 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
As for claim 16, Applicant is directed to the rejection of claim 1 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
Claims 2, 5, 10, 13, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Inbar, Staelin, Neuman, and Sun et al (U.S. Patent Pub. No. 2019/0056870), hereinafter referred to as Sun.
As for claim 2, the previously cited references teach the method of claim 1. They do not teach the remaining limitations of claim 2. However, Sun's disclosure supports a technique wherein throughput through at least one queue of the first portion and at least one queue of the second portion is adjustable through a first parameter associated with a queue of the first portion and a second parameter associated with a queue of the second portion. ¶ 0025-0026 discloses using a value for each queue managed by a queue manager to control throughput of the queue. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to implement this functionality in the controller of Inbar (Inbar Fig. 4 controller manages queues) in order to manage individual queue throughput for each level of a hierarchical queue system and reduce read latency (¶ 0004).
As for claim 5, the previously cited references teach the method of claim 1. They do not teach the remaining limitations of claim 5. However, Sun's disclosure supports a technique comprising: adjusting a ratio relating to handling the queue items in at least one queue in the hierarchy of queues responsive to real-time monitoring of throughput. ¶ 0025-0026 discloses using a dynamically adjustable value for each queue managed by a queue manager to control throughput of the queue. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to implement this functionality in the controller of Inbar (Inbar Fig. 4 controller manages queues) in order to manage individual queue throughput dynamically and reduce read latency (¶ 0004).
As for claim 10, Applicant is directed to the rejection of claim 2 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
As for claim 13, Applicant is directed to the rejection of claim 5 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
As for claim 17, Applicant is directed to the rejection of claim 5 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
As for claim 18, Applicant is directed to the rejection of claim 2 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
Claims 3, 11, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Inbar, Staelin, Neuman, Sun, and Tang et al (U.S. Patent No. 11,314,547, filed 27 March, 2020), hereinafter referred to as Tang.
As for claim 3, the previously cited references teach the method of claim 1. They do not teach the remaining limitations of claim 3. However, Tang's disclosure supports a technique wherein the first parameter is associated with a ratio of FIFO queues of a background read throttler in the first portion. Column 11, lines 46-55 disclose a background throttle manager which utilizes a bandwidth ratio for queues to schedule requests including output (read) requests, achieving the claimed limitation if implemented in the controller of Inbar and its high-level queues which are used to schedule requests for die queues. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the disclosure of Tang in order to throttle background operations, functionally improving responsiveness to foreground operations (see Column 2, lines 3-31).
As for claim 11, Applicant is directed to the rejection of claim 3 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
As for claim 19, Applicant is directed to the rejection of claim 3 above, as the claims are directed to the same limitations and therefore rejected on the same rationale.
Allowable Subject Matter
Claims 4, 6-8, 12, 14-15, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if all informalities and double patenting concerns are addressed and the claims are rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 4, 12, and 20 include the limitations wherein the second parameter is associated with one of a ratio of FIFO queues of a first SLC bypass, a ratio of width of FIFO to width of bypass lane in a second SLC bypass, and a ratio of width of FIFO to width of bypass lane in a third SLC bypass in the second portion. No reference, taken alone or in combination, was found to sufficiently teach the entirety of the claimed limitations. Specifically, no reference was found to sufficiently teach manipulating queues in relation to specific bypass lanes as claimed.
Claims 6 and 14 include the limitations wherein the second portion places items not for QLC (quad level cell) writes into a first FIFO queue having a higher priority and placing queue items that are for QLC writes into a second FIFO queue having a lower priority. No reference, taken alone or in combination, was found to sufficiently teach the entirety of the claimed limitations. Specifically, no reference was found to sufficiently teach prioritizing queue items based on cell type in a hierarchical queue as claimed.
Claim 7 includes the limitations wherein the first portion is configured to pass through queue items that are not reads, pass through queue items that are not background, place queue items that are for SLC (single level cell) background read into a first FIFO queue having a first priority for SLC-only dies, and place queue items that are for non-SLC and background reads into a second FIFO queue having a second priority for non-SLC-only dies. No reference, taken alone or in combination, was found to sufficiently teach the entirety of the claimed limitations. Specifically, no reference was found to sufficiently teach prioritizing queue items based on cell type in a hierarchical queue as claimed.
Claims 8 and 15 include the limitations wherein the second portion is configured to pass through queue items that are for SLC-only dies and place queue items that are not for SLC into a first FIFO queue having a specified width corresponding to a number of SLC only dies. No reference, taken alone or in combination, was found to sufficiently teach the entirety of the claimed limitations. Specifically, no reference was found to sufficiently teach prioritizing queue items based on cell type in a hierarchical queue as claimed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ren et al ("Device-Level Optimization Techniques for Solid-State Drives") discusses modern techniques for optimization in solid-state devices.
Uchida (U.S. Patent Pub. No. 2020/0285413) teaches a form of priority queueing based on memory cell density.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAKARIA MOHAMMED BELKHAYAT whose telephone number is (571)270-0472. The examiner can normally be reached Monday thru Thursday 7:30AM-5:30PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571)272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ZAKARIA MOHAMMED BELKHAYAT/Examiner, Art Unit 2139
/REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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