DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/24/2025 has been considered by the examiner. The submission is in compliance with the provisions of 37 CFR 1.97.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 6, 11, and 13 - 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. The claims are indefinite because independent claims 1 and 13 - 16 do not clearly set forth the metes and bounds of the patent protection desired because in claims 1 and 13 - 16 applicant claims ΔΣ modulation. The applicant does not define ΔΣ modulation and the examiner notes that as claimed the examiner is not sure what ΔΣ modulation entails. Clarification without introduction of new matter is required. Appropriate correction is required.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 14 recites the limitation "the image sensor " in line 2. There is insufficient antecedent basis for this limitation in the claim.
Election/Restrictions
Claims 7 – 10 and 12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 07/27/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5, and 13 – 16 are rejected under 35 U.S.C. 102(a)(1) [as best understood in view of the 35 USC § 112 rejection above] as being anticipated by JUNG (US PgPub No. 20110069211).
Regarding claim 1, JUNG teaches an analog-to-digital converter comprising one or more processors and/or circuitry (figure 12 item 200 with item 230) which function as: an analog-to-digital conversion unit that performs analog-to-digital conversion using ΔΣ modulation on an image signal output from pixels (figure 1 – 2 item 10 receiving signal from item 20); a judgement unit that judges a gain to be applied to the image signal (figure 10 item S40 and/or figure 11 item S500; also paragraph 0054 – 0056 gain control); and a control unit that controls a feedback amount used in the analog-to-digital conversion of the image signal by the analog-to-digital conversion unit based on the gain (figure 10 item S50 “NO” also figure 11 item S600 “NO” also paragraph 0048 feedback), wherein the control unit controls the feedback amount smaller in a case where the gain is a first gain than in a case where the gain is a second gain smaller than the first gain (paragraphs 0048 and 0054 – 0056; amount of feedback depending on the gain).
Regarding claim 5, as mentioned above in the discussion of claim 1, JUNG teaches all of the limitations of the parent claim. Additionally, JUNG teaches wherein the control unit further controls an output of the analog-to-digital conversion unit, and in a case where the image signal is greater than a predetermined first threshold, the control unit controls the analog-to-digital conversion unit to output a predetermined value without performing the analog-to-digital conversion (figure 1 item 50 controlling item 10).
Regarding claim 13, JUNG teaches an image sensor (figure 1 item 100) comprising: a plurality of the analog-to-digital converters (figure 1 – 2 item 10 receiving signal from item 20) each comprising one or more processors and/or circuitry (figure 12 item 200 with item 230) which function as: an analog-to-digital conversion unit that performs analog-to-digital conversion using ΔΣ modulation on an image signal output from pixels (figure 1 – 2 item 10 receiving signal from item 20); a judgement unit that judges a gain to be applied to the image signal (figure 10 item S40 and/or figure 11 item S500; also paragraph 0054 – 0056 gain control); and a control unit that controls a feedback amount used in the analog-to-digital conversion of the image signal by the analog-to-digital conversion unit based on the gain (figure 10 item S50 “NO” also figure 11 item S600 “NO” also paragraph 0048 feedback), wherein the control unit controls the feedback amount smaller in a case where the gain is a first gain than in a case where the gain is a second gain smaller than the first gain (paragraphs 0048 and 0054 – 0056; amount of feedback depending on the gain), and a plurality of the pixels (paragraphs 0015 and 0043 – 0046; pixel array).
Regarding claim 14, JUNG teaches an electronic apparatus (figure 12 item 200) comprising: the image sensor (figure 1 item 100) comprising: a plurality of the analog-to-digital converters (figure 1 – 2 item 10 receiving signal from item 20) each comprising one or more processors and/or circuitry (figure 12 item 200 with item 230) which function as: an analog-to-digital conversion unit that performs analog-to-digital conversion using ΔΣ modulation on an image signal output from pixels (figure 1 – 2 item 10 receiving signal from item 20); a judgement unit that judges a gain to be applied to the image signal (figure 10 item S40 and/or figure 11 item S500; also paragraph 0054 – 0056 gain control); and a control unit that controls a feedback amount used in the analog-to-digital conversion of the image signal by the analog-to-digital conversion unit based on the gain (figure 10 item S50 “NO” also figure 11 item S600 “NO” also paragraph 0048 feedback), wherein the control unit controls the feedback amount smaller in a case where the gain is a first gain than in a case where the gain is a second gain smaller than the first gain (paragraphs 0048 and 0054 – 0056; amount of feedback depending on the gain); and a plurality of the pixels (paragraphs 0015 and 0043 – 0046; pixel array); and a processing unit that processes digital signals obtained through the analog-to-digital conversion by the analog-to-digital converters (figures 2 – 3 and paragraphs 0049 which is sent for further processing figure 10 item S40 and figure 11 item S500).
Regarding claim 15, JUNG teaches a control method for controlling (figures 10 – 11) an analog-to-digital converter that performs analog-to-digital conversion using ΔΣ modulation on an image signal output from pixels (figure 1 – 2 item 10 receiving signal from item 20), comprising: judging a gain to be applied to the image signal (figure 10 item S40 and/or figure 11 item S500; also paragraph 0054 – 0056 gain control); and controlling a feedback amount, used in the analog-to-digital conversion of the image signal (figure 10 item S50 “NO” also figure 11 item S600 “NO” also paragraph 0048 feedback), smaller in a case where the gain is a first gain than in a case where the gain is a second gain smaller than the first gain (paragraphs 0048 and 0054 – 0056; amount of feedback depending on the gain).
Regarding claim 16, JUNG teaches a non-transitory computer-readable storage medium, the storage medium storing a program that is executable by the computer, wherein the program includes program code for causing the computer to execute (figure 12 item 230) each step of the method controlling (figures 10 – 11) an analog-to-digital converter that performs analog-to-digital conversion using ΔΣ modulation on an image signal output from pixels (figure 1 – 2 item 10 receiving signal from item 20), comprising: judging a gain to be applied to the image signal (figure 10 item S40 and/or figure 11 item S500; also paragraph 0054 – 0056 gain control); and controlling a feedback amount, used in the analog-to-digital conversion of the image signal (figure 10 item S50 “NO” also figure 11 item S600 “NO” also paragraph 0048 feedback), smaller in a case where the gain is a first gain than in a case where the gain is a second gain smaller than the first gain (paragraphs 0048 and 0054 – 0056; amount of feedback depending on the gain).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Veeder (US patent No. 9628105) teaches a delta-sigma modulator circuit for use in a pixelated image sensor or a readout integrated circuit.
Miura (US PgPub No. 20050275756) teaches an input unit which inputs an analog video signal.
Jung (US PgPub No. 20100171644) teaches an analog-digital converter (ADC) includes a modulator and a digital integrator.
Jung (US PgPub No. 20110050473) teaches an analog-digital converter (ADC) includes a correlated double sampling (CDS) circuit configured to perform CDS on each of a reset signal and an image signal output from a pixel to generate a correlated double sampled reset signal and a correlated double sampled image signal.
JUNG (US PgPub No. 20120097839) teaches an analog-to-digital converter includes a modulation unit and a digital signal generation unit.
MOUE (US PgPub No. 20200260034) teaches a solid-state image pick-up device of the includes a pixel array unit obtained by disposing a plurality of unit pixels, each of which includes a photoelectric conversion unit, in a matrix form, an amplifier unit that adjusts a level of a pixel signal output from a unit pixel through a vertical signal line provided to correspond to column arrangement of the pixel array unit, a sample and hold unit that samples and holds a pixel signal passing through the amplifier unit, and an analog-digital conversion unit that converts the pixel signal output from the sample and hold unit into a digital signal.
Nakamura (US PgPub No. 20220247958) teaches a photoelectric converter includes a structure in which a first substrate and a second substrate are stacked, wherein a pixel array including a plurality of pixels is arranged on the first substrate, and at least part of a sample-and-hold circuit configured to sample and hold a signal output from the pixel array is arranged on the first substrate, and wherein at least part of a delta-sigma AD converter configured to convert an analog signal output from the sample-and-hold circuit into a digital signal is arranged on the second substrate.
NASU (US PgPub No. 20240107190) teaches an analog-to-digital conversion (ADC) unit that performs analog to digital conversion using delta-sigma modulation on an image signal output from pixels.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Usman A Khan whose telephone number is (571)270-1131. The examiner can normally be reached on M - Th 5:30 AM - 2 PM, F 5:30 AM - Noon.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached on (571)272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Usman Khan
/USMAN A KHAN/Primary Examiner, Art Unit 2637
08/26/2026
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