Prosecution Insights
Last updated: July 17, 2026
Application No. 19/188,585

SYSTEMS AND METHODS FOR TESTING UNIVERSAL SERIAL BUS DEVICES

Non-Final OA §103§112
Filed
Apr 24, 2025
Priority
Apr 25, 2024 — provisional 63/638,532
Examiner
PATEL, JIGAR P
Art Unit
Tech Center
Assignee
Meta Platforms Technologies LLC
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
1y 10m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
471 granted / 589 resolved
+20.0% vs TC avg
Strong +17% interview lift
Without
With
+16.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
8 currently pending
Career history
605
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
86.5%
+46.5% vs TC avg
§102
7.5%
-32.5% vs TC avg
§112
2.1%
-37.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 589 resolved cases

Office Action

§103 §112
DETAILED ACTION This communication is responsive to the application, filed April 24, 2025. Claims 1-20 are pending in this application. Examined under the first inventor to file provisions of the AIA The present application was filed on April 24, 2025, which is on or after March 16, 2013, and thus is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1 and 11 recite “a USB connector for removably coupling with a first peripheral device, the USB connector including a first set of pins and a second set of pins,” but it does not clearly identify what the claimed pin sets are, or how those sets are structurally distinct from the ordinary USB-C pin arrangement disclosed in the specification. As a result, it is unclear whether the “first set” and “second set” refer to distinct structural pin groups, opposite orientation rows, or merely a functional way of describing the same connector contacts, such that the metes and bounds of the claim are not reasonably certain. The claim is further indefinite because it recites the pin sets in purely functional terms in connection with “digitally switch[ing] between using the first set of pins and the second set of pins,” without clearly tying that switching language to a definite structural relationship between the claimed pin sets. Accordingly, one of ordinary skill in the art would not be able to determine the scope of the claimed connector limitation with reasonable certainty. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6-14, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Gregg et al. (US 10,613,952 B1) in view of Critz et al. (US 2025/0210891 A1). As per claim 1: An electronic device for facilitating communication between Universal Serial Bus Type-C devices, comprising: Gregg teaches [col. 3, lines 1-22] an electronic device for facilitating communication between a host device and a peripheral device because Gregg’s multi-port communications switch is expressly used to connect and test USB Type-C devices and to emulate connector flip while maintaining communication through appropriate pin mappings. a first Universal Serial Bus (USB) port for removably coupling with a host device; Gregg further teaches [col. 4, lines 1-31] a first Universal Serial Bus (USB) port for removably coupling with a host device in the form of a first USB Type-C port of the multi-port switch. at least one integrated circuit configured to digitally switch between using the first set of pins and the second set of pins to enable a communication between the host device and the first peripheral device. Gregg further teaches at least one integrated circuit configured to digitally switch between using the first set of pins and the second set of pins to enable communication between the host device and the first peripheral device because Gregg discloses a flip controller and switching fabric that couples the pins of a first port to the pins of a second port according to a selected flip mode, thereby emulating alternate connector orientations while preserving communication. a USB connector for removably coupling with a first peripheral device, the USB connector including a first set of pins and a second set of pins; and Gregg also teaches a USB connector for removably coupling with a first peripheral device in the form of a second USB Type-C port of the multi-port switch. Gregg additionally teaches that the USB connector includes a first set of pins and a second set of pins because Gregg expressly identifies the USB Type-C pin groups associated with the two connector orientations, including corresponding CC, superspeed transmit/receive, and SBU pins. Gregg does not explicitly disclose the claimed device in the particular form of a host-facing USB connector assembly and peripheral-facing USB connector assembly as arranged in an adapter-style USB Type-C implementation, Critz teaches such connector structure. Critz discloses [Fig. 11; 0113] a USB connector assembly including a host USB connector port, a plurality of spring contacts arranged in two rows of twelve contacts for a total of twenty-four contacts corresponding to a USB Type-C connector, and a pin layout and pin functionality of a USB Type-C specification connector shown in Figure 11. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Gregg’s multi-port communications switch to employ the host/peripheral USB Type-C connector assembly arrangement taught by Critz because Critz provides a known USB Type-C connector implementation with full Type-C pin functionality suitable for high-speed data, power delivery, and alternate-mode communication, and such a modification would have predictably yielded a USB Type-C switching device having explicit host-side and peripheral-side connector structure while preserving Gregg’s digital flip-emulation and pin-routing functionality [Critz; 0113]. As per claim 2: The electronic device of claim 1, wherein the first USB port includes a USB Type-C (USB-C) port and the USB connector includes a USB-C connector. Critz discloses [Fig. 11; 0113] a USB Type-C port and the pin layout of a USB Type-C connector, including pins A1-A12 on the top row and B12-B1 on the bottom row. As per claim 3: The electronic device of claim 1, wherein the first peripheral device includes a mixed reality headset. Critz discloses [0089] communication interface may be used to communicate with certain peripheral devices, such as VR/AR headsets. As per claim 4: The electronic device of claim 3, wherein the at least one integrated circuit is further configured to monitor DisplayPort Alternate Mode (DP Alt Mode) on the mixed reality headset. Critz discloses [0113] the USB Type C connector circuit also features shielded differential pairs, which could be RX pair in DisplayPort alternate mode, and two high speed data receiver pairs, which could by RX pairs in DP alternate mode. As per claim 6: The electronic device of claim 1, wherein the at least one integrated circuit is further configured to perform at least one of current and voltage sensing. Critz discloses [0102-0104] an integrated circuit to perform voltage regulation, voltage supervision, and undervoltage protection. It may also include to allow dynamic voltage scaling. As per claim 7: The electronic device of claim 1, wherein the at least one integrated circuit is further configured to perform USB Power Delivery (PD) protocol analysis. Critz discloses [0113] the CC pins can be used for USB power delivery communication. As per claim 8: The electronic device of claim 1, further comprising: a second USB port for removably coupling with a second peripheral device. Gregg discloses [Fig. 1; cols. 2-3] a multi-port communication switch with multiple ports with a presence of more than one port (second USB port) in a USB-C communication device. As per claim 9: The electronic device of claim 8, wherein the second USB port includes a passthrough port enabling the first peripheral device to draw power from the second peripheral device. Gregg discloses [col. 8, lines 30-46] a circuitry can be used to source power to devices to help avoid those devices running out of power. In some cases, one or more devices are plugged into the system. Gregg further discloses [col. 11, lines 1-4] effectively pass through to the ports of the devices. As per claim 10: The electronic device of claim 8, wherein the electronic device draws power from at least one of the host device and the second peripheral device. Gregg discloses [col. 8, lines 30-46] a circuitry can be used to source power to devices to help avoid those devices running out of power. In some cases, one or more devices are plugged into the system. As per claims 11-14 and 16-20: Although claims 11-14 and 16-20 are directed towards a method claim, they are rejected under the same rationale as the device claims 1-4 and 6-10 above. Claims 5 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Gregg in view of Critz and further in view of Ozen et al. (EP 3,486,792 A1). As per claim 5: The electronic device of claim 1, wherein the at least one integrated circuit is further configured to facilitate simultaneous universal asynchronous receiver-transmitter (UART) data transfer and at least one of USB 2 and USB 3 data transfer between the host device and the first peripheral device. Critz and Gregg disclose USB 2/3 data transfer between host device and peripheral device, but fail to explicitly disclose facilitating simultaneous UART data transfer and USB data transfer. Ozen discloses a similar system, which further teaches [Abstract] a circuitry for transmitting a UART data signal and a USB data signal, which comprises a connector configured to simultaneously receive a UART data signal and a first USB signal data signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Critz and Gregg with that of Ozen. One would have been motivated to facilitate simultaneous UART data and USB data transfer because it allows to operate as an interface between a device under test without UART connections and a monitoring device [Ozen; 0007-0008]. As per claim 15: Although claim 15 is directed towards a method claim, it is rejected under the same rationale as the device claim 5 above. Conclusion The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c). · US 2021/0349518 A1 – Cueva discloses computing device controlling power consumption by determining an allocated power for the USB device connected through a USB port and includes issuing power information to a power delivery controller that is connected to a USB port. · US 2016/0112537 A1 – Foo discloses the hardware serial component connects the computing device to peripheral devices over a serial bus. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIGAR P PATEL whose telephone number is (571)270-5067. The examiner can normally be reached on Monday to Friday 10AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas, can be reached on 571-272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JIGAR P PATEL/Primary Examiner, Art Unit 2114
Read full office action

Prosecution Timeline

Apr 24, 2025
Application Filed
Jun 11, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+16.6%)
3y 1m (~1y 10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 589 resolved cases by this examiner. Grant probability derived from career allowance rate.

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