DETAILED ACTION
This office action is in response to Application 19/188,620 filed 4/24/2025 that claims priority to provisional application 63/647,407 field 5/14/2024.
Claims 1-20 have been examined.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-7, 9-12, 14-18, and 20 are rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102a)(2) as being anticipated by Reusswig (Reusswig et al., US 2018/0053562 A1).
Regarding claim 1, Reusswig teaches A system comprising: a memory sub-system (Reusswig [Abstract] teaches the inventive concepts are directed toward a non-volatile memory system for detecting read disturb in open blocks.) comprising a set of memory components; (Reusswig Fig. 1 and [0031] that discloses the memory device 100 is composed of a series of blocks where each block is an example of a memory component and each block is composed of word lines.) a processing device, operatively coupled to the set of memory components (Reusswig Fig. 2 and [0035] discloses statement machine 112 that provides die-level control of memory operations, thus is an example of a processing device, coupled to the memory blocks.)
and configured to perform empty page scan operations (Reusswig [0028] discloses a page that has all its bits in the erased condition is an open page. A word line is open if all memory cells connected to the word line are in (or supposed to be in) the erased condition and is closed if all pages in that wordline have been subject to programming.. And a block is an open block if one or more of the word lines in that block are closed and if one or more of the word lines in that block are open.)
comprising: detecting a condition for performing read disturb handling operations for a portion of the set of memory components; (Reusswig [0028] teaches a block is composed of wordlines which are composed of pages. Reusswig [0029] the system monitors for read disturb errors in cells connected to closed word lines in an open block (a portion of the set of memory components) and takes action to mitigate the errors.)
determining that the portion of the set of memory components corresponds to an open block; and in response to determining that the portion of the set of memory components corresponds to the open block, performing the empty page scan operations (Reusswig [0053] discloses a Erase audit scan module 238 detects read disturb in open blocks and takes action to mitigate the read disturb) relative to a last programmed word line (WL) of the open block. (Reusswig Fig. 9 and [0101]-[0102] discloses that the open word lines 872 to 866 may contain read disturb errors when an open wordline such as 866 is adjacent to a boundary wordline 864 that is the last programmed wordline in a group of wordlines 652 to 864. Thus the system will monitor for read disturb errors in open blocks 866 to 872 relative to the last programmed word line 864.)
Regarding claim 2, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches the operations comprising: determining that the last programmed WL corresponds to a boundary WL; and in response to determining that the last programmed WL corresponds to the boundary WL, selecting a target WL that is adjacent to the last programmed WL. (Reusswig Fig. 9 and [0028]-[0029], [0053], and [0101]-[0102] discloses that the open word lines 872 to 866 may contain read disturb errors when an open wordline such as 866 is adjacent to a boundary wordline 864 that is the last programmed wordline in a group of wordlines 652 to 864. Thus the system will monitor for read disturb errors in open blocks 866 to 872 relative to the last programmed word line 864. Reusswig. Fig. 11 and [0104] that discloses the open word line sensed in step 806 may be an open word line that is next to a boundary word line, the last open word line in a block.)
Regarding claim 3, Reusswig teaches the limitations of claim 2 above. Reusswig further teaches the operations comprising: accessing a next WL that follows the last programmed WL as the target WL. (Reusswig. Fig. 11 that is a flow chart of a process for detecting read disturb and migrating the effects of read disturb and [0104] that discloses the open word line sensed in step 806 may be an open word line that is next to a boundary word line, the last open word line in a block.)
Regarding claim 4, Reusswig teaches the limitations of claim 3 above. Reusswig further teaches wherein the target WL is associated with a plurality of subblocks, (Consistent with para [0017] of the instant application a subblock may be a page. Reusswig [0028] discloses a wordline may be one or multiple pages. Thus the plurality of subblocks may be the pages within the memory, a the target wordline is associated with the pages of memory.)
the operations comprising: selecting a random subblock from the plurality of subblocks; (Reusswig [0118] discloses in step 1104 the controller sends an page address for the read disturb (scrubbing) process. Reusswig [0104] disclose the sensing operation may be to a random word line. Thus when a wordline is a single page, Reusswig [0104] discloses selecting a random subblock from the plurality of subblocks (pages).) and performing the empty page scan operations on the random subblock. (Reusswig Fig. 15 steps 1105 through 1114 discloses the system reads the data, performs ECC correction on the data, and writes the updated data for the data that has been detected as displaying read disturb errors.)
Regarding claim 6, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches wherein the memory sub-system comprises a three-dimensional (3D) NAND storage device. (Reusswig [0060] discloses the memory device may be a 3D NAND memory device.)
Regarding claim 7, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches wherein the empty page scan operations comprise one or more NAND detect empty page (NDEP) scan operations. (Consistent with para [0016] of the instant application a NDEP scan operation is searching empty pages (or pages expected to be empty) to insure the data is still empty.) Reusswig [Abstract] teaches performing an operation for open word lines that contain pages to determine if an open/empty word like has errors and to correct the errors if found. Reusswig [0060] discloses the memory device may be a 3D NAND memory device. Thus the page scan is for one or more NAND empty/open pages and is an example of a NDEP scan operation.)
Regarding claim 9, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches the operations comprising: receiving a request to read a page from the open block; (Reusswig Fig. 12 and paras [0107]-[0109] discloses a process for reading that includes detecting read disturb errors and mitigating the effects of read disturb. See step 902 that discloses the process begins with a read instruction, and step 916 that is performed if the read request is to an open block.) and determining that the page in the open block corresponds to an empty page, (Consistent with para [0016] of the instant application an empty page is a page that has previously been erased. Reusswig [0028] discloses an open page is a page that has been erased, thus is an empty page. Thus Reusswig Fig. 12 and [0107]-[0109] discloses the page in the open block corresponds to an empty page.)
wherein the empty page scan operations are performed in response to determining that the page in the open block corresponds to the empty page. (Reusswig Fig. 12 step 918 where an erase audit scan (on open/empty pages) is performed at step 918 after determining it is an open block (i.e. the pages are open) at step 912.)
Regarding claim 10, Reusswig teaches the limitations of claim 9 above. Reusswig further teaches the operations comprising: refreshing the page in response to determining that the page fails the empty page scan operations. (Reusswig Fig. 12 and [0107]-[0109] discloses the system protects the data at step 918 where the erase audit scan is detailed with respect to fig. 14 which ads the block to a scrub queue at step 1014 that is processed per Fig. 15 that reprograms (refreshes) a word line at step 1114.)
Regarding claim 11, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches wherein detecting the condition comprises determining that a number of read operations performed on the portion of the set of memory components transgresses a read threshold count value. (Reusswig Fig. 12 step 19 that discloses determining if a number of open block read counter is > threshold at step 916.)
Regarding claim 12, Reusswig teaches the limitations of claim 11 above. Reusswig further teaches wherein the read threshold count value is associated with each memory component in the set of memory components. (Reusswig [0053] that discloses the open block read counter uses an open block read counter 236 that is a software module or dedicated hardware circuit used to count how many times each block (or each wordline) has been subjected to an open block read operation, thus is associated with each memory word line in the set of memory components..)
Regarding claim 14, Reusswig teaches the limitations of claim 1 above. Reusswig further teaches the operations comprising: in response to detecting the condition, determining that a page being read corresponds to a programmed page; (Reusswig Fig. 9 and [0028]-[0029], [0053], and [0101]-[0102] discloses that the open word lines 872 to 866 may contain read disturb errors when an open wordline such as 866 is adjacent to a boundary wordline 864 that is the last programmed wordline in a group of wordlines 652 to 864.)
and selecting a set of WLs for checking a read bit error rate associated with the page. (Reusswig [0110] discloses Fig. 13 that includes detecting read disturb and mitigating the effects includes measuring the bit error rate (BER) on a subset of word lines, typically closed (written) wordlines. )
Regarding claim 15, A method comprising: (Reusswig [0120] discloses the inventive concepts may be implemented in an embodiment that is a method of operating non-volatile storage.)
The remainder of claim 15 recites limitations of claim 1 above and thus is rejected based on the teaching and rationale of claim 1 above.
Regarding claim 16, Reusswig teaches all of the limitations of claim 15 above.
The remainder of claim 16 recites limitations of claim 2 above and thus is rejected based on the teaching and rationale of claim 2 above.
Regarding claim 17, Reusswig teaches all of the limitations of claim 16 above.
The remainder of claim 17 recites limitations of claim 3 above and thus is rejected based on the teaching and rationale of claim 3 above.
Regarding claim 18, Reusswig teaches all of the limitations of claim 17 above.
The remainder of claim 16 recites limitations of claim 4 above and thus is rejected based on the teaching and rationale of claim 4 above.
Regarding claim 20, Reusswig taches A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: (Reusswig [0038] discloses a ROM 122 a contains code such as a set of instructions and a processor 122 operable to execute the instructions read only memory (ROM) is an example of non-transitory computer-readable storage medium.)
The remainder of claim 20 recites limitations of claim 1 above and thus is rejected based on the teaching and rationale of claim 1 above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5, 8, 13, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Reusswig (Reusswig et al., US 2018/0053562 A1) as detailed in claim 1 and 15 above
and further in view of Sharifi (Sharifi Tehrani et al., US 2022/0334751 A1 of Micron).
Regarding claim 5, Reusswig teaches the limitations of claim 4 above. Reusswig further teaches the operations comprising: obtaining a list of mandatory WLs; (Examiner notes the instant application does not explicitly define a mandatory WL. Consistent with para [0021] of the instant application, Examiner has interpreted a mandatory WL as a list of wordlines that the system may perform a scan operation on, where a scan is a process of performing read disturb error recovery which would include the open wordlines of Reusswig Fig. 9 and para [0101]-[0101].)
However, Reusswig does not explicitly disclose selecting an additional random subblock from an additional plurality of subblocks associated with an individual WL of the list of mandatory WLs; and performing the empty page scan operations on the additional random subblock.
Sharifi, of a similar field of endeavor, further discloses selecting an additional random subblock from an additional plurality of subblocks associated with an individual WL of the list of mandatory WLs; and performing the empty page scan operations on the additional random subblock. (Sharifi [0041] discloses selecting a page (or word line or another subdivision of memory) that corresponds to a random number for an data integrity scan such as a read , which would include a read disturb scan. The solution of Reusswig in view of Sharifi would perform a read disturb scan on a random page in the open wordlines of Reusswig to select and verify the data integrity of open data block pages that might not be adjacent to the previously programmed blocks of Reusswig but still might suffer from read disturb errors)
Reusswig and Sharifi are in a similar field of endeavor as both relate to discovering and correcting read disturb errors. Thus it would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention to incorporate selecting a random page for read disturb processing as identified by Reusswig that manages read disturb on open blocks for blocks that are immediately adjacent to the last programmed blocks. Thus combining prior art elements according to known devices to yield predictable results (to enable the system to detect and correct read disturb errors in open blocks that are not the most likely to have read disturb errors but may nonetheless experience read disturb errors, thus improving/reducing the error rate of the memory device.
Regarding claim 8, Reusswig teaches the limitations of claim 7 above. Reusswig further teaches and wherein a second of the NDEP scan operations is associated with selection of a WL adjacent to a boundary WL for performing the NDEP scan operations. (Reusswig Fig. 9 and [0028]-[0029], [0053], and [0101]-[0102] discloses that the open word lines 872 to 866 may contain read disturb errors when an open wordline such as 866 is adjacent to a boundary wordline 864 that is the last programmed wordline in a group of wordlines 652 to 864. Thus the system will monitor for read disturb errors in open blocks 866 to 872 relative to the last programmed word line 864. Reusswig. Fig. 11 and [0104] that discloses the open word line sensed in step 806 may be an open word line that is next to a boundary word line, the last open word line in a block.)
Reusswig [0104] teaches a random open word line or a word line next to the last open word line. But does not explicitly selecting one of each. Thus does not explicitly disclose wherein a first of the NDEP scan operations is associated with selecting a random WL from a list of random empty mandatory WLs,
Sharifi, of a similar field of endeavor, further teaches wherein a first of the NDEP scan operations is associated with selecting a random WL from a list of random empty mandatory WLs, (Sharifi [0041] discloses selecting a page (or word line or another subdivision of memory) that corresponds to a random number for an data integrity scan such as a read , which would include a read disturb scan. The solution of Reusswig in view of Sharifi would perform a read disturb scan on a random page in the open wordlines of Reusswig to select and verify the data integrity of open data block pages that might not be adjacent to the previously programmed blocks of Reusswig but still might suffer from read disturb errors. Thus the solution of Reusswig and Sharifi would perform both a first scan operation selecting a random WL from the open (i.e. mandatory) WL entries, and specifically perform an additional scan to detect correct read disturb errors in an open block adjacent to a boundary WL.)
The motivation to combine Sharifi into Reusswig is the same as set forth in claim 5 above.
Regarding claim 13, Reusswig teaches the limitations of claim 12 above. Reusswig further teaches wherein the read threshold count value is adjusted based on a program erase count value of each memory component in the set of memory components, (Reusswig [0104] discloses period for determining the minimum number of open block read operations can be bound by the number of program-erase cycles. Thus determining a number of read operations performed on the memory components that transgresses a read threshold count value is dependent on the period for counting the open blocks and the read threshold count value is adjusted based on a program erase count, given the erase count would be proportional to the period.)
However Reusswig does not explicitly teach the read disturb handling operations comprise probabilistic read disturb handling operations for checking whether programmed pages in blocks are below a threshold limit.
Sharifi further teaches the read disturb handling operations comprise probabilistic read disturb handling operations for checking whether programmed pages in blocks are below a threshold limit (Sharifi [0036]-[0037] discloses the system implements a probabilistic read disturb mitigation scheme by selecting a random supplement memory location in memory unit 210. Sharifi [00047] discloses the supplemental memory location may be used to determine the error rate at step 335 of Fig. 3 which is compared to an error rate threshold value, thus determines whether programmed pages in blocks are below a threshold limit.)
The motivation to combine Sharifi into Reusswig is the same as set forth in claim 5 above.
Regarding claim 19, Reusswig teaches all of the limitations of claim 18 above.
The remainder of claim 19 recites limitations of claim 5 above and thus is rejected based on the teaching and rationale of claim 5 above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANICE M. GIROUARD whose telephone number is (469)295-9131. The examiner can normally be reached M-F 9:30 - 7:30.
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/JANICE M. GIROUARD/Primary Examiner, Art Unit 2138
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