DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The Information Disclosure Statement filed on April 28, 2025 has been considered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-13 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 of U.S. Patent No. 12,314,604 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because all the claimed limitations are transparently found in U.S. Patent No. 12,314,604 B2 with obvious wording variations. Take an example to compare claim 1 of pending Application with claim 1 of U.S. Patent No. 12,314,604 B2 in the following table.
Pending Application 19/191,842
U.S. Patent No. 12,314,604 B2
1. A memory device spaced apart from a host and configured to process data in a memory in conjunction with the host, the memory device comprising: processing unit configured to receive a command from the host, compress or decompress the data in response to the command, and manage an entry of the compressed data for each rank of the memory such that compression or decompression of data included in each rank is performed in parallel; and a buffer configured to store the data or the compressed data based on the entry.
1. A data processing apparatus spaced apart from a host and configured to process data in a memory in conjunction with the host, the data processing apparatus comprising: a near-memory processing unit configured to: receive a command from the host, compress or decompress the data in response to the command, generate, based on compressed data, an entry tree configured in a tree structure comprising top tree and bottom tree, wherein top tree is processed separately and the bottom tree comprise nodes as there are ranks to process data in parallel, manage an entry of the compressed data based on the entry tree; and a buffer configured to store the data or the compressed data based on the entry.
As shown in table above, claim 1 of U.S. Patent No. 12,314,604 B2 is narrower in scope, which covers all the claimed limitations as recited in claim 1 of pending Application 19/191,842, except italicized portions. However, claim 1 of U.S. Patent No. 12,314,604 B2 recites a data processing apparatus, which corresponds to a memory device and for each rank of the memory such that compression or decompression of data included in each rank is performed in parallel as recited in claim 1 of pending Application. Further, claim 1 of U.S. Patent No. 12,314,604 B2 defines an entry tree configured in a tree structure comprising top tree and bottom tree, wherein top tree is processed separately and the bottom tree comprise nodes as there are ranks to process data in parallel, and manage an entry of the compressed data based on the entry tree such that manage an entry of the compressed data for each rank of the memory such that compression or decompression of data included in each rank is performed in parallel. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize that both pending Application and U.S. Patent No. 12,314,604 B2 are not patentably distinct from each other.
The claimed limitations of claims 2-13 are also covered by claims 1-12 of U.S. Patent No. 12,314,604 B2 such that claims 2-13 are also rejected.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1-2 and 8-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dye et al. (WO 01/80016 A2 as provided in IDS filed 4/28/2025).
Regarding claim 1. Dye discloses a memory device (figure 3, 200) spaced apart from a host (figure 3, 100) and configured to process data in a memory (figure 3, 300) in conjunction with the host, the memory device comprising: processing unit (figure 3, 250) configured to receive a command from the host, compress or decompress the data in response to the command (page 15 line 6 through page 16 line 2, compactor chip aces as a compression and decompression co-processor configured to substantially all data transfers from host), and manage an entry of the compressed data for each rank of the memory such that compression or decompression of data included in each rank is performed in parallel (figure 17, page 18 lines 7-10 and page 29 lines 30-36, the compress cache manager, the compress disk manager and the C-DIMM driver are added to the operating system to enable for maximum performance and each compressed cache may include a cache tree and one or more cache entry including header, cache block pointer and compressed cache block); and a buffer configured to store the data or the compressed data based on the entry (page 15 lines 21-30, data is preferably compressed by the compactor chip in response to the page write into C-DIMM aperture and write the compressed page to the compressed cache memory area).
Regarding claim 2, Dye discloses that the command comprises a swap-in command or a swap-out command with respect to the data or the compressed data stored in the buffer (page 26 liens 7-33 and page 28 line 9 through col. 29 line 24, compress data and store the compressed data in the system memory including a swap read request).
Regarding claim 8, Dye discloses that the near-memory processing unit is further configured to, in response to a swap-in command being received from the host, set a swap-in parameter based on the swap-in command, retrieve the compressed data based on the swap-in parameter, decompress the compressed data, and output the decompressed data to a predetermined memory area (page 29 lines 9-23, the C-DIMM driver reads the compressed pages and writes them to memory on the compactor chip, instructs the compactor chip to decompress the compressed page, and then moves the decompressed pages to an active page region of system memory).
Regarding claim 9, Dye discloses that the near-memory processing unit is further configured to retrieve the compressed data based on a type of the compressed data and an offset of the compressed data (page 29 line 30 through page 30 line 18, each cache entry may be stored and retrieved from the compressed cache based on a unique cache address that is extracted from a 64-bit starting offset and 64-bit length stored in an incoming read or write request, and a compressed cache may be attached to one or more device objects as specified by the user based on input from a configuration utility).
Regarding claim 10-11, Dye discloses that the near-memory processing unit is further configured to decompress the compressed data based on a decompression option of the compressed data included in the swap-in parameter, wherein the near-memory processing unit is further configured to delete an entry corresponding to the decompressed data from an entry tree (page 20 lines 1-23 and page 34 lines 7-11, a decompression operation of the compressed page may be invoked by a call from the compressed disk manager when disk access of compressed pages has finished by indication from the disk driver, and a cache flush operation is provided for flushing the compressed cache).
Regarding claim 12, Dye discloses that the near-memory processing unit is further configured to store the data or the decompressed data in a near memory area (page 28 lines 10-25, a compactor chip may decompress compressed pages before the pages are stored to nonvolatile memory).
Regarding claim 13, the limitations of the claim are rejected as the same reasons as set forth in claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Dye et al. (WO 01/80016 A2 as provided in IDS filed 4/28/2025) in view of Kim et al. (EZSWAP: Enhanced Compressed Swap Scheme for Mobile Devices as provided in IDS filed 4/23/2024, hereinafter Kim).
Regarding claims 4-5, Dye teaches buffers may be pre-allocated for compressed cache writeback use (page 40 lines 22-26). Dye differs from the claimed invention in not specifically disclosing that the buffer comprises an input buffer and an output buffer, and the near-memory processing unit is further configured to receive information on data stored in the input buffer from the host and read the data from the input buffer, and write the data to the output buffer and output information on the written data to the host, wherein the near-memory processing unit is further configured to, in response to a swap-out command being received from the host, set a swap-out parameter based on the swap-out command, determine whether to compress data based on the swap-out parameter, allocate an area to store the compressed data, and update the entry based on the swap-out parameter and the area. However, Kim teaches to read file blocks from the storage to the allocated buffer pages and the block of I/O operation will be forward to the buffer cache layer when all the required file blocks are stored, and SA determines whether the ezswap accepts a swap-out page in the pool based on its estimated compression ratio, probability of reuse, and eviction cost (pages 139683-139684, description of figure 4) in order to maximize memory efficiency. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention in modify Dye in having that the buffer comprises an input buffer and an output buffer, and the near-memory processing unit is further configured to receive information on data stored in the input buffer from the host and read the data from the input buffer, and write the data to the output buffer and output information on the written data to the host, wherein the near-memory processing unit is further configured to, in response to a swap-out command being received from the host, set a swap-out parameter based on the swap-out command, determine whether to compress data based on the swap-out parameter, allocate an area to store the compressed data, and update the entry based on the swap-out parameter and the area, as per teaching of Kim, in order to maximize memory efficiency.
Regarding claim 6, Dye discloses that the swap-out parameter comprises a type of the data, an offset of the data, and whether to compress the data (page 29 line 30 through page 30 line 18, each cache entry may be stored and retrieved from the compressed cache based on a unique cache address that is extracted from a 64-bit starting offset and 64-bit length stored in an incoming read or write request, and a compressed cache may be attached to one or more device objects as specified by the user based on input from a configuration utility).
Regarding claim 7, Dye differs from the claimed invention in not specifically teaching that the near-memory processing unit is further configured to generate the entry based on an address of the area, a type of the data, and an offset of the data, and update the entry by inserting the entry into an entry tree. However, Kim teaches to generate the entry based on an address of the area, a type of the data, and an offset of the data, and update the entry by inserting the entry into an entry tree (page 18 lines 7-10 and page 29 lines 30-36, the compress cache manager, the compress disk manager and the C-DIMM driver are added to the operating system to enable for maximum performance and each compressed cache may include a cache tree and one or more cache entry including header, cache block pointer and compressed cache block). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention in modify Dye in having that the near-memory processing unit is further configured to generate the entry based on an address of the area, a type of the data, and an offset of the data, and update the entry by inserting the entry into an entry tree, as per teaching of Kim, in order to maximize memory efficiency.
Allowable Subject Matter
Claim 3 would be allowable if rewritten to overcome the double patenting rejection, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach nor suggest “wherein the processing unit is further configured to generate, based on the compressed data, an entry tree configured in a tree structure comprising top tree and bottom tree, wherein top tree is processed separately and the bottom tree comprise nodes as there are ranks to process data in parallel, and manage the entry based on the entry tree” as recited in claim 3.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wang et al. (US 11,687,236 B2) discloses a method including receiving a block of data to store on at least one physical disk; determining whether to store the data in a data log as uncompressed or compressed data based on a determined size of resulting compressed data (abstract and figure 2).
Park (US 2025/0123746 A1) discloses a memory system including an external memory device and a first memory processing unit of a main memory device, and the first memory processing unit may load the compressed data, decompress the compressed data to obtain decompressed data, and store the decompressed data in a main memory of the main memory device ([0005]-[0019]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHUO H LI whose telephone number is (571)272-4183. The examiner can normally be reached Mon. Tue. and Thurs. 8:00-4:00 PM.
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/ZHUO H LI/Primary Examiner, Art Unit 2133
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