DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 3-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Species B, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 4/30/2026.
Applicant's election with traverse of Species A drawn to claims 1, 2 and 13-16 in the reply filed on 4/30/2026 is acknowledged. The traversal is on the ground(s) that the various species/subspecies/sub-subspecies set forth in the Requirement are not patentably distinct and share common technical features such that a single search and examination would be appropriate. This is not found persuasive because each Species disclose different schematic top views of display panels. Species A includes pixel groups and a multiplexer, whereas Species B does not. These distinctions cause a search and examination burden.
The requirement is still deemed proper and is therefore made FINAL.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 13 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Pub. No. 2019/0123066 A1 to Zhan et al.
As to claim 1, Zhan discloses a display panel, comprising:
a first trace area (Fig. 2, paragraph 0043, where wiring area (2023) is the trace area);
a first display area at least half-surrounding the first trace area (Fig. 2, paragraph 0043, display area (203));
connection data lines, wherein one of the connection data lines comprises a first portion and a second portion electrically connected to each other, the first portion located in the first trace area, and the second portion located in the first display area (Fig. 2, paragraphs 0045-0053, where data lines (1-18) include first and second portions located in trace area (2023) and display area (203)); and
pixel column groups located in the first display area, wherein one of the pixel column groups comprises at least two pixel columns, and one of the pixel columns is electrically connected to two connection data lines (Fig. 2, paragraph 0046, where sub-pixels (209) are in display area (203));
wherein the pixel column groups comprise adjacent first pixel column group and second pixel column group, and the connection data lines comprise first connection data lines corresponding to the first pixel column group and second connection data lines corresponding to the second pixel column group (Fig. 2, paragraphs 0045-0046, where first data lines (205) and second data lines (208) connect to sub-pixels (209)),
wherein the first portions of the first connection data lines and the first portions of the second connection data lines are located in different layers (Fig. 5 and 6, paragraph 0065, where first and second data lead lines (51, 52) are on different layers).
As to claim 2, Zhan discloses the display panel, wherein in a thickness direction of the display panel, the first portions of the first connection data lines and the first portions of the second connection data lines overlap each other (Fig. 5 and 6, paragraph 0065, where first and second lead lines (51, 52) overlap each other).
As to claim 13, Zhan discloses the display panel, wherein the second portions of the connection data lines are located in a same layer (Fig. 5 and 6, paragraph 0065, where second lead lines (52) are in the same layer).
As to claim 16, Zhan discloses limitations similar to claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. No. 2019/0123066 A1 to Zhan et al. in view of U.S. Patent Pub. No. 2014/0092076 A1 to Lee.
As to claim 14, Zhan discloses the display panel, further comprisinga non-display area located at least on one side of the first display area (Fig. 2, paragraph 0043, non-display area (202)).
Zhan is deficient in disclosing a multiplexer located in the non-display area, wherein one end of one of the second portions is electrically connected to the multiplexer.
However, Lee discloses the non-display area, wherein one end of one of the second portions is electrically connected to the multiplexer (Fig. 2, paragraph 0029, where data lines (DL) are connected to MUX (140) in a non-display area).
At the time of filing, it would have been obvious to a person of ordinary skill in the art to have modified then display panel as taught by Zhan by including a multiplexer connected to the display panel in a non-display area as taught by Lee. The suggestion/motivation would have been in order to reduce the number of integrated chips provided by allowing a compensation circuit built in the data driver (Lee, Abstract).
As to claim 15, Zhan is deficient in disclosing the display panel, wherein the multiplexer is a 1:n multiplexer, where n≥4.
However, Lee discloses the display panel, wherein the multiplexer is a 1:n multiplexer, where n≥4 (Fig. 2, paragraph 0036, where MUX (140) is a 1:N multiplexer, where N is a natural number). In addition, the same motivation is used as claim 14.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANEETA YODICHKAS whose telephone number is (571)272-9773. The examiner can normally be reached Monday-Friday 9-5.
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ANEETA YODICHKAS
Primary Examiner
Art Unit 2627
/ANEETA YODICHKAS/
Primary Examiner, Art Unit 2627
