Prosecution Insights
Last updated: October 21, 2026
Application No. 19/196,491

PROTECTION METHOD FOR POWER CONVERSION CIRCUIT, POWER CONVERSION APPARATUS, AND STORAGE MEDIUM

Non-Final OA §102
Filed
May 01, 2025
Priority
Nov 08, 2022 — continuation of PCTCN2022130499
Examiner
HAMMOND, CRYSTAL L
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ecoflow Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
822 granted / 936 resolved
+19.8% vs TC avg
Minimal +3% lift
Without
With
+3.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
6 currently pending
Career history
946
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
38.3%
-1.7% vs TC avg
§102
53.4%
+13.4% vs TC avg
§112
2.2%
-37.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 936 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-10 are rejected under 35 U.S.C. 102(a)(1)as being anticipated by Maeda JP 2011-023594A. Maeda discloses a protection method for a power conversion circuit, comprising: (1) regarding Claim 1: calculating an attenuation amount of conversion efficiency of the power conversion circuit within a preset duration when the power conversion circuit is in a steady state (Example 3, step 310 “the efficiency monitoring value of the power conversion circuit is calculated based on the detected input voltage, output voltage, input current, and output current); monitoring the attenuation amount based on a preset attenuation threshold (ex 2 step, 270; ex 3 step 370-“the state of the input adjustment circuit is determined based on the deviation of the current voltage drop”/”the state of the power conversion circuit is determined based on the current efficiency deviation”), and obtaining a duration for which the attenuation amount is greater than the preset attenuation threshold (ex 2, steps 230-250-“it is determined whether or not the current voltage drop deviation is the first calculated voltage drop deviation…the deviation of the current voltage drop is stored as the basic deviation); and performing a preset protection operation when the duration is greater than a preset protection duration (ex 2, step 280; ex 2 step 380-“information is reported and the current limit point is down-regulated based on the state of the input adjustment circuit.”). (2) regarding Claim 2: wherein before calculating the attenuation amount of conversion efficiency of the power conversion circuit within the preset duration when the power conversion circuit is in the steady state, the method further comprises: calculating current conversion efficiency of the power conversion circuit based on an input power and an output power of the power conversion circuit (Ex 3, step 310); calculating a real-time efficiency deviation based on historical conversion efficiency and the current conversion efficiency, wherein the historical conversion efficiency is conversion efficiency detected last time (Ex 3, step 320); monitoring the real-time efficiency deviation based on a preset deviation threshold (Ex 3, step 330), and obtaining a first duration for which the real-time efficiency deviation is less than the preset deviation threshold (Ex 1 step 110-120); and determining that the power conversion circuit is in the steady state when the first duration reaches a preset steady-state duration (Ex 1 step 110-120). (3) regarding Claim 3: wherein monitoring the real-time efficiency deviation based on the preset deviation threshold, and obtaining the first duration for which the real-time efficiency deviation is less than the preset deviation threshold comprise: monitoring the real-time efficiency deviation (ex 3, step 330); accumulating the first duration if it is monitored that the real-time efficiency deviation is less than the preset deviation threshold (Ex 2, steps 230-240); and resetting the first duration if it is monitored that the real-time efficiency deviation is greater than or equal to the preset deviation threshold (Ex 2, steps 230-240). (4) regarding Claim 4: wherein after obtaining the first duration for which the real-time efficiency deviation is less than the preset deviation threshold, the method further comprises: determining that the power conversion circuit is in an unsteady state when the first duration does not reach a preset steady-state duration (Ex 1 general description). (5) regarding Claim 5: wherein calculating the attenuation amount of conversion efficiency of the power conversion circuit within the preset duration when the power conversion circuit is in the steady state comprises: calculating a difference between current conversion efficiency of the power conversion circuit and conversion efficiency before the preset duration, to obtain the attenuation amount (Ex 3, step 320). (6) regarding Claim 6: wherein: when a duration for which the power conversion circuit is in the steady state is less than a target duration threshold, the preset duration is the duration for which the power conversion circuit is in the steady state (Ex 1, general description); and when the duration for which the power conversion circuit is in the steady state is greater than or equal to the target duration threshold, the preset duration is the target duration threshold (Ex 1, general description). (7) regarding Claim 7: wherein calculating the attenuation amount of conversion efficiency of the power conversion circuit within the preset duration when the power conversion circuit is in the steady state comprises: collecting the conversion efficiency of the power conversion circuit based on a preset collection interval when the power conversion circuit enters the steady state (Ex 3, step 310); storing the conversion efficiency into a queue with a preset capacity based on a collection sequence (Ex 1, general description); and calculating a difference between head data and tail data of the queue to obtain the attenuation amount, wherein the preset duration is a duration between a time when the head data is collected and a time when the tail data is collected (Ex 1, general description). (8) regarding Claim 8: wherein storing the conversion efficiency into the queue with the preset capacity based on the collection sequence comprises: performing a dequeuing operation on the head data of the queue when the queue is full, and storing currently collected conversion efficiency in the queue as the tail data (Ex 1, general description); and storing the currently collected conversion efficiency in the queue as the tail data when the queue is not full (Ex 1, general description). (9) As to Claims 9 and 10 these claim differs from claims 1-8 only in that claims 1-8 are method claim whereas claims 9 and 10 are apparatus and computer program implementing method. Thus Claims 9 and 10 are analyzed as previously discussed with respect to claims 1-8 above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRYSTAL L HAMMOND whose telephone number is (571)270-1682. The examiner can normally be reached M-F 12pm-4pm Alt Fridays. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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Prosecution Timeline

May 01, 2025
Application Filed
Sep 30, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
91%
With Interview (+3.1%)
1y 12m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 936 resolved cases by this examiner. Grant probability derived from career allowance rate.

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