DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lu (US 2006/0076984).
Regarding claim 1, fig. 2F and 3 of Lu discloses a circuit, including: an input node [220] configured to receive an input signal [DI]; a timer circuit [fig. 2F] configured to start running in response to detection of an edge in said input signal and to stop running in response to expiration of a debouncing time interval (fig. 3 shows where timer starts running but signal is only passed through to DO when B is triggered after a certain time period of running); and an output node [260] configured to produce an output signal [DO]; wherein said input signal is passed from said input node to said output node while said timer circuit is not running; and wherein said output signal is prevented from changing value while said timer circuit is running.
Regarding claim 2, fig. 2F and 3 of Lu discloses wherein said timer circuit includes a counter circuit [e.g. 244, 248] configured to start counting in response to the detected edge in said input signal and to stop counting in response to a count number of the counter circuit reaching a threshold value corresponding to the debouncing time interval.
Regarding claim 14, this claim is merely a method to operate the circuit having structure recited in claim 1. Since Lu above teaches the structure, the method to operate such a circuit is similarly disclosed.
Claim(s) 1, 2, and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Konecny (US 2011/0157922).
Regarding claim 1, fig. 8A and 8B of Konecny discloses a circuit, including: an input node configured to receive an input signal [IN]; a timer circuit [fig. 8A] configured to start running in response to detection of an edge in said input signal and to stop running in response to expiration of a debouncing time interval (fig. 8B shows where timer starts running when IN is triggered but subsequent glitches are not propagated to OUT until a certain time period has passed); and an output node configured to produce an output signal [OUT]; wherein said input signal is passed from said input node to said output node while said timer circuit is not running; and wherein said output signal is prevented from changing value while said timer circuit is running.
Regarding claim 2, fig. 8A and 8B of Konecny discloses wherein said timer circuit includes a counter circuit [e.g. set by delay in generating IN UP DEL] configured to start counting in response to the detected edge in said input signal and to stop counting in response to a count number of the counter circuit reaching a threshold value corresponding to the debouncing time interval.
Regarding claim 14, this claim is merely a method to operate the circuit having structure recited in claim 1. Since Lu above teaches the structure, the method to operate such a circuit is similarly disclosed.
Allowable Subject Matter
Claims 3-13 and 15-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Jayakumar describes an accurate and reliable digital PLL lock indicator. Christie describes a transistor overcurrent detection device. Tran describes multimedia control for a computing device.
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/SIBIN CHEN/Primary Examiner, Art Unit 2836
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