DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 10/24/2025 and 4/16/2026 were filed in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
1: Claim(s) 1-6, 8, 10 and 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2001/0030276 A1 Hoshino.
2: As for Claim 1, Hoshino depicts in Figure 4D and teaches in Paragraphs [0024-0027] an electronic device for a camera module having a housing forming a light-incident opening, comprising: a substrate (10 and 13) having a first side which is to be arranged in the housing (12 and 19) to face the light-incident opening (via lens 20), and a second side, which is opposite to the first side; and an image sensor (11), which has a light-sensitive portion (15), is designed as a flip chip (Paragraph [0026]), and is mounted to the second side and, wherein the substrate (10 and 13) is formed to be translucent (light transmissible board 10) at least in the area of the light-sensitive portion (15) of the image sensor (11).
3: As for Claim 2, Hoshino depicts in Figure 2 and teaches in Paragraph [0026] wherein, the substrate (10 and 13) comprises an opening (gap in layer 13) in the area of the light sensitive part (15) of the image sensor (11).
4: As for Claim 3, Hoshino depicts in Figure 2 wherein the substrate (10 and 13) comprises a step portion (step between layer 10 and 13 at the opening above 15) on the second side around the opening, and the image sensor (11) is attached to the step portion.
5: As for Claim 4, Hoshino depicts in Figure 2 further comprising a translucent element (10 and lens 20)), which covers the opening from the first side or is fitted into the opening.
6: As for Claim 5, Hoshino depicts in Figure 2 and teaches in Paragraph [0026] wherein the substrate (10 and 13) is formed of a translucent material (10).
7: As for Claim 6, Hoshino depicts in Figure 2 and teaches in Paragraph [0035] wherein the translucent material (10) has a light filtering property (IR cut filter).
8: As for Claim 8, Hoshino depicts in Figure 2 and teaches in Paragraph [0027] a sealing portion (17) arranged between the substrate (10 and 13) and the image sensor (11) and formed around entire circumference of the image sensor (11).
9: As for Claim 10, Hoshino depicts in Figure 2 A camera module, comprising: a housing (18 and 19) forming a light-incident opening (opening including lens 20); and an electronic device (11) according claim 1 arranged in the housing.
10: As for Claim 11, Hoshino depicts in Figure 4D and teaches in Paragraphs [0024-0027] A method for manufacturing an electronic device for a camera module (See Figure 4D) having a housing (19 and 18) forming a light-incident opening (Via lens 20), comprising the steps of: providing a substrate (10 and 13) having a first side (side facing lens 20), which is to be arranged in the housing (18 and 19) to face the light-incident opening, and a second side, which is opposite to the first side, providing an image sensor (11), which has a light-sensitive portion (15) and is designed as a flip chip (Paragraph [0026]), mounting the image sensor (11) to the second side; wherein the substrate (10 and 13) is formed to be translucent at least and in an area of a light-sensitive portion (15) of the image sensor 11).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11: Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2001/0030276 A1 Hoshino in view of US 2011/0194023 A1 Tam et al.
12: As for Claim 7, Hoshino teaches a camera module with an image sensor mounted to the bottom side of a substrate. However, does not teach wherein the substrate comprises a recess portion on the second side and the image sensor is mounted in the recess portion.
Tam et al teaches a camera module and depicts in Figure 5 and teaches in Paragraphs [0006 and 00019] providing a recess on the bottom side of a substrate to receive an image sensor. Furthermore, Tam et al teaches this construction is advantageous because it reduces the size of the camera module.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a recess on the bottom side of the substrate of Hoshino to receive the image sensor as taught by Tam et al in order to reduce the size of the camera module.
13: Claim(s) 9 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2001/0030276 A1 Hoshino in view of US 2025/0392801 A1 Hareyama.
14: As for Claim 9, Hoshino teaches a camera module with an image sensor connected to a circuit board substrate. However, does not teach wherein the substrate comprises through-holes in correspondence with contact points of the image sensor, and the through-holes are filled with contact material.
Hareyama depicts in Figure 5 and teaches in Paragraphs [0006, 0019 and 0028] wherein the substrate comprises through-holes in correspondence with contact points of the image sensor, and the through-holes are filled with contact material (21 and 22) in order to enable the image sensor to be connected to circuitry on the top side of the substrate.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the substrate of Hoshimo to include through-holes filled with contact material (21 and 22) as taught by Hareyama in order to enable the image sensor to be connected to circuitry on the top side of the substrate.
15: As for Claim 12, Hoshino in view of Hareyama teaches wherein the substrate comprises through-holes (21 and 22) in correspondence with contact points of the image sensor (11), and the step of mounting the image sensor (11) comprises a step of applying solder into the through-holes from the first side (multiple soldering methods are taught in Paragraph [0036] of Hoshino.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. WO 2016031332 A1 Ohara see Figure 15; USPN 6,342,406 B1 Glenn et al see Column 3, Lines 15-26 and Figure 2.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES M HANNETT whose telephone number is (571)272-7309. The examiner can normally be reached 8:00 AM-5:00 PM Monday thru Thursday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at 571-272-7406 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/JAMES M HANNETT/Primary Examiner, Art Unit 2639
JMH
September 14, 2026
Prosecution Insights