DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on May 2, 2025 and April 15, 2026 was are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
The drawings have been considered and accepted by the examiner.
Specification
The title, abstract, and specification have been considered and accepted by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6, 7, 10, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over US PGPub 2024/0231653 to Chen et al. (“Chen”) in view of US PGPub 2022/0050722 to Dugast et al. (“Dugast”).
Regarding claim 1, Chen discloses a memory management method, applied to a computing device, wherein the computing device comprises at least one expanded memory (see paragraph 45, memory capacity is expanded by adding different types of memory media), and the method comprises:
when detecting that a first expanded memory is connected, identifying a storage type of the first expanded memory, wherein the first expanded memory is one of the at least one expanded memory (see paragraph 45, the system determines a memory resource to be allocated based on the physical attributes of the resource);
when the first expanded memory is a dynamic random access memory (DRAM), managing the first expanded memory as a memory of a first NUMA node, wherein the first NUMA node is a node with a CPU (see fig. 3 and paragraphs 52 and 59, DRAM 220 with the processor 210 is referred to as NUMA node 1).
Chen also discloses using a SCM as expanded memory (see fig. 3 and paragraph 52) as a second NUMA node but does not disclose when the first expanded memory is PMEM or SCM, adding a second NUMA node and managing the first expanded memory as a memory of the second NUMA node, wherein the second NUMA node comprises no CPU. Dugast discloses a memory management system wherein DRAM is used as a local memory pool on the same NUMA node and slower memories such as persistent memories are used as a remote memory pool not connected to the CPU (see fig. 3 and paragraphs 39-43). It would have been obvious at the time the application was filed to a person of ordinary skill in the art to arrange the different types of memory in Chen as local or remote memories in Dugast in order to provide different service level arrangements using the different types of memory.
Regarding claim 11, the combination of Chen and Dugast renders obvious a computing device, comprising a processor and at least one expanded memory that performs the method of claim 1.
Regarding claim 6, the combination of Chen and Dugast renders obvious the method, wherein the first NUMA node is a NUMA node that is closes to the first expanded memory among NUMA nodes with CPUs (see paragraph 40 and fig. 3 of Dugast, the first NUMA node is the local memory pool).
Regarding claim 7, the combination of Chen and Dugast renders obvious the method, wherein after using the first expanded memory as the memory of the second NUMA node, the method further comprises: migrating cold data to the memory of the second NUMA node and migrating hot data to the memory of the NUMA node with the CPU (see paragraph 64, data can be migrated between the tiers based on access patterns).
Regarding claim 10, the combination of Chen and Dugast renders obvious the method, wherein the at least one expanded memory communicates data with a processor of the computing device through a CXL protocol (see paragraph 37 of Chen and paragraph 24 of Dugast).
Claims 2, 3, 12, 13, 16, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen and Dugast and further in view of US PGPub 2021/0133122 to Guyer.
As applied in the rejections above, the combination of Chen and Dugast renders obvious the method and device for using an expanded memory.
Regarding claims 2, 3, 12, and 13, Chen and Dugast do not disclose determining an address range of the first expanded memory and adding the address range to the memory of the first or second NUMA nodes. Guyer discloses managing a NUMA memory allocation wherein an address space is divided into a range and assigned to a memory component (see paragraph 42 of Guyer). It would have been obvious at the time the application was filed to a person of ordinary skill in the art to determine an address range for the first expanded memory and adding the address range to the memory of the NUMA nodes so the expanded memory can be addressed.
Regarding claim 16, Chen discloses a memory management method, applied to a computing device, wherein the computing device comprises a memory expander (see paragraph 45, memory capacity is expanded by adding different types of memory media), the memory expander is connected to at least two expanded memories (see fig. 1 and fig. 4, SCM and DRAM are connected), and the at least two expanded memories comprises a first expanded memory, the method comprising:
obtaining a storage type and a capacity of each expanded memory (see paragraph 45, the system determines a memory resource to be allocated based on the physical attributes of the resource).
when a storage type of the first expanded memory is a dynamic random access memory (DRAM), adding the first expanded memory as a memory of a first NUMA node, wherein the first NUMA node is a node with a CPU (see fig. 3 and paragraphs 52 and 59, DRAM 220 with the processor 210 is referred to as NUMA node 1).
Chen does not disclose obtaining at least two segments of address ranges corresponding to the at least two expanded memories and determining a first address range corresponding to the first expanded memory based on the at least two segments of address ranges and the capacities. Guyer discloses managing a NUMA memory allocation wherein an address space is divided into a range and assigned to a memory component (see paragraph 42 of Guyer). It would have been obvious at the time the application was filed to a person of ordinary skill in the art to determine an address range for the first expanded memory and adding the address range to the memory of the NUMA nodes so the expanded memory can be addressed.
Regarding claim 19, the combination of Chen and Guyer does not disclose wherein the first NUMA node is a NUMA node that is closes to the first expanded memory among NUMA nodes with CPUs. Dugast discloses a memory management system wherein DRAM is used as a local memory pool on the same NUMA node and slower memories such as persistent memories are used as a remote memory pool not connected to the CPU (see fig. 3 and paragraphs 39-43). It would have been obvious at the time the application was filed to a person of ordinary skill in the art to arrange the different types of memory in Chen as local or remote memories in Dugast in order to provide different service level arrangements using the different types of memory (see paragraph 40 and fig. 3 of Dugast, the first NUMA node is the local memory pool).
Regarding claim 20, Chen also discloses using a SCM as expanded memory (see fig. 3 and paragraph 52) as a second NUMA node but does not disclose when the first expanded memory is PMEM or SCM, adding a second NUMA node and managing the first expanded memory as a memory of the second NUMA node, wherein the second NUMA node comprises no CPU. Dugast discloses a memory management system wherein DRAM is used as a local memory pool on the same NUMA node and slower memories such as persistent memories are used as a remote memory pool not connected to the CPU (see fig. 3 and paragraphs 39-43). It would have been obvious at the time the application was filed to a person of ordinary skill in the art to arrange the different types of memory in Chen as local or remote memories in Dugast in order to provide different service level arrangements using the different types of memory.
Allowable Subject Matter
Claims 4, 5, 8, 9, 14, 15, 17, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not disclose or suggest the computing device further comprises a memory expander, the at least one expanded memory comprises N second expanded memories connected to the computing device by the memory expander, and the first expanded memory is one of the N second expanded memories, wherein N is greater than 1.
The prior art does not disclose or suggest the claimed allocation of the expanded memories based on usage rate of the local memory.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL D TSUI whose telephone number is (571)270-3253. The examiner can normally be reached Monday-Friday 8am-4pm.
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/DANIEL D TSUI/ Primary Examiner, Art Unit 2132
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