Prosecution Insights
Last updated: August 18, 2026
Application No. 19/199,801

SECURE TAMPER-PROTECTED WIRELESS COMMUNICATION INTERFACE

Non-Final OA §103
Filed
May 06, 2025
Priority
Aug 29, 2016 — continuation of 10/192,076 +3 more
Examiner
LI, MENG
Art Unit
Tech Center
Assignee
Block Inc.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
500 granted / 577 resolved
+26.7% vs TC avg
Strong +20% interview lift
Without
With
+19.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
21 currently pending
Career history
596
Total Applications
across all art units

Statute-Specific Performance

§101
11.8%
-28.2% vs TC avg
§103
51.9%
+11.9% vs TC avg
§102
6.8%
-33.2% vs TC avg
§112
20.1%
-19.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 577 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Information Disclosure Statement The information disclosure statement (IDS) submitted on 05/19/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1-6, 10-11 and 13 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over U.S. Patent No. 18/143,420 (12,321,506) in view of Grogg et al. (Pub. No.: US 2019/0203967) as obviousness type double patenting. Regarding to claims 1, 6 and 18, Patent No. 12,321,506 teaches all limitations (see table below) except a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal, however, in an analogous art, Grogg discloses a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Grogg so that NFC communication interface is used as an antenna for signals. The modification would have allowed the system to use NFC communication. Regarding to claims 2-5, 10-11, Patent No. 12,321,506 as modified teaches each claimed limitation (see table below). Claims 1-6, 10-11, 13-14, 18 and 20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over U.S. Patent No. 11,681,833 (17/214,307) in view of Grogg et al. (Pub. No.: US 2019/0203967) as obviousness type double patenting. Regarding to claims 1, 6 and 18, Patent No. 11,681,833 teaches all limitations (see table below) except a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal, however, in an analogous art, Grogg discloses a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Grogg so that NFC communication interface is used as an antenna for signals. The modification would have allowed the system to use NFC communication. Regarding to claims 2-5, 10-11, 13-14 and 20, Patent No. 11,681,833 as modified teaches each claimed limitation (see table below). Claims 1-6, 10-14, 18 and 20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over U.S. Patent No. 10,977,393 (16/248980) in view of Grogg et al. (Pub. No.: US 2019/0203967) as obviousness type double patenting. Regarding to claims 1, 6 and 18, Patent No. 10,977,393 teaches all limitations (see table below) except a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal, however, in an analogous art, Grogg discloses a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Grogg so that NFC communication interface is used as an antenna for signals. The modification would have allowed the system to use NFC communication. Regarding to claims 2-5, 10-14 and 20 Patent No. 10,977,393 as modified teaches each claimed limitation (see table below). Claims 1-6, 10-11, 13-14, 18 and 20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over U.S. Patent No. 10,192,076 (15/250,468) in view of Grogg et al. (Pub. No.: US 2019/0203967) as obviousness type double patenting. Regarding to claims 1, 6 and 18, Patent No. 10,192,076 teaches all limitations (see table below) except a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal, however, in an analogous art, Grogg discloses a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Grogg so that NFC communication interface is used as an antenna for signals. The modification would have allowed the system to use NFC communication. Regarding to claims 2-5, 10-11, 13-14, Patent No. 10,192,076 as modified teaches each claimed limitation (see table below). 19/199,801 18/143,420 (12,321,506) 1. A system for secure near-field communications (NFC), the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal. 1. A system for securing electronics, the system comprising: a housing for a circuit board that is configured to cover at least a portion of the circuit board; a first tamper trace that runs at least from a first connection node of the housing to a second connection node of the housing, wherein the first tamper trace is configured to couple to a first set of connection nodes of the circuit board through the first connection node of the housing and the second connection node of the housing; and a second tamper trace that runs at least from a third connection node of the housing to a fourth connection node of the housing, wherein the second tamper trace is configured to couple to a second set of connection nodes of the circuit board through the third connection node of the housing and the fourth connection node of the housing, wherein a first part of a tamper detection circuit includes the first tamper trace and the second tamper trace, wherein a second part of the tamper detection circuit is configured to be included on the circuit board, wherein the tamper detection circuit is configured to include a first leg and a second leg that are configured to be connected in parallel, wherein the first leg includes the first tamper trace, and wherein the second leg includes the second tamper trace. 6. … a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace 2. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a housing. 15. The system of claim 6, wherein the first tamper trace is configured to snake around at least one surface of the housing, and wherein the second tamper trace is also configured to snake around the at least one surface of the housing. 3. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a circuit board. 1. … wherein the first tamper trace is configured to couple to a first set of connection nodes of the circuit board through the first connection node of the housing and the second connection node of the housing; … 4. The system of claim 1, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 1. … a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace … 5. The system of claim 1, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 4. The system of claim 1, wherein the tamper detection circuit is configured to monitor a differential voltage between the first monitor node and the second monitor node to determine whether the tamper detection circuit has been tampered with. 6. A system for security, the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a wireless communication interface coupled to the conductive trace, wherein the wireless communication interface uses the conductive trace as an antenna for wireless communication of at least one signal. 6. A system for securing electronics, the system comprising: a housing for circuitry, wherein the housing is distinct from the circuitry; a first tamper trace that runs at least from a first connection node of the housing to a second connection node of the housing, wherein the first tamper trace is configured to couple to a first set of connection nodes of the circuitry through the first connection node of the housing and the second connection node of the housing; and a second tamper trace that runs at least from a third connection node of the housing to a fourth connection node of the housing, wherein the second tamper trace is configured to couple to a second set of connection nodes of the circuitry through the third connection node of the housing and the fourth connection node of the housing, wherein a first part of a tamper detection circuit includes the first tamper trace and the second tamper trace, wherein a second part of the tamper detection circuit is configured to be included in the circuitry, wherein the tamper detection circuit is configured to include a first leg and a second leg that are configured to be connected in parallel, wherein the first leg includes the first tamper trace of the housing and a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace, and wherein the second leg includes the second tamper trace of the housing and a second monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace. 6. … a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace 10. The system of claim 6, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 6. … a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace 11. The system of claim 6, wherein the change in the characteristic is a change in a current, and wherein the tamper detection circuit includes a monitor node that detects the change in the current. 11. The system of claim 6, wherein the first leg of the tamper detection circuit and the second leg of the tamper detection circuit are configured to conduct different voltages unless tampered with. 13. The system of claim 6, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 6 … wherein the tamper detection circuit is configured to include a first leg and a second leg that are configured to be connected in parallel, wherein the first leg includes the first tamper trace of the housing and a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace,… 14. The system of claim 6, further comprising: a second conductive trace, wherein the tamper detection circuit monitors the second conductive trace to detect a second change in the characteristic of electricity conducted through the second conductive trace, wherein the second change is associated with the tamper attempt. 6. … wherein the second leg includes the second tamper trace of the housing and a second monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace. … 18. A method for security, the method comprising: monitoring a conductive trace using a tamper detection circuit to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and using the conductive trace as an antenna coupled to a wireless communication interface for wireless communication of at least one signal. 20. A method of for securing electronics, the method comprising: monitoring a tamper detection circuit using a first monitor node and a second monitor node to determine whether the tamper detection circuit has been tampered with, wherein the tamper detection circuit includes a first tamper trace that runs at least from a first connection node of a housing to a second connection node of the housing, wherein the housing is for circuitry, wherein the housing is distinct from the circuitry, wherein the first tamper trace is configured to couple to a first set of connection nodes of the circuitry through the first connection node of the housing and the second connection node of the housing, wherein the tamper detection circuit includes a second tamper trace that runs at least from a third connection node of the housing to a fourth connection node of the housing, wherein the second tamper trace is configured to couple to a second set of connection nodes of the circuitry through the third connection node of the housing and the fourth connection node of the housing, wherein a first part of a tamper detection circuit includes the first tamper trace and the second tamper trace, wherein a second part of the tamper detection circuit is configured to be included in the circuitry, wherein the tamper detection circuit is configured to include a first leg and a second leg that are configured to be connected in parallel, wherein the first leg includes the first tamper trace of the housing and a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace, and wherein the second leg includes the second tamper trace of the housing and a second monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace. 6. … a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace 20. The method of claim 18, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 20. …wherein the first leg includes the first tamper trace of the housing and a first monitor node of the second part of the tamper detection circuit that is configured to monitor a voltage of the first tamper trace… 19/199,801 11,681,833 (17/214,307) 1. A system for secure near-field communications (NFC), the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal. 1. A system for securing electronics, the system comprising: a housing for a circuit board that is configured to cover at least a portion of the circuit board; a first tamper trace that runs at least from a first connection node of the first tamper trace to a second connection node of the first tamper trace, wherein the housing includes the first connection node of the first tamper trace, the second connection node of the first tamper trace, and at least a portion of the first tamper trace; a second tamper trace that runs at least from a third connection node of the second tamper trace to a fourth connection node of the second tamper trace, wherein the housing includes the third connection node of the second tamper trace, the fourth connection node of the second tamper trace, and at least a portion of the second tamper trace; a first connector piece positioned between the housing and the circuit board, wherein the first connector piece includes a first conductor that is electrically coupled to the first connection node of the first tamper trace and to a fifth connection node of the circuit board, wherein the first connector piece also includes a second conductor that is electrically coupled to the third connection node of the second tamper trace and to a sixth connection node of the circuit board; and a second connector piece positioned between the housing and the circuit board, wherein the second connector piece includes a third conductor that is electrically coupled to the second connection node of the first tamper trace and to a seventh connection node of the circuit board, wherein the second connector piece also includes a fourth conductor that is electrically coupled to the fourth connection node of the second tamper trace and to an eighth connection node of the circuit board, wherein the first tamper trace and the first conductor and the third conductor form a first part of a tamper detection circuit, wherein the second tamper trace and the second conductor and the fourth conductor form a second part of the tamper detection circuit, wherein the housing lacks a direct wired connection between the first part of the tamper detection circuit and the second part of the tamper detection circuit unless tampered with. 4. The system of claim 1, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 2. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a housing. 1. … a first tamper trace that runs at least from a first connection node of the first tamper trace to a second connection node of the first tamper trace, … 3. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a circuit board. 1. … wherein the first tamper trace is configured to couple to a first set of connection nodes of the circuit board through the first connection node of the housing and the second connection node of the housing; … 4. The system of claim 1, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 4. The system of claim 1, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 5. The system of claim 1, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 3. The system of claim 1, wherein current flowing through the first part of the tamper detection circuit flows from the fifth connection node of the circuit board to the first connection node of the first tamper trace through the first conductor of the first connector piece, and wherein the current flows from the second connection node of the first tamper trace to the seventh connection node of the circuit board through the third conductor of the second connector piece. 6. A system for security, the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a wireless communication interface coupled to the conductive trace, wherein the wireless communication interface uses the conductive trace as an antenna for wireless communication of at least one signal. 10. A system comprising: a cover for a circuit board that is configured to secure at least a portion of the circuit board; a first tamper trace that runs at least from a first connection node of the cover to a second connection node of the cover, wherein the cover includes at least a portion of the first tamper trace; a second tamper trace that runs at least from a third connection node of the cover to a fourth connection node of the cover, wherein the cover includes at least a portion of the second tamper trace; a first connector piece positioned between the cover and the circuit board, wherein the first connector piece physically couples the cover and the circuit board, wherein the first connector piece includes a first conductor that electrically couples the first connection node of the cover and a fifth connection node of the circuit board, wherein the first connector piece also includes a second conductor that electrically couples the third connection node of the second tamper trace to a sixth connection node of the circuit board; and a second connector piece positioned between the cover and the circuit board, wherein the second connector piece physically couples the cover and the circuit board, wherein the second connector piece includes a third conductor that electrically couples the second connection node of the cover to a seventh connection node of the circuit board, wherein the second connector piece also includes a fourth conductor that electrically couples the fourth connection node of the cover to an eighth connection node of the circuit board, wherein the first tamper trace and the first conductor and the third conductor form a first part of a tamper detection circuit, wherein the second tamper trace and the second conductor and the fourth conductor form a second part of the tamper detection circuit, wherein the cover lacks a direct wired connection between the first part of the tamper detection circuit and the second part of the tamper detection circuit unless tampered with. 13. The system of claim 10, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 10. The system of claim 6, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 13. The system of claim 10, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 11. The system of claim 6, wherein the change in the characteristic is a change in a current, and wherein the tamper detection circuit includes a monitor node that detects the change in the current. 14. The system of claim 10, wherein current flowing through the second part of the tamper detection circuit flows from the sixth connection node of the circuit board to the third connection node of the cover through the second conductor of the first connector piece, and wherein the current flows from the third connection node of the cover to the eighth connection node of the circuit board through the fourth conductor of the second connector piece. 13. The system of claim 6, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 10+13 14. The system of claim 6, further comprising: a second conductive trace, wherein the tamper detection circuit monitors the second conductive trace to detect a second change in the characteristic of electricity conducted through the second conductive trace, wherein the second change is associated with the tamper attempt. 13. The system of claim 10, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 18. A method for security, the method comprising: monitoring a conductive trace using a tamper detection circuit to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and using the conductive trace as an antenna coupled to a wireless communication interface for wireless communication of at least one signal. 10. A system comprising: a cover for a circuit board that is configured to secure at least a portion of the circuit board; a first tamper trace that runs at least from a first connection node of the cover to a second connection node of the cover, wherein the cover includes at least a portion of the first tamper trace; a second tamper trace that runs at least from a third connection node of the cover to a fourth connection node of the cover, wherein the cover includes at least a portion of the second tamper trace; a first connector piece positioned between the cover and the circuit board, wherein the first connector piece physically couples the cover and the circuit board, wherein the first connector piece includes a first conductor that electrically couples the first connection node of the cover and a fifth connection node of the circuit board, wherein the first connector piece also includes a second conductor that electrically couples the third connection node of the second tamper trace to a sixth connection node of the circuit board; and a second connector piece positioned between the cover and the circuit board, wherein the second connector piece physically couples the cover and the circuit board, wherein the second connector piece includes a third conductor that electrically couples the second connection node of the cover to a seventh connection node of the circuit board, wherein the second connector piece also includes a fourth conductor that electrically couples the fourth connection node of the cover to an eighth connection node of the circuit board, wherein the first tamper trace and the first conductor and the third conductor form a first part of a tamper detection circuit, wherein the second tamper trace and the second conductor and the fourth conductor form a second part of the tamper detection circuit, wherein the cover lacks a direct wired connection between the first part of the tamper detection circuit and the second part of the tamper detection circuit unless tampered with. 13. The system of claim 10, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 20. The method of claim 18, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 13. The system of claim 10, wherein the first part of the tamper detection circuit and the second part of the tamper detection circuit conduct different voltages unless tampered with. 19/199,801 10,977,393 (16/248980) 1. A system for secure near-field communications (NFC), the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal. 5. A secure electronic system comprising: a circuit board; a plurality of conductive elements on the circuit board that include at least a first conductive element and a second conductive element at least partially surrounding the first conductive element without electrically coupling to the first conductive element unless the secure electronic system experiences a tamper attempt; and at least a portion of a tamper detection circuit on the circuit board, wherein the tamper detection circuit detects the tamper attempt at least by detecting electrical coupling between at least the first conductive element and the second conductive element, wherein the first conductive element and the second conductive element are at different voltages at least until the tamper attempt. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 2. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a housing. 4. The secure electronic system of claim 1, further comprising a security housing at least partially enclosing at least a portion of the circuit board, the security housing including a second portion of the tamper detection circuit that is electrically coupled to the circuit board at least at the one or more conductive connection nodes. 3. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a circuit board. 1. … at least a portion of a tamper detection circuit on the circuit board … 4. The system of claim 1, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 5. The system of claim 1, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 6. A system for security, the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a wireless communication interface coupled to the conductive trace, wherein the wireless communication interface uses the conductive trace as an antenna for wireless communication of at least one signal. 5. A secure electronic system comprising: a circuit board; a plurality of conductive elements on the circuit board that include at least a first conductive element and a second conductive element at least partially surrounding the first conductive element without electrically coupling to the first conductive element unless the secure electronic system experiences a tamper attempt; and at least a portion of a tamper detection circuit on the circuit board, wherein the tamper detection circuit detects the tamper attempt at least by detecting electrical coupling between at least the first conductive element and the second conductive element, wherein the first conductive element and the second conductive element are at different voltages at least until the tamper attempt. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 10. The system of claim 6, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 11. The system of claim 6, wherein the change in the characteristic is a change in a current, and wherein the tamper detection circuit includes a monitor node that detects the change in the current. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 12. The system of claim 6, wherein the change in the characteristic is associated with a short circuit. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 13. The system of claim 6, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 5+16 14. The system of claim 6, further comprising: a second conductive trace, wherein the tamper detection circuit monitors the second conductive trace to detect a second change in the characteristic of electricity conducted through the second conductive trace, wherein the second change is associated with the tamper attempt. 5+16 18. A method for security, the method comprising: monitoring a conductive trace using a tamper detection circuit to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and using the conductive trace as an antenna coupled to a wireless communication interface for wireless communication of at least one signal. 16 20. The method of claim 18, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 16. The secure electronic system of claim 5, wherein the tamper detection circuit includes a voltage monitor node, wherein the tamper detection circuit detects the tamper attempt by detecting the electrical coupling between at least the first conductive element and the second conductive element based on a voltage measured by the voltage monitor node. 19/199,801 10,192,076 (15/250,468) 1. A system for secure near-field communications (NFC), the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal. 1. A secure electronic system having a tamper detection circuit that includes a housing portion and a board portion and that detects one or more tampering attempts, the secure electronic system comprising: a security housing enclosing at least a portion of a circuit board, the security housing comprising: a non-conductive housing comprising: an interior surface facing the circuit board, and an exterior surface, a plurality of recesses within the interior surface of the non-conductive housing, wherein each recess of the plurality of recesses is in a different one of a plurality of zones of the security housing, the housing portion of the tamper detection circuit running along the interior surface of the non-conductive housing including along the plurality of recesses, and an insulative covering layered over the housing portion of the tamper detection circuit other than over the plurality of recesses; and the circuit board, the circuit board comprising: a board, and the board portion of the tamper detection circuit that is disposed along the board and that is electrically connected to the housing portion of the tamper detection circuit via a plurality of connector pieces thereby completing the tamper detection circuit, the board portion of the tamper detection circuit configured to detect tampering with the tamper detection circuit, wherein a tamper zone of the plurality of zones of the security housing is identified based on at least one voltage condition at one or more of the plurality of recesses, the tamper zone corresponding to a location of tampering. 2. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a housing. 2. The secure electronic system of claim 1, wherein the housing portion of the tamper detection circuit includes a plurality of conductive tamper traces. 3. The system of claim 1, wherein at least a portion of the conductive trace runs along a surface of a circuit board. 1. … the board portion of the tamper detection circuit that is disposed along the board and that is electrically connected to the housing portion of the tamper detection circuit via a plurality of connector pieces thereby completing the tamper detection circuit, the board portion of the tamper detection circuit configured to detect tampering with the tamper detection circuit… 4. The system of claim 1, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 3. The secure electronic system of claim 1, wherein the board portion of the tamper detection circuit includes a plurality of monitor nodes, each monitor node of the plurality of monitor nodes measuring a monitored voltage of a plurality of monitored voltages, wherein the board portion of the tamper detection circuit detects tampering with the tamper detection circuit based on the plurality of monitored voltages. 5. The system of claim 1, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 3. The secure electronic system of claim 1, wherein the board portion of the tamper detection circuit includes a plurality of monitor nodes, each monitor node of the plurality of monitor nodes measuring a monitored voltage of a plurality of monitored voltages, wherein the board portion of the tamper detection circuit detects tampering with the tamper detection circuit based on the plurality of monitored voltages. 6. A system for security, the system comprising: a conductive trace; a tamper detection circuit coupled to the conductive trace, wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and a wireless communication interface coupled to the conductive trace, wherein the wireless communication interface uses the conductive trace as an antenna for wireless communication of at least one signal. 5. A system for tamper-proofing electronics, the system comprising: a security housing configured to enclose at least a portion of a circuit board, the security housing comprising: a non-conductive housing having an interior surface and an exterior surface, the interior surface configured to face the circuit board, a plurality of recesses along the interior surface of the non-conductive housing, wherein each recess of the plurality of recesses is in a different one of a plurality of zones of the security housing, a housing portion of a tamper detection circuit running along the interior surface of the non-conductive housing including along the plurality of recesses, the housing portion of the tamper detection circuit configured to connect to a board portion of the tamper detection circuit on the circuit board via a plurality of connector pieces thereby completing the tamper detection circuit, the tamper detection circuit configured to detect tampering along the tamper detection circuit, wherein a tamper zone of the plurality of zones of the security housing is identified based on at least one voltage condition at one or more of the plurality of recesses, the tamper zone corresponding to a location of tampering, and an insulative covering layered over the housing portion of the tamper detection circuit other than over the plurality of recesses. 10. The system of claim 6, wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage. 10. The system of claim 5, wherein each recess of the plurality of recesses is configured to receive a voltage probe, the voltage probe to contact a conductive segment of the housing portion of the tamper detection circuit and thereby measure the at least one voltage condition. 11. The system of claim 6, wherein the change in the characteristic is a change in a current, and wherein the tamper detection circuit includes a monitor node that detects the change in the current. 8. The system of claim 5, wherein the tamper detection circuit is configured to detect tampering along the tamper detection circuit based on a plurality of measured voltages monitored at a plurality of monitor nodes of the tamper detection circuit. 13. The system of claim 6, further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace. 8. The system of claim 5, wherein the tamper detection circuit is configured to detect tampering along the tamper detection circuit based on a plurality of measured voltages monitored at a plurality of monitor nodes of the tamper detection circuit. 14. The system of claim 6, further comprising: a second conductive trace, wherein the tamper detection circuit monitors the second conductive trace to detect a second change in the characteristic of electricity conducted through the second conductive trace, wherein the second change is associated with the tamper attempt. 10. The system of claim 5, wherein each recess of the plurality of recesses is configured to receive a voltage probe, the voltage probe to contact a conductive segment of the housing portion of the tamper detection circuit and thereby measure the at least one voltage condition. 18. A method for security, the method comprising: monitoring a conductive trace using a tamper detection circuit to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt; and using the conductive trace as an antenna coupled to a wireless communication interface for wireless communication of at least one signal. 20 Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8, 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Hankhofer et al. (Pub. No.: US 2008/0278217, hereinafter Hankhofer) in view of Grogg et al. (Pub. No.: US 2019/0203967, hereinafter Grogg). Regarding claim 1: Hankhofer teaches: A system for secure near-field communications (NFC), the system comprising: a conductive trace (Hankhofer - [0025]: an integrated circuit is part of a chip module comprising a chip support substrate having one or several chips with an integrated circuit mounted thereon on a first side, and having external contacts for a connection to the circuit board 12 on an opposing surface. Similarly, although the external contacts 20 are shown as conductor legs extending from a side surface of the integrated circuit 14 a, 14 b, same could also be implemented as terminal pads on a mounting surface of the integrated circuit 14 a, 14 b defining the footprint thereof and facing the mounting surface 12 a of the circuit board 12); a tamper detection circuit coupled to the conductive trace (Hankhofer - [0034]: Via external contacts 120 4 and 120 5, anti-tamper circuit 114 1 is connected to anti-tamper circuitry 123 comprising, for example, conductor lines of circuit board 12, electrical devices mounted on circuit board 12 and/or a conductive path running through cover 24), wherein the tamper detection circuit monitors the conductive trace to detect a change in a characteristic of electricity conducted through the conductive trace, wherein the change is associated with a tamper attempt (Hankhofer - [0030]: the anti-tamper circuit observes or monitors an electrical state on at least one of its external contacts 20 in order to detect any presence of a tampering event, such as a short circuiting of external contacts 20 of integrated circuits 14 a, or an interruption of any of the connections between the external contact 20 of integrated circuit 14 a on the one hand and respective contact pads 22 on the other hand, see also [0043]); However, Hankhofer doesn’t explicitly teach but Grogg discloses a NFC communication interface for coupled to the conductive trace, wherein the NFC communication interface uses the conductive trace as an antenna for NFC communication of at least one signal (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Grogg so that NFC communication interface is used as an antenna for signals. The modification would have allowed the system to use NFC communication. Regarding claim 2: Hankhofer as modified teaches at least a portion of the conductive trace runs along a surface of a housing (Hankhofer - [0037]: Fig. 1 b, the external contacts 121 to 122 are connected to each other via conductor lines and vias 133 of circuit board 12). Regarding claim 3: Hankhofer as modified teaches wherein at least a portion of the conductive trace runs along a surface of a circuit board (Hankhofer - [0034]: Via external contacts 120 4 and 120 5, anti-tamper circuit 114 1 is connected to anti-tamper circuitry 123 comprising, for example, conductor lines of circuit board 12). Regarding claim 4: Hankhofer as modified teaches wherein the change in the characteristic is a change in a voltage, and wherein the tamper detection circuit includes a monitor node that detects the change in the voltage (Hankhofer - [0030]: the anti-tamper circuit observes or monitors an electrical state on at least one of its external contacts 20 in order to detect any presence of a tampering event, such as a short circuiting of external contacts 20 of integrated circuits 14 a, or an interruption of any of the connections between the external contact 20 of integrated circuit 14 a on the one hand and respective contact pads 22 on the other hand … The electrical state being observed may comprise a resistance, a capacitance and/or an inductance and the corresponding measurement my involve a current and/or voltage measurement). Regarding claim 5: Hankhofer as modified teaches further comprising: a second conductive trace, wherein the change in the characteristic of electricity conducted through the conductive trace is associated with at least one connection between the conductive trace and the second conductive trace (Hankhofer - [0043]: anti-tamper circuit 114 1 comprises a voltage meter 149 for performing a voltage measurement between the other external contacts 145 a and 145 e). Regarding claims 6, 10 and 13: Claims are directed to a system claims for security wireless with similar or broader arrangement of claims 1-4 and do not teach or further define over the limitations recited in claims 1 and 4-5. Therefore, claims 6, 10 and 13 are also rejected for similar reasons set forth in claims 1 and 4-5. Regarding claim 7: Hankhofer as modified teaches wherein the wireless communication interface is associated with near-field communications (NFC) (Grogg - [0050]: The circuit board 17 has a conductor track 12.1 which runs around the cutout 16.3 and which forms the antenna of the wireless near-field communication interface 12). The reason to combine is in the same rational as claim 1. Regarding claim 8: Hankhofer as modified teaches 8. The system of claim 6, wherein the wireless communication interface is associated with at least one of Bluetooth® or radio frequency identification (RFID) (Grogg - [0045]: The wireless communication interface 21 and the wireless communication interface 11 are preferably a Bluetooth interface (registered trademark) which corresponds to the industrial standard IEEE 802.15.1). The reason to combine is in the same rational as claim 1. Regarding claim 11: Hankhofer as modified teaches wherein the change in the characteristic is a change in a current, and wherein the tamper detection circuit includes a monitor node that detects the change in the current (Hankhofer - [0030]: the anti-tamper circuit observes or monitors an electrical state on at least one of its external contacts 20 in order to detect any presence of a tampering event, such as a short circuiting of external contacts 20 of integrated circuits 14 a, or an interruption of any of the connections between the external contact 20 of integrated circuit 14 a on the one hand and respective contact pads 22 on the other hand … The electrical state being observed may comprise a resistance, a capacitance and/or an inductance and the corresponding measurement my involve a current and/or voltage measurement). Regarding claim 12: Hankhofer as modified teaches wherein the change in the characteristic is associated with a short circuit (Hankhofer - [0030]: the anti-tamper circuit observes or monitors an electrical state on at least one of its external contacts 20 in order to detect any presence of a tampering event, such as a short circuiting of external contacts 20 of integrated circuits 14 a). Regarding claim 14: Hankhofer as modified teaches further comprising: a second conductive trace, wherein the tamper detection circuit monitors the second conductive trace to detect a second change in the characteristic of electricity conducted through the second conductive trace, wherein the second change is associated with the tamper attempt (Hankhofer - [0043\: a voltage measurement is performed by the anti-tamper circuit 114 1 in order to determine as to whether a tampering attack is present and has significantly changed any of the resistances 145 a-d, or not). Regarding claims 18-20: Claims are directed to a method claims with similar arrangement of claims 6-7 and 10 and do not teach or further define over the limitations recited in claims 6-7 and 10. Therefore, claims 18-20 are also rejected for similar reasons set forth in claims 6-7 and 10. Claims 9 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Hankhofer et al. (Pub. No.: US 2008/0278217, hereinafter Hankhofer) in view of Grogg et al. (Pub. No.: US 2019/0203967, hereinafter Grogg) and Jones et al. (Patent No.: US 9,141,876, hereinafter Jones). Regarding claim 9: Hankhofer doesn’t explicitly teach but Jones discloses wherein the wireless communication interface is associated with at least one of Wi-Fi or a cellular network (Jones - [Col. 102, Line 55-59]: the document imaging device 44 itself comprises a wireless communication device such as a cellular communication device and the device 44 sends the deposit transaction data to a banking network for settlement such as via a cell phone network). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Jones so that a wireless communication is a cellular communication. The modification would have allowed the system to adapt cellular network for wireless communication. Regarding claim 15: Hankhofer doesn’t explicitly teach but Jones discloses wherein the wireless communication of the at least one signal is associated with reading of transaction instrument data from a transaction instrument data (Jones - [Col. 134, Line 62-67]: the document imaging device 44 can transmit information about the entire deposit transaction e.g., a grand total of all the documents in the entire deposit transaction including the documents in all the smart containers associated with the deposit transaction to the memory in the last smart container (or alternately to a memory in another one of the smart containers and/or the memories in all smart containers associated with the deposit transaction such as, for example, via a wireless such as a Bluetooth connection between the document imaging device 44 and the smart container(s))). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Jones so that a deposit transaction can be read via a wireless communication. The modification would have allowed the system to transfer data via a wireless communication. Regarding claim 16: Hankhofer doesn’t explicitly teach but Jones discloses wherein the wireless communication of the at least one signal is associated with sending of transaction instrument data read from a transaction instrument, the transaction instrument data used for facilitating a transaction (Jones - [Col. 102, Line 55-59]: the document imaging device 44 itself comprises a wireless communication device such as a cellular communication device and the device 44 sends the deposit transaction data to a banking network for settlement such as via a cell phone network). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Jones so that the obtained deposit transaction data can be transmitted to a bank via wireless connection. The modification would have allowed the system to transfer data via a wireless communication. Regarding claim 17: Hankhofer doesn’t explicitly teach but Jones discloses wherein the wireless communication of the at least one signal is associated with facilitating a transaction (Jones - [Col. 102, Line 55-59]: the document imaging device 44 itself comprises a wireless communication device such as a cellular communication device and the device 44 sends the deposit transaction data to a banking network for settlement such as via a cell phone network). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Hankhofer with Jones so that wireless communication is used to facilitate transactions. The modification would have allowed the system to transfer data via a wireless communication. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Clark et al. (Pub. No.: US 2005/0088303) - Tamper sensing Method And Apparatus Clark discloses a tamper sensing circuit is provided for an electrical device wherein an enclosure may be opened to access data by a user that does not possess the ability to achieve normal access by satisfying data security measures such as use of a password. A screw used to secure enclosure halves together is connected by a conductive coating at the enclosure member surface into which the screw is threaded to connect a tamper sensing circuit to the device ground potential. A tamper sensing circuit output node is maintained at the circuit ground potential as long as the screw is in electrical contact with the enclosure conductive coating. When the screw is disengaged from the enclosure member threaded opening, the output node is no longer grounded and rises to a supplied electrical potential indicating tampering and enabling appropriate corrective action (see abstract) Any inquiry concerning this communication or earlier communications from the examiner should be directed to MENG LI whose telephone number is (571)272-8729. The examiner can normally be reached on M-F 8:30-5:30. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s acting supervisor, Kristine Kincaid can be reached on (571) 270-5143. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8729. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MENG LI/ Primary Examiner, Art Unit 2437
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Prosecution Timeline

May 06, 2025
Application Filed
Jul 31, 2026
Non-Final Rejection mailed — §103 (current)

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