DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Objections
Claim 15 is objected to because of the following informalities: in line 5 of the claim correct “a first electronic device” to ‘the first electronic device’ because the first instance of the limitation occurs in line 1. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ghosh et al. (US Patent No. 9842076), hereinafter referred to as Ghosh.
Referring to claim 1, Ghosh discloses a hub device (fig. 6, 610) comprising: a first interface including a plurality of USB 2.0 connectors (fig. 6, USB Downstream Ports; legacy USB1/2 downstream ports, col. 5, lines 60-65); a second interface including a USB Type-C connector (fig. 6, “C” connector 650) connected to a first electronic device (USB host, col. 3, lines 15-20); and one or more processors, comprising processing circuitry (fig. 6, hub controller logic, embedded controller), individually and/or collectively configured to: transmit data received from an first external device (USB device, col. 3, lines 55-60) connected to a first USB 2.0 connector (standard USB1/2 lines, col. 5, line 25) among the plurality of USB 2.0 connectors to the first electronic device through at least a first data pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type-C connector (fig. 3A, “C” connector pin layout); and transmit data received from a second external device (USB device, col. 3, lines 55-60) connected to a second USB 2.0 connector (standard USB1/2 lines, col. 5, line 25) among the plurality of USB 2.0 connectors to the first electronic device through at least a second pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins), wherein the hub device is configured so that the data to be transmitted to the first electronic device through at least the second data pin can be transmitted to a second electronic device connected to the first electronic device through at least the first electronic device (NOTE: the language “can be” expresses a possibility and therefore limitation does not require the action of further transmitting to a second electronic device; as Ghosh discloses the hub device transmits data to the host, which is the first electronic device, Ghosh teaches “the hub device is configured so that” the data transmitted to the host “can be” subjected to further actions at the host).
As to claim 2, Ghosh discloses the first data pin includes two pins among a plurality of pins provided on a first side of the USB Type-C connector; and wherein the second data pin includes two pins among a plurality of pins provided on a second side of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 3, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication).
As to claim 4, Ghosh discloses the first electronic device includes a USB Type-C connector connected to the USB Type-C connector included in the second interface; wherein a third data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the first data pin; wherein a fourth data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the second data pin; and wherein the third data pin and the fourth data pin are not short-circuited (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication; the individual D+ and D- connections are kept separate, supporting differential data signaling, shorting the D+ and D- would not allow the differential data signal of the USB standard).
As to claim 5, Ghosh discloses the third data pin includes two pins among a plurality of pins provided on a first side of a USB Type-C connector of the first electronic device; and wherein the fourth pin includes two pins among a plurality of pins provided on a second side of a USB Type-C connector of the first electronic device (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 6, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 7, Ghosh discloses the D+ pin of the third data pin is not short- circuited to the D+ pin of the fourth data pin; and wherein the D- pin of the third data pin is not short-circuited to the D- pin of the fourth data pin (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication; the individual D+ and D- connections are kept separate, supporting differential data signaling, shorting the D+ and D- would not allow the differential data signal of the USB standard).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ghosh in view of Hatton et al. (US Patent No. 7689724), hereinafter referred to as Hatton.
Referring to claim 8, Ghosh discloses a data transmission method of a hub device (fig. 6, 610) including a first interface including a plurality of USB 2.0 connectors (fig. 6, USB Downstream Ports; legacy USB1/2 downstream ports, col. 5, lines 60-65) and a second interface including a USB Type-C connector (fig. 6, “C” connector 650) connected to a first electronic device (USB host, col. 3, lines 15-20), the method comprising: transmitting data received from an first external device (USB device, col. 3, lines 55-60) connected to a first USB 2.0 connector (standard USB1/2 lines, col. 5, line 25) among the plurality of USB 2.0 connectors to the first electronic device through at least a first data pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type- C connector (fig. 3A, “C” connector pin layout); and transmitting data received from a second external device (USB device, col. 3, lines 55-60) connected to a second USB 2.0 connector (standard USB1/2 lines, col. 5, line 25) among the plurality of USB 2.0 connectors to the first electronic device through at least a second pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
While the communication with the USB host of Ghosh teaches “the data transmitted to the first electronic device through the second data pin”, Ghosh does not appear to explicitly disclose the data transmitted to the host is further “transmitted to a second electronic device connected to the first electronic device through the first electronic device.”
However, Hatton teaches USB device data is “transmitted to a second electronic device connected to the first electronic device through the first electronic device” (provides mouse and keyboard data to the USB host controller driver 72 so that the data can be passed to the next server in the daisy chain through the second port 66 of the USB host controller hardware 60; col. 8, lines 20-30).
Ghosh and Hatton are analogous art because they are from the same field of endeavor, USB communication.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ghosh and Hatton before him or her, to modify the USB system of Ghosh to include the daisy chain architecture of Hatton because the architecture would allow data to be shared between multiple computers.
The suggestion/motivation for doing so would have been to allow devices to be shared between computing systems (col. 1, lines 40-55)
Therefore, it would have been obvious to combine Ghosh and Hatton to obtain the invention as specified in the instant claim.
As to claim 9, Ghosh discloses the first data pin includes two pins among a plurality of pins provided on a first side of the USB Type-C connector; and wherein the second data pin includes two pins among a plurality of pins provided on a second side of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 10, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication).
As to claim 11, Ghosh discloses the first electronic device includes a USB Type-C connector connected to the USB Type-C connector included in the second interface; wherein a third data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the first data pin; wherein a fourth data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the second data pin; and wherein the third data pin and the fourth data pin are not short-circuited (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication; the individual D+ and D- connections are kept separate, supporting differential data signaling, shorting the D+ and D- would not allow the differential data signal of the USB standard).
As to claim 12, Ghosh discloses the third data pin includes two pins among a plurality of pins provided on a first side of a USB Type-C connector of the first electronic device; and wherein the fourth pin includes two pins among a plurality of pins provided on a second side of a USB Type-C connector of the first electronic device (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 13, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 14, Ghosh discloses the D+ pin of the third data pin is not short-circuited to the D+ pin of the fourth data pin; and wherein the D- pin of the third data pin is not short-circuited to the D- pin of the fourth data pin (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication; the individual D+ and D- connections are kept separate, supporting differential data signaling, shorting the D+ and D- would not allow the differential data signal of the USB standard).
Referring to claim 15, Ghosh discloses a system (fig. 4 and fig. 6) comprising a hub device (fig. 6, 610), a first electronic device (USB host, col. 3, lines 15-20), the system comprising: the hub device comprising a first interface including a plurality of USB 2.0 connectors (fig. 6, USB Downstream Ports; legacy USB1/2 downstream ports, col. 5, lines 60-65); the hub device further comprising a second interface including a USB Type-C connector (fig. 6, “C” connector 650) connected to a first electronic device; and the hub device further comprising one or more processors, comprising processing circuitry (fig. 6, hub controller logic, embedded controller), individually and/or collectively configured to: transmit data received from an first external device (USB device, col. 3, lines 55-60) connected to a first USB 2.0 connector among the plurality of USB 2.0 connectors (standard USB1/2 lines, col. 5, line 25) to the first electronic device through at least a first data pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type-C connector (fig. 3A, “C” connector pin layout); and transmit data received from a second external device (USB device, col. 3, lines 55-60) connected to a second USB 2.0 connector among the plurality of USB 2.0 connectors (standard USB1/2 lines, col. 5, line 25) to the first electronic device through at least a second pin (fig. 3A, D+, D- pins) according to USB 2.0 (the four legacy USB1/2 lines: Gnd, VBUS, D+, and D−, col. 3, lines 35-40) among a plurality of pins of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
While the communication with the USB host of Ghosh teaches “the data transmitted to the first electronic device through the second data pin”, Ghosh does not appear to explicitly disclose a second electronic device and the data transmitted to the host is further “transmitted to a second electronic device connected to the first electronic device through at least the first electronic device.”
However, Hatton teaches USB device data is “transmitted to a second electronic device connected to the first electronic device through at least the first electronic device” (provides mouse and keyboard data to the USB host controller driver 72 so that the data can be passed to the next server in the daisy chain through the second port 66 of the USB host controller hardware 60; col. 8, lines 20-30).
Ghosh and Hatton are analogous art because they are from the same field of endeavor, USB communication.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ghosh and Hatton before him or her, to modify the USB system of Ghosh to include the daisy chain architecture of Hatton because the architecture would allow data to be shared between multiple computers.
The suggestion/motivation for doing so would have been to allow devices to be shared between computing systems (col. 1, lines 40-55)
Therefore, it would have been obvious to combine Ghosh and Hatton to obtain the invention as specified in the instant claim.
As to claim 16, Ghosh discloses the first data pin includes two pins among a plurality of pins provided on a first side of the USB Type-C connector; and wherein the second data pin includes two pins among a plurality of pins provided on a second side of the USB Type-C connector (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 17, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication).
As to claim 18, Ghosh discloses the first electronic device includes a USB Type-C connector connected to the USB Type-C connector included in the second interface; wherein a third data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the first data pin; wherein a fourth data pin among a plurality of pins of a USB Type-C connector of the first electronic device is connected to the second data pin; and wherein the third data pin and the fourth data pin are not short-circuited (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins, and the differential data signal is used for USB 2.0 communication; the individual D+ and D- connections are kept separate, supporting differential data signaling, shorting the D+ and D- would not allow the differential data signal of the USB standard).
As to claim 19, Ghosh discloses the third data pin includes two pins among a plurality of pins provided on a first side of a USB Type-C connector of the first electronic device; and wherein the fourth pin includes two pins among a plurality of pins provided on a second side of a USB Type-C connector of the first electronic device (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
As to claim 20, Ghosh discloses the two pins on the first side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the first side; and wherein the two pins on the second side are a D+ pin and a D- pin allocated for USB 2.0 data among the plurality of pins provided on the second side (fig. 3A, “C” connector pin layout; NOTE: USB type-C connector can be connected in two orientations for data transmission, a first orientation connects the first set of D+/- pins and a second orientation connects the second set of D+/- pins).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The US Patent No. 10,558,601 of Senuma et al. is pertinent to USB 2.0 and Type-C interconnect architecture, and the US Pub. No. 2020/0151129 of Wright et al is pertinent to USB hub architecture.
The examiner has cited particular column, line, and/or paragraph numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in its entirety as potentially teaching of all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c).
Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(11) and Interview Practice for additional details.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T OBERLY whose telephone number is (571)272-6991. The examiner can normally be reached on M-F 800am-430pm (MT).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC T OBERLY/ Primary Examiner, Art Unit 2184
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