DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“signal processing and image generation module” in claims 1, 9;
“vertical-axis driving module” in claim 9.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 21-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goto et al (United States Patent Application Publication 20130365587).
As to claim 21, Goto teaches an optical detecting method for semiconductor substrates (paragraph 0001 “The present invention relates to a surface treatment status monitoring device for measuring, in process and substantially in real time, the depth or level difference of small holes, such as TSVs (=Through-silicon Vias), formed in a semiconductor substrate”), comprising:
providing excitation light (Figure 1, paragraph 0037 “measurement light emitted from this light source 10”) and directing the excitation light onto a designated region from a front side of a sample (Figure 2a the downward-arrowed lines, paragraph 0037 “The measurement light outputted from the end of optical fiber 23 is radiated onto the specimen 50 via collimator lens 24.”), thereby generating a forward excitation signal of the designated region (Figure 2a, paragraph 0038 “reflected light 62 from the top surface of resist layer 53”);
providing an interface configured to reflect the excitation light, forming backward excitation light returning to the designated region, thereby generating a backward excitation signal of the designated region (Figure 2b, paragraph 0038 “reflected light 61 from the bottom surface of one or multiple trench holes 52” also “reflected light 63 from the top surface of substrate 51” and these lights go through the surface region);
receiving the forward excitation signal and backward excitation signal (Figure 1, paragraph 0039 “light of multiple wavelengths is detected simultaneously by an array detector 32 of CCD line sensors or the like”) and converting the forward excitation signal and backward excitation signal into electrical signals (Figure 1, paragraph 0039 “A detection signal corresponding to each wavelength of the array detector 32 is inputted into data processing unit 40.” and as paragraph 0040 indicates that data processing unit 40 is a computer, it is inherent that the optical signal is converted into an electrical one); and
generating an image of the designated region based on the electrical signals (Figure 1, paragraph 0039 “The computed results are presented to the observer by unit of display unit 45.”).
As to claim 22, Goto teaches everything claimed, as applied above in claim 21, in addition the excitation light and the backward excitation light are coaxial (Figure 1, the downward measurement light and reflected light go through the same coupler 22, paragraph 0038 “These reflected lights 61 through 63 or 64 through 65 return back through the collimating lens 24 in the opposite direction to light irradiation and enter the optical fiber 23.”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Goto in view of Vaupel et al (United States Patent Application Publication 20190033054).
As to claim 23, Goto teaches an optical detecting method for semiconductor substrates (paragraph 0001 “The present invention relates to a surface treatment status monitoring device for measuring, in process and substantially in real time, the depth or level difference of small holes, such as TSVs (=Through-silicon Vias), formed in a semiconductor substrate”), comprising:
providing excitation light (Figure 1, paragraph 0037 “measurement light emitted from this light source 10”) and directing the excitation light onto a designated region from a front side of a sample (Figure 2a, the downward-arrowed lines, paragraph 0037 “The measurement light outputted from the end of optical fiber 23 is radiated onto the specimen 50 via collimator lens 24.”), thereby generating a forward excitation signal of the designated region (Figure 2a, paragraph 0038 “reflected light 62 from the top surface of resist layer 53”);
providing an interface configured to reflect the excitation light, forming backward excitation light returning to the designated region, thereby generating a backward excitation signal of the designated region (Figure 2b, paragraph 0038 “reflected light 61 from the bottom surface of one or multiple trench holes 52” & “reflected light 63 from the top surface of substrate 51” and these lights go through the surface region);
receiving the forward excitation signal and backward excitation signal (Figure 1, paragraph 0039 “light of multiple wavelengths is detected simultaneously by an array detector 32 of CCD line sensors or the like”) and converting the forward excitation signal and backward excitation signal into electrical signals (Figure 1, paragraph 0039 “A detection signal corresponding to each wavelength of the array detector 32 is inputted into data processing unit 40.” and as paragraph 0040 indicates that element 40 is a computer, it is inherent that the optical signal is converted into an electrical one); and
generating an image of the designated region based on the electrical signals (Figure 1, paragraph 0039 “The computed results are presented to the observer by unit of display unit 45.”).
Goto does not teach controlling one or a combination of the excitation light and associated optical components, and the sample, to move along a vertical axis, thereby generating the forward excitation signal and backward excitation signal of the designated region, layer- by-layer. However, it is known in the art as taught by Vaupel. Vaupel teaches layer measurement (Abstract “A confocal microscope for determination of a layer thickness”) that controls one or a combination of the excitation light and associated optical components, and the sample, to move along a vertical axis (Figure 1, paragraph 0082 “focus adjusting device 19 is provided for adjusting a focus of the illumination light along the optical axis 16, i.e., in a height direction/z direction/light propagation direction”, and elements 17 “optical components”, 18 “objective” and 20 “specimen” are all connected adjusting element 19), thereby generating the forward excitation signal and backward excitation signal of the designated region, layer- by-layer (Figure 2, paragraph 0083 “a diaphragm/pinhole 15 may be arranged in a plane conjugated with the specimen plane. In this way, substantially only specimen light from the focus plane is allowed to pass the pinhole 15, whereas specimen light from other height layers is substantially blocked.”). It would have been obvious to one of ordinary skill in the art before applicant’s effective filing date to be controlling one or a combination of the excitation light and associated optical components, and the sample, to move along a vertical axis, thereby generating the forward excitation signal and backward excitation signal of the designated region, layer-by-layer, in order to better examine only a desired layer at a time.
As to claim 24, Goto in view of Vaupel teaches everything claimed, as applied above in claim 23, in addition Goto teaches the excitation light and the backward excitation light are coaxial (Figure 1, the downward measurement light and reflected light go through the same coupler 22, paragraph 0038 “These reflected lights 61 through 63 or 64 through 65 return back through the collimating lens 24 in the opposite direction to light irradiation and enter the optical fiber 23.”).
Allowable Subject Matter
Claims 1-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
As to claim 1, the prior art of record, taken alone or in combination, fails to disclose or render obvious an optical detecting system for semiconductor substrates comprising a light source module configured to provide an excitation light, wherein the excitation light is incident from a front side of the sample into an interior portion of a micro-hole having a high aspect ratio feature, thereby generating a forward excitation signal; an interface configured to reflect the excitation light incident into the micro-hole, forming a backward excitation light returning from a back side of the sample into the interior of the micro-hole, thereby generating a backward excitation signal, in combination with the rest of the limitations of the claim.
As to claim 9, the prior art of record, taken alone or in combination, fails to disclose or render obvious an optical detecting system for semiconductor substrates comprising a light source module configured to provide an excitation light, wherein the excitation light is incident from a front side of the sample into an interior of a micro-hole having a high aspect ratio feature, thereby generating a forward excitation signal; an interface configured to reflect the excitation light incident into the micro-hole, forming a backward excitation light returning into the interior of the micro-hole, thereby generating a backward excitation signal, in combination with the rest of the limitations of the claim.
As to claim 17, the prior art of record, taken alone or in combination, fails to disclose or render obvious an optical detecting method for semiconductor substrates comprising providing an excitation light and directing the excitation light from a front side of a sample into an interior of a micro-hole having a high aspect ratio feature, thereby generating a forward excitation signal; providing an interface configured to reflect the excitation light incident into the micro-hole, forming backward excitation light returning into the interior of the micro- hole, thereby generating a backward excitation signal, in combination with the rest of the limitations of the claim.
As to claim 19, the prior art of record, taken alone or in combination, fails to disclose or render obvious an optical detecting method for semiconductor substrates comprising providing an excitation light and directing the excitation light from a front side of a sample into an interior portion of a micro-hole having a high aspect ratio feature, thereby generating a forward excitation signal; providing an interface configured to reflect the excitation light incident into the micro-hole, forming backward excitation light returning into the interior portion of the micro-hole, thereby generating a backward excitation signal, in combination with the rest of the limitations of the claim.
Claims 2-8, 10-16, 18, 20 are allowed because of their dependence on an allowed claim.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Pan (US 20250172384) and Jin (KR 2014030381) reflect light from the surface & bottom of a hole and use interference to determine the depth (Figures 1 and 2 respectively), but do not have the light reflect off the back side of the substrate and return through the hole. Jin (US 20130206992) has light reflect from the back & front sides of the substrate and the bottom of the hole (Figure 6), but there is no light going through the hole from either direction. Liu (CN 111006608) has lights on both sides of the substrate and obtains signals from all of them (Figure 1), but has no interface structure to reflect light from the front sources (3 & 4) back to the detector 1, and the back-side lights (5 & 6) don't create forward excitation light that is directed to the front side of the sample, and it would not be obvious to modify or combine these references to obtain the applicant’s invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARREAS UNDERWOOD whose telephone number is (571)272-1536. The examiner can normally be reached M-F 0600-1400 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michelle Iacoletti can be reached at (571) 2705789. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/J.C.U/Examiner, Art Unit 2877 /MICHELLE M IACOLETTI/Supervisory Patent Examiner, Art Unit 2877