DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5-9, and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Shiva K. et al. (US Pub. No. 2021/0405919), hereinafter referred to as Shiva, in view of Ishikawa et al. (US Pub. No. 2013/0086305), hereinafter referred to as Ishikawa.
Referring to claim 1, Shiva discloses a data storage device (fig. 4, 100), comprising: a first data storage controller coupled to a first memory (fig. 4, 420 coupled to 430), the first memory comprising one or more memory dies (non-volatile memory die, [0031]); a second data storage controller coupled to a second memory (fig. 4, 450 coupled to 460), the second memory comprising one or more memory dies (non-volatile memory die, [0031]); a multiplexer coupled to the first data storage controller and the second data storage controller (fig. 4, 1 connection from 400 becomes 2 connections to either 410 or 440 interfaces coupling to 420 to 450); and a connector coupled to the multiplexer and configured to connect the multiplexer to a host (fig. 4, connector 400 coupled between 1:2 connection and host 300); wherein, based on a memory selection signal, the multiplexer is configured to (a) connect the first data storage controller and the first memory to the host through the multiplexer or (b) connect the second data storage controller and the second memory to the host through the multiplexer (host 300 determines whether to use the SATA interface or the PCIe interface…host 300 then sends a command…and, in response to the command, the switch 400 connect the connector either to the SATA data path or the PCIe data path, [0050]).
While Shiva teaches the first and second memory can each be its own memory unit, Shiva is silent regarding anticipated grade of each memory unit and therefore does not appear to explicitly disclose a first quality grade and a second quality grade that is lower than the first quality grade.
However, Ishikawa teaches a memory system with separate memory units that consist of a first quality grade and a second quality grade that is lower than the first quality grade (fig. 1, flash memory device 400, SSD device 500, HDD device (SAS) 600, HDD device (SATA) 700).
Shiva and Ishikawa are analogous art because they are from the same field of endeavor, storage systems.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shiva and Ishikawa before him or her, to modify the storage device of Shiva to include the multiple storage types of Ishikawa because different types would provide different storage capabilities and advantages.
The suggestion/motivation for doing so would have been to provide efficient storage capacity and transfers for the needs of a host system (Ishikawa: [0007], [0079]).
Therefore, it would have been obvious to combine Shiva and Ishikawa to obtain the invention as specified in the instant claim.
As to claim 5, while the combination of Shiva in view of Ishikawa teaches different grades of storage, the combination does not appear to explicitly disclose the first quality grade is a prime quality grade and the second quality grade is less than the prime quality grade.
However, the Applicant’s Specification provides evidence that a finite number of quality graded storage solutions were known before the effective filing date of the claimed invention in disclosing in paragraph [0049] of the Specification that “NAND dies may be rated, in descending order of quality, as: Enterprise, High-end consumer, Mainstream consumer, Budget, and Archival.”
Therefore, it would have been “Obvious To Try” any of the know solutions because "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103."KSR, 550 U.S. at 421, 82 USPQ2d at 1397 (see MPEP 2143.I.E).
As to claim 6, while the combination of Shiva in view of Ishikawa teaches different grades of storage, the combination does not appear to explicitly disclose the second quality grade is an archival quality grade.
However, the Applicant’s Specification provides evidence that “archival quality grade” is one of a finite number of quality graded storage solutions known before the effective filing date of the claimed invention in disclosing in paragraph [0049] of the Specification that “NAND dies may be rated, in descending order of quality, as: Enterprise, High-end consumer, Mainstream consumer, Budget, and Archival.”
Therefore, it would have been “Obvious To Try” any of the know solutions because "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103."KSR, 550 U.S. at 421, 82 USPQ2d at 1397 (see MPEP 2143.I.E).
As to claim 7, while Shiva discloses the connector is compatible with Universal Serial Bus (USB) (see, [0041]), Shiva does not specify the specific USB generation specification anticipated and therefore does not appear to explicitly disclose the USB Type C specifications.
However, the USB Type C specification is one of a finite number of USB specification solutions known and available before the effective filing data of the claimed invention.
Therefore, it would have been “Obvious To Try” any of the know solutions because "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103."KSR, 550 U.S. at 421, 82 USPQ2d at 1397 (see MPEP 2143.I.E).
As to claim 8, Shiva discloses the one or more memory dies (memory die, [0031]) of the first quality grade and the one or more memory dies of the second quality grade may comprise one or more NAND dies and one or more volatile memory dies (any suitable type of memory can be used. Semiconductor memory devices include volatile memory devices, such as dynamic random access memory (“DRAM”) or static random access memory (“SRAM”) devices, non-volatile memory devices…flash memory devices may be configured in a NAND, [0057]).
Referring to claim 9, Shiva discloses a data storage device (fig. 4, 100), comprising: a first data storage controller coupled to a first memory (fig. 4, 420 coupled to 430), the first memory comprising NAND (NAND flash memory cells, [0034]); a second data storage controller coupled to a second memory (fig. 4, 450 coupled to 460); a multiplexer coupled to the first data storage controller and the second data storage controller (fig. 4, 1 connection from 400 becomes 2 connections to either 410 or 440 interfaces coupling to 420 to 450); and a connector coupled to the multiplexer and configured to connect the multiplexer to a host (fig. 4, connector 400 coupled between 1:2 connection and host 300); wherein, based on a memory selection signal, the multiplexer is configured to (a) connect the first data storage controller and the first memory to the host through the multiplexer or (b) connect the second data storage controller and the second memory to the host through the multiplexer (host 300 determines whether to use the SATA interface or the PCIe interface…host 300 then sends a command…and, in response to the command, the switch 400 connect the connector either to the SATA data path or the PCIe data path, [0050]).
While Shiva teaches the first and second memory can each be its own memory unit, Shiva does not appear to explicitly disclose the second memory comprising a magnetic storage device.
However, Ishikawa teaches the second memory comprising a magnetic storage device (fig. 1, HDD device (SAS) 600 or HDD device (SATA) 700).
Shiva and Ishikawa are analogous art because they are from the same field of endeavor, storage systems.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shiva and Ishikawa before him or her, to modify the storage device of Shiva to include the multiple storage types of Ishikawa because different types would provide different storage capabilities and advantages.
The suggestion/motivation for doing so would have been to provide efficient storage capacity and transfers for the needs of a host system (Ishikawa: [0007], [0079]).
Therefore, it would have been obvious to combine Shiva and Ishikawa to obtain the invention as specified in the instant claim.
As to claim 13, the combination of Shiva in view of Ishikawa discloses the connector is a Universal Serial Bus (USB) connector (Shiva: Examples of host interfaces 120 include…universal serial bus (USB), [0041]), the magnetic storage device is a Serial Advanced Technology Attachment (SATA) hard disk drive (HDD) (Ishikawa: fig. 1, HDD device (SAS) 600 or HDD device (SATA) 700), and the second data storage controller comprises a USB-to- SATA bridge (NOTE: Shiva teaches a SATA storage controller interface and a USB alternative embodiment of the host interface, which implies the bridging between a host USB connection and a SATA storage connection).
As to claim 14, while the combination of Shiva in view of Ishikawa teaches a NAND die and different grades of storage, the combination does not appear to explicitly disclose a NAND die having a prime quality grade.
However, the Applicant’s Specification provides evidence that a finite number of quality graded storage solutions were known before the effective filing date of the claimed invention in disclosing in paragraph [0049] of the Specification that “NAND dies may be rated, in descending order of quality, as: Enterprise, High-end consumer, Mainstream consumer, Budget, and Archival.”
Therefore, it would have been “Obvious To Try” any of the know solutions because "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103."KSR, 550 U.S. at 421, 82 USPQ2d at 1397 (see MPEP 2143.I.E).
Claims 2-3 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Shiva in view of Ishikawa, as applied to claims 1, 5-9, and 13-14 above, further in view of Thorpe et al. (US Patent. No. 6941396), hereinafter referred to as Thorpe.
As to claims 2 and 10, while Shiva teaches send a signal to deactivate the second data storage controller while the first data storage controller is connected to the host though the multiplexer; and send a signal to deactivate the first data storage controller while the second data storage controller is connected to the host though the multiplexer (a command (e.g., a set of primitives)…in response to the command, the switch 400 connect the connector…After selecting…perform a device initialization sequence and start afresh, [0050]; NOTE: the performing a device initialization step suggests subsequent deactivated state), Shiva does not appear to explicitly disclose the first and second data storage controllers initiating the sending of the signal.
However, Thorpe teaches a configuration in which a storage controller initiates the deactivation of another (storage controller A may initiate a failover process in which storage controller B is taken off line; col. 5, lines 10-15).
Shiva, Ishikawa, and Thorpe are analogous art because they are from the same field of endeavor, storage systems.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shiva, Ishikawa, and Thorpe before him or her, to modify the storage device of Shiva in view of Ishikawa to include the peer control of Thorpe because the control would allow storage controllers to initiate configuration adaptations.
The suggestion/motivation for doing so would have been to flexible initiation of storage configuration among controllers (Thorpe: col. 15, liens 45-60).
Therefore, it would have been obvious to combine Shiva, Ishikawa, and Thorpe to obtain the invention as specified in the instant claim.
As to claims 3 and 11, while Shiva teaches multiplexer is configured to receive the memory selection signal (a command (e.g., a set of primitives)…in response to the command, the switch 400 connect the connector…After selecting…perform a device initialization sequence and start afresh, [0050]; NOTE: the performing a device initialization step suggests subsequent deactivated state), Shiva does not appear to explicitly disclose the first and second data storage controllers initiating the selection.
However, Thorpe teaches a configuration in which a storage controller initiates the selection (storage controller A may initiate a failover process in which storage controller B is taken off line; col. 5, lines 10-15).
The suggestion/motivation to combine remains as indicated above.
Claims 4 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Shiva in view of Ishikawa, as applied to claims 1, 5-9, and 13-14 above, further in view of Shone et al. (US Pub. No. 2009/0198944), hereinafter referred to as Shone.
As to claims 4 and 12, while Shiva the multiplexer is configured to receive the memory selection signal from the user (a user may decide to switch between these two host interfaces, [0047]), Shiva does not appear to explicitly disclose a user control switch on an external housing of the data storage device.
However, Shone discloses a user control switch on an external housing of the data storage device (SD card may be provided with a physical switch, and the user can control the switch by hand to configure the SD card, [0010]).
Shiva, Ishikawa, and Shone are analogous art because they are from the same field of endeavor, storage systems.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shiva, Ishikawa, and Shone before him or her, to modify the storage device of Shiva in view of Ishikawa to include the hand-controlled switch of Shone to allow a user to physically configure the storage device.
The suggestion/motivation for doing so would have been to physical control to the user (Shone: [0010]).
Therefore, it would have been obvious to combine Shiva, Ishikawa, and Shone to obtain the invention as specified in the instant claim.
Allowable Subject Matter
Claims 15-20 are allowed
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The US Pub. No. 2022/0171539 of Ravimohan et al., the US Pub. No. 2010/0332697 of Zheng et al., and the US Pub. No. 2025/0238157 of Song et al. are pertinent to storage system architecture including multiple storage controllers and the switching/multiplexing of signaling connections.
The examiner has cited particular column, line, and/or paragraph numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in its entirety as potentially teaching of all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c).
Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(11) and Interview Practice for additional details.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T OBERLY whose telephone number is (571)272-6991. The examiner can normally be reached on M-F 800am-430pm (MT).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC T OBERLY/ Primary Examiner, Art Unit 2184
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