DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claim(s) 1-9 are currently pending.
Claim Objections
Claims 1-9 is objected to because of the following informalities:
For proper form, it is suggested that claims 1-9 be amended to read as follows:
1. A multilayer solid state energy storage device comprising:
a silicon core layer;
a dielectric layer comprising an electrically conductive structure defining a contact layer disposed on the silicon core layer,
at least one LED disposed on a surface of the device configured to ionize the silicon core layer using a predetermined frequency of light; and
wherein the contact layer is interposed between the dielectric layer and the silicon core layer and is configured to extract charge carriers from the device when the device is in a charged inversion state.
Appropriate correction is required.
2. An energy storage cell comprising:
a core layer comprising monocrystalline silicon having a thickness between approximately 100 and 300 microns;
a dielectric layer adjacent to the core layer, the dielectric layer having a dielectric constant less than that of the core layer and a bandgap energy greater than that of the core layer;
a discharge contact layer interposed at an interface between the core layer and the dielectric layer and configured to extract charge carriers from the core layer;
a charge contact layer adjacent to the dielectric layer and configured to apply an electric field across the dielectric and core layers;
a common contact layer adjacent to a surface of the core layer opposing the dielectric layer;
a plurality of photo-ionizing light emitting diodes (LEDs) optically coupled to at least one lateral surface of the core layer and configured to emit light with photon energy greater than twice the indirect bandgap of silicon; and
an LED contact layer electrically coupled to the plurality of LEDs and configured to supply a drive potential in reference to the common contact layer, wherein the energy storage cell is configured to store electrical energy through combined photonic and electric field-induced avalanche ionization of the silicon core layer.
3. The energy storage cell of claim 2, wherein the discharge contact layer comprises a mesh of metal rails and metal fingers or graphene fingers and carbon nanotube rails that are diffused into the silicon core layer to a depth of about 20 to 50 microns.
4. The energy storage cell of claim 2, wherein the dielectric layer is composed of silicon nitride deposited via atomic layer deposition or molecular beam epitaxy.
5. The energy storage cell of claim 2, wherein the core layer achieves an inversion state characterized by separation of positive and negative silicon ions by a monolayer of un-ionized silicon atoms.
6. A method of charging an energy storage cell comprising a silicon core layer, a dielectric layer, a discharge contact layer, a charge contact layer, a common contact layer, and photo-ionizing LEDs optically coupled to the core layer, the method comprising:
applying a charge electric potential across the charge contact layer and the common contact layer to generate an electric field across the dielectric and core layers;
activating the photo-ionizing LEDs to emit light having photon energy greater than 2.24 eV to photo-ionize the silicon core layer;
accelerating the photo-excited charge carriers within the silicon core layer by the electric field to induce an avalanche ionization; and
storing electrical energy in the form of ion polarization within the silicon core layer and dipolar polarization within the dielectric layer.
7. The method of claim 6, wherein the dielectric layer transposes the electric field from the charge contact layer to the interface between the dielectric layer and the silicon core layer without allowing free charge carrier interaction.
8. The method of claim 6, wherein the avalanche ionization continues until an inversion state is reached wherein approximately half the silicon atoms in the core layer are ionized.
9. The method of claim 6, further comprising terminating the potential to the discharge contact layer after the dielectric layer becomes sufficiently polarized to transpose the electric field.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-5 and 8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for an energy storage device comprising a Si-core thickness of 200 µm, a Si3N4 dielectric layer having a thickness in a range of 20-50 nm, wherein a coupled electric field potential in the range of 25 V to 70 V is applied across a charge contact layer, does not reasonably provide enablement for the inversion state described in claim 1, the avalanche ionization based energy storage described in claim 2, the separation of positive and negative silicon ions by a monolayer of un-ionized silicon atoms described in claim 5, and the avalanche ionization and inversion state described in claim 8. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the invention commensurate in scope with these claims.
The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
The specification provides detailed technical disclosure, including:
Photo-excitation of the Si-Core layer 110 across its 1.12 eV indirect bandgap (paras. 0061, 0066 and 0082);
Photon energy selection in the range of 2.24 eV-3.4 eV, including a 2.75 eV example (para. 0067);
Impact and avalanche ionization processes (paras. 0085-0099);
Silicon breakdown field potential (~30V/µm) (para. 0087);
Definition of an invention state as nearly half of the Si-Core layer 110 atoms being excited with ion density approaching ~5x1022 ions/cm3 (paras. 0109-0112);
An example including:
Si-core thickness of 200 µm (para. 0138);
Dielectric layer comprising Si3N4 and having a thickness in a range of 20-50 nm (para. 0138);
Coupled electric field potential 25-70 V (para. 0138);
Calculated ion separation widths and stored energy values (Tables 2-3, paras. 0139-0141); and
A methodology relating dielectric thickness, dielectric constant ratio, and coupled electric field potential (para. 0135-0137).
Regarding claim 1
Claim 1 broadly recites: a silicon core layer; a dielectric layer comprising an electrically conductive structure defining a contact layer disposed on the Si core layer, and at least one LED configured to ionize the Si core layer, wherein the contact layer is “configured to extract charge carriers from the device when the device is a charged inversion state.”
The claim does not limit the silicon core thickness, the dielectric material selection and thickness, the dielectric constant ratio, applied electrical field, and the structural parameters to achieve the claimed inversion state.
Accordingly, claim 1 encompasses silicon core layers and dielectric layers materially different from the specific 200 µm/20-50 nm/25-70 V example disclosed.
While the specification provides guidance for a single working example, the record does not stablish that the charged inversion state can be achieved across substantially different core thicknesses or dielectric configurations encompassed by the claim.
The inversion state, as defined in paragraphs [0109]-[0113] of the instant specification, involves:
Nearly half of the Si-Core layer atoms being ionized;
Ion density approaching ~5x1022 ions/cm3;
Monolayer separation region.
Avalanche ionization and ion-density formation are field-sensitive and dependent on:
Electric field magnitude within the Si-Core layer (para. 0138);
Dielectric thickness and dielectric constant (paras. 0135-0137);
Material leakage characteristics (para. 0119).
However, the specification does not provide working examples or quantitative operating criteria demonstrating that substantially different core or dielectric thickness structures encompassed by claim 1 will achieve the claimed inversion state without additional substantial experimentation.
Because claim 1 broadly covers silicon core layers and dielectric layers without limitation, the disclosure does not demonstrate operability across the across the full scope of claim 1 without undue experimentation.
Regarding claim 2
Claim 2 recites:
a core layer comprising monocrystalline silicon having a thickness of between approximately 200 µm and 300 µm;
a dielectric layer…having a dielectric constant less than that of the core layer and a bandgap energy greater than that of the core layer; and
a discharge contact layer interposed at an interface between the core layer and the dielectric layer and configured to extract charge carriers from the core layer;
a charge contact layer adjacent to the dielectric layer and configured to apply an electric field across the dielectric and core layers;
a common contact layer adjacent to a surface of the core layer opposing the dielectric layer;
a plurality of photo-ionizing light emitting diodes (LEDs) configured to emit light with photon energy greater than twice the indirect bandgap of silicon,
an LED contact layer electrically coupled to the plurality of LEDs and configured to supply a drive potential in reference to the common contact layer, wherein the energy storage cell is configured to store electrical energy through combined photonic and electric field-induced avalanche ionization of the silicon core layer.
Claim 2 does not limit the dielectric material selection (beyond relative dielectric constant and band gap), the dielectric thickness, the applied electrical field, and the structural parameters to achieve avalanche ionization.
While the specification enables at least one embodiment within the recited silicon core thickness range, claim 2 encompasses dielectric materials and parameters beyond the specific disclosed working example.
The specification does not demonstrate that avalanche ionization-based energy storage is achievable across the full scope of claim 2 without undue experimentation.
Regarding claims 3 and 4
Claims 3 and 4 are rejected at least for their dependency on claim 2.
Regarding claim 5
Claim 5 is rejected for the reasons set forth in claim 2 above, and additionally because claim 5 recites the limitation: “an inversion state characterized by separation of positive and negative silicon ions by a monolayer of un-ionized silicon atoms.”
The specification describes the inversion state as a condition in which nearly half of the silicon atoms are ionized (para. 0109) and in which the ionized regions are separated by a monolayer of un-ionized silicon atoms having a width of only a few silicon atoms (paras. 0113-0114). The specification further explains that achieving this state requires operation near breakdown-level electric fields and relies on a four-field balance between the coupled electric field, dipolar polarization field of the Si-Core layer, silicon ions field, and dipolar dielectric polarization field (paras. 0105-0108).
The formation of a monolayer separation of positive and negative silicon ions is sensitive to:
Silicon core thickness;
Dielectric thickness and dielectric constant ratio;
Electric field magnitude;
Leakage characteristics of the dielectric layer; and
Maintenance of the four-field balance.
The specification provides theoretical description and calculation for a specific example (see Tables 2-3) but does not establish that such an atomic-scale separation structure can be achieved and maintained across the full scope of the silicon core thicknesses and dielectric configurations encompassed by claim 2 without undue experimentation.
Accordingly, claim 5 is not enabled.
Regarding claim 8
Claim 8 recites the limitation “wherein the avalanche ionization continues until an inversion state is reached wherein approximately half the silicon atoms in the core layer are ionized”.
The inversion state, as defined in paragraphs [0109]-[0113] of the instant specification, involves:
Nearly half of the Si-Core layer atoms being ionized;
Ion density approaching ~5x1022 ions/cm3;
Monolayer separation region.
Avalanche ionization and ion-density formation are field-sensitive and dependent on:
Electric field magnitude within the Si-Core layer (para. 0138);
Dielectric thickness and dielectric constant (paras. 0135-0137);
Material leakage characteristics (para. 0119).
The specification provides guidance for a single working example involving a Si-core thickness of 200 µm, a Si3N4 dielectric layer having a thickness in a range of 20-50 nm, and coupled electric field potential in the range of 25 V to 70 V (para. 0138). However, claim 8, which depends form claim 6, does not limit the core thickness, dielectric thickness, dielectric material, or the electric field potential.
Achieving approximately half-atom ionization is highly sensitive to the electric field magnitude relative to breakdown (para. 0087), dielectric constant ratio (para. 0138), dielectric leakage (para. 0119), and structural geometry.
The specification does not provide guidance demonstrating that the claimed inversion state can be reliably achieved and maintained across the full scope of the silicon core and dielectric configurations encompassed by the claim without undue experimentation.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 3
The limitation “wherein the discharge contact layer comprises a mesh of metal rails and metal fingers or graphene fingers and carbon nanotube rails that are diffused into the silicon core layer to a depth of about 20 to 50 microns” is unclear and therefore renders the claim indefinite. It is not clear what constitutes the discharge contact layer. For example, it is not clear if the discharge contact layer comprises a mesh of metal rail and metal fingers, a mesh of metal rails and metal fingers or graphene fingers, a mesh of graphene fingers and carbon natotube rails, etc. The meets and bound of the claim cannot be determined. Accordingly, one of ordinary skill would not be reasonably apprised of the scope of the claim.
Appropriate correction and clarification is required.
Allowable Subject Matter
Claims 6, 7 and 9 are allowed.
Regarding claims 6, 7 and 9
US 2020/0028012 A1, Regan et al. (hereinafter Regan) teaches a method of charging an energy storage cell (corresponding to a photovoltaic power system 100A) [Figs. 1A-1B and 2, paragraphs 0017, 0029 and 0031], comprising
a silicon core layer (PV cell 113) (the PV cells 113 may comprise Si-based photovoltaic cells) [paragraph 0019];
a dielectric layer (insulator 105) [Figs. 1A-1B and para. 0018],
a discharge contact layer (corresponding to the discharge/charge control electrode 101) [Figs. 1A-1B, paras. 0019 and 0022];
a charge contact layer (positive electrode 103) [Fig. 1A-1B and paragraphs 0017-0019]; and
a common contact layer (negative electrode 109) [Figs. 1A-1B, paragraphs 0018-0019].
Regan further teaches coupling one or more LEDs to the energy storage cell receptacle to emit charging light into a photofuel (see Figs. 20A-20D, paragraph 0031 and claims 6, 8 and 9). However, Regan does not teach:
applying a charge electric potential across the charge contact layer and the common contact layer to generate an electric field across the dielectric and core layers;
activating the photo-ionizing LEDs to emit light having photon energy greater than 2.24 eV to photo-ionize the silicon core layer;
accelerating the photo-excited charge carriers within the silicon core layer by the electric field to induce an avalanche ionization; and
storing electrical energy in the form of ion polarization within the silicon core layer and dipolar polarization within the dielectric layer.
US 5,710,436, Tanamoto et al. (hereinafter Tanamoto) teaches an energy storage device (corresponding to a quantum device) comprising:
a core layer comprising monocrystalline silicon (monocrystalline silicon layer 105) [Figs. 22A-22C and 26-27, Col. 12, lines 25-59 and Col. 14, lines 6-24 and 45-64];
a dielectric layer (corresponding to SiO2 insulating layer 128) [Fig. 27, Abstract, and Col. 14, lines 25-64];
a discharge contact layer (Al electrode 126) [Fig. 27 and Col. 14, lines 25-64]; and
a charge contact layer (gate electrode) [Figs. 26-27 and Col. 14, lines 25-6]; and
a common contact layer (Al electrode 125) [Fig. 27 and Col. 14, lines 25-64].
However, Tanamoto does not alleviate the deficiencies in Regan. Accordingly, the claim is allowed.
Claims 7 and 9 are allowed for their dependency on claim 6.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20090195961 A1, Eisenring teaches a quantum battery comprising a bottom electrode (19) of a n+ silicide, a 300 nm thick SiO2 isolation layer (20), a central 15 nm thick TiO2 layer (21) of a pure Rutile crystal, a further 300 nm thick isolation layer (22) of SiO2 and topped by a titanium electrode (23) [Fig. 2 and paragraph 0022].
US 20130224596 A1, Nakazawa teaches a secondary cell (10) comprising a conductive first electrode (14) formed on a substrate (12), an n-type metal oxide semiconductor layer (16), a charging layer (18) for charging energy, a p-type metal oxide semiconductor layer (20), and a second electrode (22) [Fig. 1 and paragraph 0033].
US 20180175293 A1, Ogasawara teaches a quantum battery (11) comprising a charging layer (3), a first electrode layer (6), and a second electrode layer (7), wherein the first electrode layer (6) is, for example, a negative electrode layer, and includes a first electrode (1) and an n-type metal oxide semiconductor layer (2), and the second electrode layer (7) is, for example, a positive electrode layer, and includes a second electrode (5) and a p-type metal oxide semiconductor layer (4) [Fig. 1, paragraphs 0047, 0050 and 0051].
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/MAYLA GONZALEZ RAMOS/Primary Examiner, Art Unit 1721