DETAILED ACTION
This communication is responsive to the application, filed May 13, 2025. Claims 1-20 are pending in this application.
Examined under the first inventor to file provisions of the AIA
The present application was filed on May 13, 2025, which is on or after March 16, 2013, and thus is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-21 of U.S. Patent No. US 12,327,024 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of present application are fully anticipated by the claims of issued patent. The issued US patent and the instant application are claiming common subject matter. The one of ordinary skill in the art would recognize that they are obvious variants.
Claims 1-15 are compared to claims 1-22 of US patent US 12,327,024 B2 in the following table:
Instant Application
US Patent No : US 12,327,024 B2
1. A method, comprising:
operating a first block in accordance with a first storage density associated with a first threshold quantity of access operations for retirement;
selecting, based at least in part on a second block becoming unreliable for storing information, the first block to switch from operating in accordance with the first storage density to operating the first block in accordance with a second storage density associated with a second threshold quantity of access operations for retirement; and
operating the first block in accordance with the second storage density and in accordance with a remaining quantity of access operations permitted to be performed on the first block, the remaining quantity of access operations based at least in part on the first threshold quantity of access operations associated with the first storage density and on the second threshold quantity of access operations associated with the second storage density.
1. A method, comprising: selecting a first block comprising a first set of memory cells based at least in part on determining that a second block is unreliable for storing information, wherein each memory cell of the first set of memory cells is configured for storing a first quantity of one or more bits;
configuring each memory cell of the first set of memory cells in the first block for storing a second quantity of bits that is more than the first quantity of one or more bits based at least in part on determining that the second block is unreliable;
determining, based at least in part on configuring the first set of memory cells for storing the second quantity of bits, a remaining quantity of access operations permitted to be performed on the first block, and operating the first block based at least in part on the remaining quantity of access operations for the first block.
2. The method of claim 1, further comprising: transmitting, based at least in part on operating the first block in accordance with the second storage density, an indication that an amount of memory available for storing information is reduced.
3. The method of claim 1, further comprising: transmitting, to a host system based at least in part on selecting the first block, an indication that a quantity of blocks available for storing information is reduced.
3. The method of claim 1, wherein operating the first block in accordance with the remaining quantity of access operations comprises: performing the remaining quantity of access operations on the first block; and operating the first block as a read-only block based at least in part on performing the remaining quantity of access operations on the first block.
4. The method of claim 1, wherein operating the first block comprises: performing the remaining quantity of access operations on the first block; and operating the first block as a read-only block based at least in part on performing the remaining quantity of access operations on the first block.
4. The method of claim 1, wherein the remaining quantity of access operations is based at least in part on a ratio of the first threshold quantity of access operations associated with the first storage density and the second threshold quantity of access operations associated with the second storage density.
5. determining a conversion factor that represents a ratio of a threshold quantity of access operations associated with the first block and a threshold quantity of access operations associated with the second block; wherein the remaining quantity is based at least in part on the difference.
5. The method of claim 4, further comprising: determining a quotient of the ratio and a quantity of access operations performed on the first block while operating in accordance with the first storage density; and determining a difference between the quotient and the second threshold quantity of access operations associated with the second storage density, wherein the remaining quantity is based at least in part on the difference.
5. determining a quotient of a quantity of access operations performed on the first block and the conversion factor; determining a difference between the quotient and the threshold quantity of access operations for the second block; determining, based at least in part on configuring the first set of memory cells for storing the second quantity of bits, a remaining quantity of access operations permitted to be performed on the first block, wherein the remaining quantity is based at least in part on the difference.
6. The method of claim 1, further comprising: determining a second remaining quantity of access operations permitted for the first block before operating the first block in accordance with the second storage density, wherein the remaining quantity of access operations is different than the second remaining quantity of access operations.
.
23. The method of claim 22, wherein the conversion factor represents a ratio of the threshold quantity of access operations associated with single-level cells and the threshold quantity of access operations associated with multiple-level cells, the method further comprising: determining a difference between the threshold quantity of access operations associated with multiple-level cells and the quotient, wherein the remaining quantity of access operations is based at least in part on the difference.
7. The method of claim 6, wherein the remaining quantity of access operations and the second remaining quantity of access operations are each based at least in part on a quantity of access operations performed on the first block before operating the first block in accordance with the second storage density.
11. The method of claim 10, wherein a second read count table entry comprises, for a first super memory block corresponding to the read count table entry among the plurality of super memory blocks, a main read count corresponding to the first super memory block and a plurality of sub-read counts corresponding to each of a plurality of sub-areas included in the first super memory block.
8. The method of claim 1, wherein the first block and the second block are included in a memory, the method further comprising: determining that the first block is a cache block for moving data between a host system and other blocks of the memory, wherein the first block is selected based at least in part on determining that the first block is the cache block.
9. The method of claim 1, wherein the first block and the second block are included in a memory, the method further comprising: determining that the first block is a cache block for moving data between a host system and other blocks of the memory, wherein the first block is selected based at least in part on determining that the first block is the cache block.
9. The method of claim 8, further comprising: determining that the second block is in a plane of the memory, wherein the first block is selected based at least in part on the first block being in a same plane of the memory as the second block.
10. The method of claim 9, further comprising: determining that the second block is in a plane of the memory, wherein the first block is selected based at least in part on the first block being in the same plane of the memory as the second block.
10. The method of claim 1, further comprising: determining that a quantity of access operations performed on the second block satisfies a threshold quantity, wherein the second block is determined to be unreliable based at least in part on the quantity of access operations performed on the second block satisfying the threshold quantity.
11. The method of claim 1, further comprising: determining that a quantity of access operations performed on the second block satisfies a threshold quantity, wherein the second block is determined to be unreliable based at least in part on the quantity of access operations performed on the second block satisfying the threshold quantity.
11. The method of claim 1, wherein the first block is included in a set of blocks each of which is operated in accordance with the first storage density, the method further comprising: determining that fewer access operations have been performed on the first block relative to other blocks in the set of blocks, wherein the first block is selected based at least in part on fewer access operations having been performed on the first block relative to the other blocks in the set of blocks.
12. The method of claim 1, wherein the first block is included in a set of blocks each of which comprises memory cells configured for storing the first quantity of one or more bits, the method further comprising: determining that fewer access operations have been performed on the first block relative to one or more other blocks in the set of blocks, wherein the first block is selected based at least in part on fewer access operations having been performed on the first block relative to the one or more other blocks in the set of blocks.
12. The method of claim 1, further comprising: copying data from the second block to the first block based at least in part on the second block being unreliable and based at least in part on selecting the first block.
13. The method of claim 1, further comprising: storing data from the second block in the first block based at least in part on the second block being unreliable and based at least in part on configuring each memory cell in the first set of memory cells for storing the second quantity of bits.
13. The method of claim 1, wherein the first block is selected to be switched to operating in accordance with the second storage density based at least in part on the second block being operated in accordance with the second storage density.
19. A method, comprising: performing a quantity of one or more access operations on a block that comprises a set of memory cells configured as single-level cells each of which is configured for storing multiple bits; converting, after performing the quantity of one or more access operations on the block, the set of memory cells from single-level cells into multiple-level cells configured for storing multiple bits.
14. The method of claim 1, wherein the first storage density is associated with storing one bit per memory cell, and wherein the second storage density is associated with storing multiple bits per memory cell.
19. A method, comprising: performing a quantity of one or more access operations on a block that comprises a set of memory cells configured as single-level cells each of which is configured for storing multiple bits; converting, after performing the quantity of one or more access operations on the block, the set of memory cells from single-level cells into multiple-level cells configured for storing multiple bits.
15. The method of claim 1, wherein the remaining quantity of access operations is based at least in part on a quantity of one or more access operations performed on the first block before switching to operating the first block in accordance with the second storage density.
19. A method, comprising: performing a quantity of one or more access operations on a block that comprises a set of memory cells configured as single-level cells each of which is configured for storing multiple bits; converting, after performing the quantity of one or more access operations on the block, the set of memory cells from single-level cells into multiple-level cells configured for storing multiple bits
The system claims 16-19 and the medium claim 20 recite similar subject matter and are obvious variants of the method claims 1-15 of the instant application and are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-21 of U.S. Patent No. US 12,327,024 B2.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 6-18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kannan et al. (US 2021/0255927 A1) in view of Kuang et al. (US 2016/0041760 A1).
As per claim 1: A method, comprising:
operating a first block in accordance with a first storage density associated with a first threshold quantity of access operations for retirement;
Kannan discloses [0236] an evaluator assigns a portion of memory to other portions of memory based on reliability failures for a portion of memory, associated with access operations for retirement.
selecting, based at least in part on a second block becoming unreliable for storing information, the first block to switch from operating in accordance with the first storage density to operating the first block in accordance with a second storage density associated with a second threshold quantity of access operations for retirement; and
Kannan discloses [0236] the evaluator could determine to convert a portion of memory from type of operation or type of memory (SLC) to another type of operation or memory (QLC). The conversion of memory blocks can be based on becoming unreliable for storing based on threshold for retirement.
operating the first block in accordance with the second storage density and in accordance with a remaining quantity of access operations permitted to be performed on the first block, the remaining quantity of access operations based at least in part on the first threshold quantity of access operations associated with the first storage density and on the second threshold quantity of access operations associated with the second storage density.
Kannan discloses retiring a block based on threshold, but fails to explicitly disclose remaining quantity of operations permitted to be performed on the block. Kuang discloses a similar method, which further teaches [0089, 0097] if the erase count access operation exceeds the SLC threshold, then the block is retired. The access operations are permitted to be performed on the block until it exceeds the SLC threshold and/or on the blocks of the MLC until erase count operation exceeds the MLC threshold.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Kannan with that of Kuang. One would have been motivated to operating the block based at least in part on the remaining quantity of access operations because it allows to control the retirement of the block based on erase cycle [Kuang; 0089, 0097].
As per claim 2: The method of claim 1, further comprising: transmitting, based at least in part on operating the first block in accordance with the second storage density, an indication that an amount of memory available for storing information is reduced.
Kannan discloses [Fig. 7; 0219-0220] the defects map indicates to the memory address space mapper that a physical address space is unusable and the available blocks are reduced since they are defective.
As per claim 3: The method of claim 1, wherein operating the first block in accordance with the remaining quantity of access operations comprises: performing the remaining quantity of access operations on the first block; and operating the first block as a read-only block based at least in part on performing the remaining quantity of access operations on the first block.
Kannan discloses [0236] memories can be configured to be converted from one type of operation (write) to another type (read-only) based on P/E cycles of the blocks.
As per claim 4: The method of claim 1, wherein the remaining quantity of access operations is based at least in part on a ratio of the first threshold quantity of access operations associated with the first storage density and the second threshold quantity of access operations associated with the second storage density.
Kannan discloses [0236] memories can be configured to be converted from one type of operation (write) to another type (read-only) based on P/E cycles of the blocks.
As per claim 6: The method of claim 1, further comprising: determining a second remaining quantity of access operations permitted for the first block before operating the first block in accordance with the second storage density, wherein the remaining quantity of access operations is different than the second remaining quantity of access operations.
Kuang discloses [0089] if the erase count is greater than the TLC threshold, then the retirement state for the block is set to 01, indicating an MLC state or mode of operation for the block. Kuang further discloses selecting blocks based on access operations having been performed on the blocks relative to one or more other blocks in the set.
As per claim 7: The method of claim 6, wherein the remaining quantity of access operations and the second remaining quantity of access operations are each based at least in part on a quantity of access operations performed on the first block before operating the first block in accordance with the second storage density.
Kuang discloses [0089] if the erase count is greater than the TLC threshold, then the retirement state for the block is set to 01, indicating an MLC state or mode of operation for the block. Kuang further discloses selecting blocks based on access operations having been performed on the blocks relative to one or more other blocks in the set.
As per claim 8: The method of claim 1, wherein the first block and the second block are included in a memory, the method further comprising: determining that the first block is a cache block for moving data between a host system and other blocks of the memory, wherein the first block is selected based at least in part on determining that the first block is the cache block.
Kuang discloses [0114] memory elements can include bulk storage and cache memories which provide temporary storage before moving data to/from bulk storage.
As per claim 9: The method of claim 8, further comprising: determining that the second block is in a plane of the memory, wherein the first block is selected based at least in part on the first block being in a same plane of the memory as the second block.
Kuang discloses [Fig. 6; 0062-0072] pages are selected based on the it being in the same plane of the memory.
As per claim 10: The method of claim 1, further comprising: determining that a quantity of access operations performed on the second block satisfies a threshold quantity, wherein the second block is determined to be unreliable based at least in part on the quantity of access operations performed on the second block satisfying the threshold quantity.
Kuang discloses [0089] if the erase count is greater than the TLC threshold, then the retirement state for the block is set to 01, indicating an MLC state or mode of operation for the block.
As per claim 11: The method of claim 1, wherein the first block is included in a set of blocks each of which is operated in accordance with the first storage density, the method further comprising: determining that fewer access operations have been performed on the first block relative to other blocks in the set of blocks, wherein the first block is selected based at least in part on fewer access operations having been performed on the first block relative to the other blocks in the set of blocks.
Kuang discloses [0089] selecting blocks based on access operations having been performed on the blocks relative to one or more other blocks in the set.
As per claim 12: The method of claim 1, further comprising: copying data from the second block to the first block based at least in part on the second block being unreliable and based at least in part on selecting the first block.
Kannan discloses [0236] an evaluator assigns a portion of memory to other portions of memory based on reliability failures for a portion of memory.
As per claim 13: The method of claim 1, wherein the first block is selected to be switched to operating in accordance with the second storage density based at least in part on the second block being operated in accordance with the second storage density.
Kannan discloses [0236] the evaluator could determine to convert a portion of memory from type of operation or type of memory (SLC) to another type of operation or memory (QLC).
As per claim 14: The method of claim 1, wherein the first storage density is associated with storing one bit per memory cell, and wherein the second storage density is associated with storing multiple bits per memory cell.
Kannan discloses [0236] the evaluator could determine to convert a portion of memory from type of operation or type of memory (SLC) to another type of operation or memory (QLC).
As per claim 15: The method of claim 1, wherein the remaining quantity of access operations is based at least in part on a quantity of one or more access operations performed on the first block before switching to operating the first block in accordance with the second storage density.
Kannan discloses [0236] the evaluator could determine to convert a portion of memory from type of operation or type of memory (SLC) to another type of operation or memory (QLC).
As per claims 16-18: Although claims 16-18 are directed towards a system claim, they are rejected under the same rationale as the method claims 1, 2, and 4 above.
As per claim 20: Although claim 20 is directed towards a medium claim, it is rejected under the same rationale as the method claim 1 above.
Allowable Subject Matter
Claims 5 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if they overcome the Double Patenting rejection above and are rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c).
· US 2022/0004495 A1 – Natarajan discloses memory controller to manage cache evictions and/or insertions in a data server based at least in part on host managed data.
· US 2021/0034541 A1 – Maeda discloses memory that includes a buffer region having a plurality of buffer storage regions, each storage region having a plurality of memory cells storing data of a plurality of bits.
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