Prosecution Insights
Last updated: August 15, 2026
Application No. 19/207,559

ELECTRONIC CIRCUIT AND METHOD FOR ADJUSTING A TRANSITION TIME OF BUFFERS OF A BUFFER CHAIN

Non-Final OA §103§112
Filed
May 14, 2025
Priority
Jun 28, 2024 — EU 24185220.1
Examiner
WELLS, KENNETH B
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
The Swatch Group Research and Development Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
1229 granted / 1426 resolved
+18.2% vs TC avg
Minimal +2% lift
Without
With
+2.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
42 currently pending
Career history
1461
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
40.9%
+0.9% vs TC avg
§102
31.9%
-8.1% vs TC avg
§112
20.6%
-19.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1426 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Information Disclosure Statement 2. The information disclosure statement (IDS) submitted on 05/14/25 has been considered by the examiner. Priority 3. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification 4. The disclosure is objected to because of the following informalities: on the penultimate line of paragraph [0005], the word "are" (both occurrences) should be changed to --is--. On lines 3-4 of paragraph [0009], "Now, and with" should be changed to --With--. On the first line of paragraph [0011], the word --with-- should be inserted after "equipped". On the last line of paragraph [0012], the word "to" should be changed to –with--. On line 3 of paragraph [0024], "parallel to" should be changed to --in parallel with-- (to the extent that applicant means that the tunable resistor and ring oscillator are electrically connected in parallel with each other), and on line 4 of this paragraph, the word "is" should be changed to --has--. On line 5 of paragraph [0024], "Here and with a RC" should be changed to --With an RC--. On line 6 of paragraph [0024], "on the basis of" should be changed to --implemented as--, and on the penultimate line of this paragraph, the word "oscillators" should be changed to --oscillator--. On the penultimate line of paragraph [0025], "which gate is" should be changed to --having a gate--. On the first line of paragraph [0026], --a-- should be inserted before the word "ring", and note that the same insertion should also be made at the beginning of line 2 of this paragraph. On line 3 of paragraph [0026], the word "both" should be deleted. On line 4 of paragraph [0026], "to define" should be changed to --defining--. On the second line of paragraph [0032], the word --the-- should be inserted before "form". On the second line of paragraph [0039], it appears that the word "flank" should be changed to --edge--. On line 7 of paragraph [0047], "Turning down" should be changed to --Switching--. On line 6 of paragraph [0050], "detector32" should be changed to --detector 32--. On the first line of paragraph [0052], “Insofar, setting” should be changed to --Setting--. On the penultimate line of paragraph [0052], "have no longer" should be changed to --no longer have--. On line 4 of paragraph [0057], "start-uptime" should be changed to --start-up time--. On line 4 of paragraph [0059], "any of" should be deleted. On the first line of paragraph [0060], the word "described" should be changed to --shown--. On line 4 of paragraph [0064], "digital to analog" should be changed to --digital-to-analog--. On the first line of paragraph [0068], the word "and" should be deleted. On lines 1-2 of paragraph [0069], "to define" should be changed to --of defining--. Appropriate correction is required. Drawings 5. The drawings are objected to because in instant figure 1, blank box 30 needs to be labeled "receiver circuit" and blank box 32 needs to be labeled "oscillation detector". In instant figures 3 and 4, blank box 80 needs to be labeled "control circuit", and also in these two figures, a separate box within box 80 needs to be shown and labeled "dichotomy engine 81". Applicant should note MPEP 608.02(b), subsection II, which indicates that drawing figures should be objected to by the examiner for the situation where unlabeled rectangular boxes shown in the drawings have not been provided with descriptive text labels (note form paragraph 6.22 where the first "Examiner Note" reads as follows: "In bracket 1, insert the reason for the objection, for example, --the unlabeled rectangular box(es) shown in the drawings should be provided with descriptive text labels--". Moreover, applicant should note 37 CFR 1.83(a) which also indicates that each of the rectangular boxes shown in the drawing figures should be illustrated in the form of a labeled rectangular box. Applicant should also note that if the blank boxes are too small to fit the text labels inside these boxes, the text labels can be provided outside of the boxes with a line pointing to the box (as shown, for example, in figure 2 of USPAP 2002/0159276, i.e., blank box 18 with a text label “Oscillator” outside the box 18 with a line pointing thereto). Also in the drawings, no reference numeral 12 is shown in any of the figures, note what is indicated in paragraph [0061], i.e., the chain of buffers 40 needs to be labeled with reference numeral 12. Note the same problem regarding reference numeral 16 which is referred to in paragraph [0065], i.e., nowhere in the drawings is any reference numeral 16 shown. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. 6. The drawings are also objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the oscillator comprising a ring oscillator and the control circuit comprises a tunable resistor in parallel with the ring oscillator, as recited in claim 9, must be shown or the feature canceled from the claims. Note that none of the figures shows a ring oscillator comprising a tunable resistor in parallel with the ring oscillator, i.e., claim 9 appears to be directed to the embodiment of applicant’s invention shown in figure 5, but in this figure the resistor 87 is not in parallel with ring oscillator 72 (resistor 87 is simply coupled between supply voltage vdd and the non-inverting input terminal of comparator 95). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections 7. Claims 1-15 are objected to because of the following informalities: Throughout the claims, the reference numerals listed in parentheses should be deleted, i.e., "(100)" on the first line of claim 1 should be deleted, as should "(40, 40', 40")" on line 2 of claim 1, "(40)" on line 2 of claim 1, "(45)" and "(46)" on line 3 of claim 1, etc. On line 3 of claim 8, "an" should be changed to --the--, note that an end of the chain of buffers has already been recited on the first two lines of claim 7. On line 3 of claim 9, "parallel to" should be changed to --in parallel with-- (to the extent that applicant means that the tunable resistor and ring oscillator are parallel-connected to each other). On line 5 of claim 10, the word "wherein" should be changed to --and--. On lines 4 of claim 11, the word "comprise" should be changed to --comprises--. Appropriate correction is required. Claim Rejections - 35 USC § 112(a) 8. The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. Claims 9-14 are rejected under 35 U.S.C. 112(a) as failing to comply with the enablement requirement. The claims contain subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. The originally filed specification and drawings do not support what is recited in claims 9-14, i.e., there is no disclosure of the oscillator of claim 1 comprising a ring oscillator and wherein the control circuit of claim 1 comprises a tunable resistor in parallel with the ring oscillator, as noted above, and therefore the electronic circuit recited in claims 9-14 is not enabled by the originally filed specification and drawings. Claim Rejections - 35 USC § 112(b) 9. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 9-14 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. As noted above, the originally filed specification and drawings do not support what is recited in claims 9-14, i.e., there is no disclosure of the oscillator of claim 1 comprising a ring oscillator and wherein the control circuit of claim 1 comprises a tunable resistor in parallel with the ring oscillator, and therefore claims 9-14 are indefinite because they are inconsistent with what is shown in the originally filed drawings, i.e., they are misdescriptive of applicant's invention and therefore indefinite. Claim Rejections - 35 USC § 103 10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1, 2, 4-6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Callahan et al (USP 6,531,974) in view of Rana et al (USP 9,325,323). Callahan et al discloses, in figure 3, an electronic circuit comprising: a chain of buffers (buffer chain 30), wherein each buffer comprises a buffer input (the inherent input of each buffer 44), a buffer output (the inherent output of each buffer 44), a current source (the tail current source of each buffer 44, see figure 4 of Callahan et al, i.e., the claimed current source reads on the NMOS footer transistor shown in this figure) and a buffer capacitor (although Callahan et al does not show such a buffer capacitor within each of the buffers 44, such would have been obvious to one of ordinary skill in the art, the reason being that it was old and well-known in the art before the effective filing date of applicant's invention to include such a buffer capacitor, one such example of this well-known concept being shown in figure 1 of Rana et al, note such buffer capacitors 111A through 111E which are used for the purpose of providing stabilization of the inverter outputs, as indicated at column 2, lines 49-53, of Rana et al, i.e., it would have been obvious to include such a buffer capacitor in each of the buffers 44 of Callahan et al, the motivation for such being two provide stabilization of the outputs of the individual buffers), and wherein a transition time of each buffer is controllable by the buffer current source (inherently in Callahan et al's figure 3, a transition time of each buffer 44 is controllable by the buffer current source, i.e., the above-noted tail current source shown in figure 4), an oscillator (either ring oscillator 28 or the obvious oscillator used for providing the External Clock Reference 24 shown in figure 3 of Callahan et al) configured to generate an oscillating reference signal, and a control circuit (all of the circuitry shown in figure 3 of Callahan et al between input line 26 and output line 32, i.e., the claimed control circuit is formed by all of the circuitry shown between the chain 30 of buffers at the top of the figure and the phase locked loop 20 at the bottom of the figure) coupled to the oscillator and coupled to the buffer current sources of the buffers, and operable to adjust the transition time of each buffer on the basis of the oscillating reference signal (inherently in figure 3 of Callahan et al, the transition time of each buffer 44 is adjusted by the output of Callahan et al's control circuit and such adjustment is performed on the basis of the oscillating reference is output by the above-noted oscillator). As to claim 2, note Callahan et al's Digital input to IDAC:b [n:1] shown in figure 3. As to claim 4, note that Callahan et al's oscillator inherently comprises a clock to generate a clock signal. As to claims 5 and 6, although Callahan et al does not disclosed the claimed counter and flip-flop configured as recited in these two claims, such would have been obvious to one of ordinary skill in the art, the reason being that it was old and well-known in the art before the effective filing date of applicant's invention that the control circuitry of a phase locked loop typically includes a counter and flip-flop configured as recited in claims 5 and 6, one example of this well-known concept being disclosed by Cheng (USP 7,116,144), note the counter 700 and flip-flop 708 shown in figure_7 of this reference, and note further that the motivation for using such a counter and flip-flop in Callahan et al's figure 3 is a simple substitution of known one phase locked loop control circuit for another. As to claim 15, note that the electronic circuit shown in figure 3 of Callahan et al inherently performs adjustment of the transition time of buffers 44, as noted above, and making the above-noted oscillating reference signal constant versus PVT would have been obvious to one of ordinary skill in the art, the reason being that it was old and well-known in the art that a constant versus PVT clock signal is desirable and an integrated circuit for the well-known purpose of maintaining synchronization and stability of the input and output signals thereof, of which fact official notice is taken by the examiner. Allowable Subject Matter 11. Claims 3, 7 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: none of the prior art of record discloses or suggests the electronic circuit of claim 2 with the further limitation that the control circuit comprises a dichotomy engine configured to generate a digital input signal to the digital-to-analog converter, as recited in claim 3; nor does any of the prior art of record disclose or suggest the electronic circuit of claim 1 with the further limitation that an end of the chain of buffers is connected to a start of the chain of buffers via an inverter, as recited in claim 7. Claim 8 is allowable in view of its dependency on allowable claim 7. Prior Art Not Relied Upon 12. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Figure 2 of Ochiai, figure 13a of Lin, figure 5 of Lim et al and figure 5 of Kobayashi show further examples of coupling a capacitor to the output of a buffer element, i.e., similar to the above-noted disclosure by Rana et al. Conclusion 13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH B WELLS whose telephone number is (571)272-1757. The examiner can normally be reached Monday-Friday, 8:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGIS J BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KENNETH B WELLS/Primary Examiner, Art Unit 2836 July 10, 2026
Read full office action

Prosecution Timeline

May 14, 2025
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
88%
With Interview (+2.2%)
1y 10m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1426 resolved cases by this examiner. Grant probability derived from career allowance rate.

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