CTNF 19/209,159 CTNF 83387 DETAILED ACTION This Office Action, based on application 19/209,159 filed 15 May 2025, is filed responsive to the initial filing of the application. Claims 2-20 , as amended on 28 July 2025, are currently pending and have been fully considered below. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement The information disclosure statements (IDS) submitted on 28 July 2025 and 7 October 2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Claim Objections The following claims are objected to due to informalities: Claims 8 and 19 : The claims recite exactly the same limitations and are rendered redundant; one of the two claims should be amended or cancelled. Appropriate correction is required. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 2-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over the claims of U.S. Patent No. 12,321,620 . Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application recite similar limitations such that the claims of US Patent 12,321,620 anticipate the claims of the instant application. US Patent 12,321,620 Claim 1 Instant Application Claim 2 through 6 An apparatus, comprising: a memory device; and a controller coupled with the memory device and configured to cause the apparatus to: A memory system, comprising: one or more memory devices; and one or more controllers coupled with the one or more memory devices and configured to cause the memory system to: perform a first flushing operation to transfer first data from a first block of memory cells to a second block of memory cells; CLAIM 6: wherein the one or more controllers are configured to cause the memory system to: perform a first flushing operation to transfer first data from the first block of memory cells to a second block of memory cells of the one or more memory devices, wherein receiving the command is in accordance with performing the first flushing operation receive, at the memory device, a command to remove temporary data from at least the first block of memory cells based at least in part on performing the first flushing operation, wherein the first block of memory cells comprises a zone having a first zone size, and wherein the first zone size corresponds to a first amount of memory cells that are used to store at least a portion of the temporary data; receive a command to remove data from at least a first block of memory cells of the one or more memory devices, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; determine whether a second amount of memory cells satisfies a threshold that is based at least in part on an available zone size, wherein the second amount of memory cells is based at least in part on a size of the temporary data, and wherein the available zone size corresponds to a third amount of memory cells of the first block of memory cells available to store the temporary data; configure the zone to increase or decrease by a quantity of memory cells from the first zone size to a second zone size in the first block of memory cells based at least in part on determining whether the second amount of memory cells satisfies the threshold, wherein the second zone size corresponds to a fourth amount of memory cells of the first block of memory cells, wherein the fourth amount of memory cells is less than or equal to the third amount of memory cells of the first block of memory cells associated with the available zone size; adjust the first quantity of memory cells to obtain a second quantity of memory cells in accordance with whether a third quantity of memory cells satisfies a threshold, wherein the threshold corresponds to a fourth quantity of memory cells of the first block of memory cells available to store the data; CLAIM 3 : wherein, to adjust the first quantity of memory cells, the one or more controllers are configured to cause the memory system to: increase the first quantity of memory cells to obtain the second quantity of memory cells in accordance with the third quantity of memory cells satisfying the threshold, wherein the second quantity of memory cells is equal to the fourth quantity of memory cells CLAIM 4: wherein, to adjust the first quantity of memory cells, the one or more controllers are configured to cause the memory system to: increase the first quantity of memory cells to obtain the second quantity of memory cells in accordance with the third quantity of memory cells failing to satisfy the threshold, wherein the first quantity of memory cells is increased by a quantity of memory cells corresponding to a summation of the first quantity of memory cells and the third quantity of memory cells CLAIM 5 : wherein the one or more controllers are configured to cause the memory system to: decrease the second quantity of memory cells to obtain a fifth quantity of memory cells in accordance with the second quantity of memory cells satisfying the threshold, wherein the second quantity of memory cells is equal to the fourth quantity of memory cells execute the received command to remove the temporary data from at least the first block of memory cells based at least in part on configuring the zone to increase or decrease; and execute the command to remove the data from at least the first block of memory cells in accordance with increasing or decreasing the first quantity of memory cells. store, based at least in part on executing the received command, second temporary data in the fourth amount of memory cells of the first block of memory cells. US Patent 12,321,620 Claim 1 Instant Application Claims 10 through 17 An apparatus, comprising: a memory device; and a controller coupled with the memory device and configured to cause the apparatus to: A memory system, comprising: one or more memory devices; and one or more controllers coupled with the one or more memory devices and configured to cause the memory system to: perform a first flushing operation to transfer first data from a first block of memory cells to a second block of memory cells; receive, at the memory device, a command to remove temporary data from at least the first block of memory cells based at least in part on performing the first flushing operation, wherein the first block of memory cells comprises a zone having a first zone size, and wherein the first zone size corresponds to a first amount of memory cells that are used to store at least a portion of the temporary data; receive a command to remove data from at least a first block of memory cells of the one or more memory devices, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; determine whether a second amount of memory cells satisfies a threshold that is based at least in part on an available zone size, wherein the second amount of memory cells is based at least in part on a size of the temporary data, and wherein the available zone size corresponds to a third amount of memory cells of the first block of memory cells available to store the temporary data; set a daily delete data size in response to receiving the command, the daily delete data size corresponding to a second quantity of memory cells; and configure the zone to increase or decrease by a quantity of memory cells from the first zone size to a second zone size in the first block of memory cells based at least in part on determining whether the second amount of memory cells satisfies the threshold, wherein the second zone size corresponds to a fourth amount of memory cells of the first block of memory cells, wherein the fourth amount of memory cells is less than or equal to the third amount of memory cells of the first block of memory cells associated with the available zone size; adjust the first quantity of memory cells to obtain a third quantity of memory cells in accordance with whether the daily delete data size satisfies a threshold. CLAIM 11: wherein, to adjust the first quantity of memory cells, the one or more controllers are configured to cause the memory system to: decrease the first quantity of memory cells to obtain the third quantity of memory cells in accordance with the daily delete data size failing to satisfy the threshold, wherein the third quantity of memory cells corresponds to a default size CLAIM 12: where the one or more controllers are configured to cause the memory system to: determine whether a quantity satisfies a second threshold in accordance with the daily delete data size satisfying the threshold, wherein the quantity corresponds to a difference between the first quantity of memory cells and a fourth quantity of memory cells, and wherein the fourth quantity of memory cells corresponds to a quantity of data associated with a write booster mode of the memory system that is transferred from the first block of memory cells to a second block of memory cells and subsequently deleted over a duration CLAIM 13: wherein, to adjust the first quantity of memory cells, the one or more controllers are configured to cause the memory system to: decrease the first quantity of memory cells to obtain the third quantity of memory cells in accordance with the quantity failing to satisfy the second threshold, wherein the third quantity of memory cells corresponds to a default size CLAIM 14 : wherein, to adjust the first quantity of memory cells, the one or more controllers are configured to cause the memory system to: increase the first quantity of memory cells by the quantity to obtain the third quantity of memory cells in accordance with the quantity satisfying the second threshold CLAIM 15: wherein the one or more controllers are configured to cause the memory system to: adjust the third quantity of memory cells to a fourth quantity of memory cells in accordance with whether the third quantity of memory cells satisfies a second threshold, wherein the second threshold corresponds to a fifth quantity of memory cells of the first block of memory cells available to store the data CLAIM 16: wherein, to adjust the third quantity of memory cells, the one or more controllers are configured to cause the memory system to: decrease the third quantity of memory cells to the fourth quantity of memory cells in accordance with the third quantity of memory cells satisfying the second threshold, wherein the fourth quantity of memory cells is equal to the fifth quantity of memory cells CLAIM 17 : wherein, to adjust the third quantity of memory cells, the one or more controllers are configured to cause the memory system to: increase the third quantity of memory cells to the fourth quantity of memory cells in accordance with the third quantity of memory cells failing to satisfy the second threshold, wherein the fourth quantity of memory cells is equal to the fifth quantity of memory cells execute the received command to remove the temporary data from at least the first block of memory cells based at least in part on configuring the zone to increase or decrease; and store, based at least in part on executing the received command, second temporary data in the fourth amount of memory cells of the first block of memory cells. US Patent 12,321,620 Claim 11 Instant Application Claim 20 A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to: A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of an electronic device, cause the electronic device to: perform a first flushing operation to transfer first data from a first block of memory cells to a second block of memory cells; receive, at the electronic device, a command to remove temporary data from at least the first block of memory cells based at least in part on performing the first flushing operation, wherein the first block of memory cells comprises a zone having a first zone size, and wherein the first zone size corresponds to a first amount of memory cells that are used to store at least a portion of the temporary data; receive a command to remove data from at least a first block of memory cells, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; determine whether a second amount of memory cells satisfies a threshold that is based at least in part on an available zone size, wherein the second amount of memory cells is based at least in part on a size of the temporary data, and wherein the available zone size corresponds to a third amount of memory cells of the first block of memory cells available to store the temporary data; configure the zone to increase or decrease by a quantity of memory cells from the first zone size to a second zone size in the first block of memory cells based at least in part on determining whether the second amount of memory cells satisfies the threshold, wherein the second zone size corresponds to a fourth amount of memory cells of the first block of memory cells, wherein the fourth amount of memory cells is less than or equal to the third amount of memory cells of the first block of memory cells associated with the available zone size; adjust the first quantity of memory cells to obtain a second quantity of memory cells in accordance with whether a third quantity of memory cells satisfies a threshold, wherein the threshold corresponds to a fourth quantity of memory cells of the first block of memory cells available to store the data; and execute the received command to remove the temporary data from at least the first block of memory cells based at least in part on configuring the zone to increase or decrease; and execute the command to remove the data from at least the first block of memory cells in accordance with increasing or decreasing the first quantity of memory cells. store, based at least in part on executing the received command, second temporary data in the fourth amount of memory cells of the first block of memory cells. US Patent 12,321,620 Claim 2 Instant Application Claim 7 The apparatus of claim 1 The memory system of claim 2 wherein the controller is further configured to cause the apparatus to: set the available zone size based at least in part on the third amount of memory cells and on a third zone size corresponding to a fifth amount of memory cells of the first block of memory cells, the third zone size being associated with a write booster at the memory device wherein the third quantity of memory cells corresponds to one of: a first quantity of data associated with a write booster mode of the memory system that is transferred from the first block of memory cells to a second block of memory cells of the one or more memory devices, wherein the first quantity of data is subsequently deleted over a first duration, a second quantity of data associated with the write booster mode of the memory system that is transferred from the first block of memory cells to the second block of memory cells, wherein the second quantity of data is subsequently deleted over a second duration that immediately precedes the first duration, or a size of the data received in the command US Patent 12,321,620 Claim 8 Instant Application Claims 8 and 19 The apparatus of claim 1 The memory system of claim 2 wherein: the first block of memory cells comprises single level cells; and the second block of memory cells comprises tri-level cells wherein the first block of memory cells comprises single level cells US Patent 12,321,620 Claim 9 Instant Application Claim 9 The apparatus of claim 1, The memory system of claim 2, wherein the received command comprises an unmap command wherein the command comprises an unmap command US Patent 12,321,620 Claim 2 Instant Application Claim 18 The apparatus of claim 1 The memory system of claim 10 wherein the controller is further configured to cause the apparatus to: set the available zone size based at least in part on the third amount of memory cells and on a third zone size corresponding to a fifth amount of memory cells of the first block of memory cells, the third zone size being associated with a write booster at the memory device wherein the third quantity of memory cells corresponds to one of: a first quantity of data associated with a write booster mode of the memory system that is transferred from the first block of memory cells to a second block of memory cells of the one or more memory devices, wherein the first quantity of data is subsequently deleted over a first duration, a second quantity of data associated with the write booster mode of the memory system that is transferred from the first block of memory cells to the second block of memory cells, wherein the second quantity of data is subsequently deleted over a second duration that immediately precedes the first duration, or a size of the data received in the command Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 2-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception without significantly more. Patent Eligibility is determined as set forth under the 2019 Patent Eligibility Guidelines (see MPEP § 2106). The analysis of the claims in view of the guidelines are presented below. Claim 2 : Regarding Step 1, the claim is directed to an apparatus (or machine/manufacture). Thus, the claim is directed to one of the four categories of invention. Regarding Step 2A Prong 1, this part of the eligibility analysis evaluates whether the claim recites a judicial exception. The claim includes the following limitations: A memory system, comprising: one or more memory devices; and one or more controllers coupled with the one or more memory devices and configured to cause the memory system to: receive a command to remove data from at least a first block of memory cells of the one or more memory devices, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; adjust the first quantity of memory cells to obtain a second quantity of memory cells in accordance with whether a third quantity of memory cells satisfies a threshold, wherein the threshold corresponds to a fourth quantity of memory cells of the first block of memory cells available to store the data ; and execute the command to remove the data from at least the first block of memory cells in accordance with increasing or decreasing the first quantity of memory cells. The underlined portions of Limitation (5) above broadly recite a process for calculating or determining a size of a zone (or ‘first quantity of memory cells’) in memory. The limitation determines whether to adjust the ‘first quantity of memory cells’ based on criteria in relation to third and fourth quantities of memory cells. Enumerated groupings of abstract ideas include “Mental Processes (MPEP 2106.04(a)). The Office has determined that the actions of the underlined portions of Limitation (5) fall within the “Mental Processes” grouping of abstract ideas as the limitations can practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (see MPEP 2106.04(a)(2)(III)). The noted actions of Limitation (5) effectively evaluates a value based on observed values. The Office has determined the claim recites a judicial exception requiring further analysis under Step 2A Prong 2. Regarding Step 2A Prong 2, this part of the eligibility analysis evaluates whether the claim as a whole integrates the recited judicial exception into a practical application of the exception. This evaluation is performed by (a) identifying whether there are any additional elements recited in the claim beyond the judicial exception, and (b) evaluating those additional elements individually and in combination to determine whether the claim as a whole integrates the exception into a practical application. Besides the abstract idea of the claim, the claim further recites: A memory system, comprising: one or more memory devices ; and one or more controllers coupled with the one or more memory devices and configured to cause the memory system to: receive a command to remove data from at least a first block of memory cells of the one or more memory devices, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data ; adjust the first quantity of memory cells to obtain a second quantity of memory cells in accordance with whether a third quantity of memory cells satisfies a threshold, wherein the threshold corresponds to a fourth quantity of memory cells of the first block of memory cells available to store the data; and execute the command to remove the data from at least the first block of memory cells in accordance with increasing or decreasing the first quantity of memory cells . The underlined portions of Limitations (2)-(4) and (6) above have been identified to recite additional elements beyond the judicial exception. Limitations (2) and (3) further limit the claimed memory system to comprise structural elements including a memory device and a controller. The controller is limited to being configured to perform the functions of the identified abstract idea and further configured to execute the command received by the memory device in accordance with the size of the first quantity of memory cells. The specification at ¶[0140] recites “the various illustrative blocks and components described in connection with the disclosure herein may be implemented or performed by a general-purpose processor … a general-purpose processor may be … any … controller”. As such, the claimed apparatus comprising structural elements are recited at a high-level of generality such that they merely comprise generic computing elements used to apply the identified abstract idea. Accordingly, the additional elements of a memory device and a controller do not integrate the abstract idea into a practical application because the structural components do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)). Limitation (4) further limit the claimed apparatus to receiving a command to remove data. The Office asserts the limitation constitutes a pre-solution activity of gathering data for use in the claimed abstract idea as the limitation is generally related to the abstract idea of adjusting the first quantity of cells as the data to be removed is stored in the first quantity of cells. As such, Limitation (4) amounts to insignificant extra-solution activity as the limitation amounts to mere data gathering or data output to which the courts have determined to be insignificant extra-solution activity (MPEP 2106.05(g)). Limitation (6) further limits the claimed apparatus to executing the received command to remove data in accordance with the adjustment of the first quantity of cells. While the claim is recited to remove data based a value, the claim fails to recite how determining or setting the value accomplishes the result of data removal. As such, the limitation does not integrate the abstract idea into a practical application because the limitation is equivalent to the words “apply it” (MPEP 2106.05(f)). As such, the claim does not include additional elements that integrate the judicial exception into a practical application requiring further analysis under Step 2B. Regarding Step 2B, this part of the eligibility analysis evaluates the additional elements of the claim to determine whether they amount to an inventive concept. As noted above in conjunction with the analysis of Step 2A Prong 2, those additional elements have been identified. Limitations (2) and (3) further limit the claimed apparatus to comprise structural elements including a memory device and a controller. As noted in the analysis of the elements in conjunction with Step 2A Prong 2, the claimed apparatus comprising structural elements are recited at a high-level of generality such that they merely comprise generic computing elements used to apply the identified abstract idea. Accordingly, the additional elements of a memory device and a controller do not add significantly more than the judicial exception because the structural components do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)). Limitation (4) further limit the claimed apparatus to receiving a command to remove data. The courts have recognized, similar to the elements of the limitation, that computer functions including “storing and retrieving information in memory” are well-understood, routine, and conventional functions when they are claimed in a merely generic manner or as insignificant extra-solution activity (MPEP 2106.05(d)(II)). Limitation (6) further limits the claimed apparatus to executing the received command to remove data based on determining the second zone size of the identified abstract idea. As noted in the analysis of the elements in conjunction with Step 2A Prong 2, the limitation does not integrate the abstract idea into a practical application because the limitation is equivalent to the words “apply it” (MPEP 2106.05(f)). As such, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception and thus are not patent eligible. Claim 10 : The claim recites the following limitations: A memory system, comprising: one or more memory devices; and one or more controllers coupled with the one or more memory devices and configured to cause the memory system to: receive a command to remove data from at least a first block of memory cells of the one or more memory devices, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; set a daily delete data size in response to receiving the command, the daily delete data size corresponding to a second quantity of memory cells ; and adjust the first quantity of memory cells to obtain a third quantity of memory cells in accordance with whether the daily delete data size satisfies a threshold Similar to the analysis of Claim 2 above: The claim is directed to an apparatus (or machine/manufacture); thus, the claim is directed to one of the four categories of invention. Limitations (5) and (6) recite a judicial exception. Limitations (2) through (4) recite additional elements that fail to integrate the recited judicial exception into a practical application. Limitations (2) through (4) do not include additional elements that are sufficient to amount to significantly more than the judicial exception. Claim 20 : The claim recites the following limitations: A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of an electronic device, cause the electronic device to: receive a command to remove data from at least a first block of memory cells, wherein the first block of memory cells comprises a first quantity of memory cells allocated to store at least a portion of the data; adjust the first quantity of memory cells to obtain a second quantity of memory cells in accordance with whether a third quantity of memory cells satisfies a threshold, wherein the threshold corresponds to a fourth quantity of memory cells of the first block of memory cells available to store the data ; and execute the command to remove the data from at least the first block of memory cells in accordance with increasing or decreasing the first quantity of memory cells Similar to the analysis of Claim 2 above: The claim is directed to an apparatus (or machine/manufacture); thus, the claim is directed to one of the four categories of invention. Limitation (3) recites a judicial exception. Limitations (1), (2) and (4) recite additional elements that fail to integrate the recited judicial exception into a practical application. Limitations (1), (2) and (4) do not include additional elements that are sufficient to amount to significantly more than the judicial exception. Claims 3 through 5 and 7 Beyond the analysis of Claim 2 , the additional limitations incorporated into Claims 3-5 and 7 have been found to further limit the identified abstract idea of each respective parent claim. Claims 3-5 and 7 are directed to further defining Claim 2 ’s Limitation (5) directed to determining how the first number of memory cells is to be adjusted. For similar reasons provided in the analysis of the limitations in conjunction with Claim 2 above, the Office has determined that the additional limitations of the dependent claims fall within the “Mental Processes” grouping of abstract ideas as the limitations may practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claims do not comprise any additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. Claim 6 Claim 6 recites a limitation beyond that recited in parent Claim 2 ; the limitation is not found to further the identified “Mental Process” in the parent claim. However, Claim 6 is further directed to a judicial exception due to the identified “Mental Process” of Claim 2 . Claim 6 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. While Claim 6 further recite an additional element of performing a flushing operation, the Office asserts the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception since the transfer of data from one block to another is unrelated or unaffected by the performance as to how the first number of memory cells is calculated or determined. As the operation merely comprises reading data from one memory location and then writing the data to another memory location, the limitation has been determined to constitute a post-solution activity of gathering data for use in the claimed abstract idea. As such, The limitation amounts to insignificant extra-solution activity as the limitation amounts to mere data gathering or data output to which the courts have determined to be insignificant extra-solution activity (MPEP 2106.05(g)). Furthermore, the courts have recognized, similar to the elements of the limitation, that computer functions including “storing and retrieving information in memory” are well-understood, routine, and conventional functions when they are claimed in a merely generic manner or as insignificant extra-solution activity (MPEP 2106.05(d)(II)). Claims 8 and 19 Claims 8 and 19 recite a limitation beyond that recited in parent Claim 2 ; the limitation is not found to further the identified “Mental Process” in the parent claim. However, Claims 8 and 19 are further directed to a judicial exception due to the identified “Mental Process” of Claim 2 . Claims 8 and 19 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. While Claims 8 and 19 further recite an additional element of the memory cells comprising SLCs, the Office asserts the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception since limiting the blocks of memory cells is merely an incidental or token addition to the claims since the blocks of memory cells do not alter or affect the performance as to how the first number of memory cells is calculated or determined. As such, limiting the blocks of memory cells to comprise single level or tri-level (or even some other level) does nor more than generally link the judicial exception to a particular technology environment or field of use (MPEP 2106.05(h)) Claim 9 Claim 9 recites a limitation beyond that recited in parent Claim 2 ; the limitation is not found to further the identified “Mental Process” in the parent claim. However, Claim 9 is further directed to a judicial exception due to the identified “Mental Process” of Claim 2 . Claim 9 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. While Claim 9 further recite an additional element of the command being an unmap command, the Office asserts the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception since labeling the command to be an ‘unmap’ command merely an incidental or token addition to the claim since labeling or associating the command with a type of command does not alter or affect the performance as to how the first number of memory cells is calculated or determined. As such, limiting the blocks of memory cells to comprise single level or tri-level (or even some other level) does nor more than generally link the judicial exception to a particular technology environment or field of use (MPEP 2106.05(h)) Claims 11 through 17 Beyond the analysis of Claim 10 , the additional limitations incorporated into Claims 11-17 have been found to further limit the identified abstract idea of each respective parent claim. Claims 11-17 are directed to further defining Claim 10 ’s Limitation (5) directed to determining a data delete size. For similar reasons provided in the analysis of the limitations in conjunction with Claim 10 above, the Office has determined that the additional limitations of the dependent claims fall within the “Mental Processes” grouping of abstract ideas as the limitations may practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claims do not comprise any additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. Claim 18 Beyond the analysis of Claim 10 , the additional limitations incorporated into Claims 18 have been found to further limit the identified abstract idea of the parent claim. Claim 18 is directed to further defining Claim 10 ’s Limitation (6) directed to determining a first number of memory cells. For similar reasons provided in the analysis of the limitations in conjunction with Claim 10 above, the Office has determined that the additional limitations of the dependent claims fall within the “Mental Processes” grouping of abstract ideas as the limitations may practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claims do not comprise any additional elements requiring further analysis under Step 2A Prong 2 and Step 2B. Allowable Subject Matter Claims 2-20 are allowed over prior art. As similarly noted in parent application 17/726,101 (now US Patent 12,321,620), while prior art including TAKAHASHI (US PGPub 2016/0259594) discloses a process for increasing capacity of a spare area responsive to receiving a unmap command and prior art including OU (US PGPub 2020/0026436) discloses a process for comparing storage space sizes to thresholds responsive to receiving a trim/erase/unmap command, prior art has not been found to explicitly disclose the steps of setting the zone size (or ‘a first quantity of memory cells’) responsive to receiving a command to remove data as limited in the claims. The Office would like to emphasize that while one or more reasons are offered as to why the claims are allowable over the prior art, it is each claim, taken as a whole, including interrelationships and interconnections between various claimed elements which are allowable over the prior art of record and not any individual limitation of a claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T LOONAN whose telephone number is (571)272-6994. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla can be reached at 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC T LOONAN/Examiner, Art Unit 2137 Application/Control Number: 19/209,159 Page 2 Art Unit: 2137 Application/Control Number: 19/209,159 Page 3 Art Unit: 2137 Application/Control Number: 19/209,159 Page 4 Art Unit: 2137 Application/Control Number: 19/209,159 Page 5 Art Unit: 2137 Application/Control Number: 19/209,159 Page 6 Art Unit: 2137 Application/Control Number: 19/209,159 Page 7 Art Unit: 2137 Application/Control Number: 19/209,159 Page 8 Art Unit: 2137 Application/Control Number: 19/209,159 Page 9 Art Unit: 2137 Application/Control Number: 19/209,159 Page 10 Art Unit: 2137 Application/Control Number: 19/209,159 Page 11 Art Unit: 2137 Application/Control Number: 19/209,159 Page 12 Art Unit: 2137 Application/Control Number: 19/209,159 Page 13 Art Unit: 2137 Application/Control Number: 19/209,159 Page 14 Art Unit: 2137 Application/Control Number: 19/209,159 Page 15 Art Unit: 2137 Application/Control Number: 19/209,159 Page 16 Art Unit: 2137 Application/Control Number: 19/209,159 Page 17 Art Unit: 2137 Application/Control Number: 19/209,159 Page 18 Art Unit: 2137 Application/Control Number: 19/209,159 Page 19 Art Unit: 2137 Application/Control Number: 19/209,159 Page 20 Art Unit: 2137
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