The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
Claim(s) 1-20 has/have been examined.Claim(s) 1-20 have been rejected.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1, 3, 7-9, 11, 12 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4 and 7 of U.S. Patent 12,339,758. Although the claims at issue are not identical, they are not patentably distinct from each other as described below.
Claim 1 recites limitations found in claim 1 of the patent. Claim 3 recites limitations found in claim 7 of the patent (the claimed idle status).
Claims 7, 11 and 15 recite limitations found in claim 1 of the patent.
Claim 8 recites limitations found in claim 1 of the patent. While the claim does not recite performing inference tasks. It is well known in the art that a neural network is designed to perform inference tasks.
Claim 14 recites limitations found in claim 4 of the patent.
Claims 1, 3, 4, 6-8 and 11 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 5 and 11 of U.S. Patent 11,669,422. Although the claims at issue are not identical, they are not patentably distinct from each other as described below.
Claim 1 recites limitations found in claims 1 and 5 of the patent. Claims 3 and 6 recite limitations found in claim 1 of the patent.
Claim 4 recites limitations found in claim 1 of the patent. While the claim language differs, the patent claims detecting a collision of system bus access and interrupting the testing, this is a resource contention that occurs due to ongoing operation.
Claim 7 recites limitations found in claims 1 and 5 of the patent. Claim 8 recites limitations found in claims 1 and 5 of the patent. While the claim does not recite performing inference tasks. It is well known in the art that a neural network is designed to perform inference tasks.
Claim 11 recites limitations found in claim 11 of the patent.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “integrity manager” in claim 1, “operational units” in claim 7 and “status monitor” “diagnostic execution unit” and “fault response unit” in claim 14.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Objections
Claims 1-20 are objected to as failing to comply with 37 CFR 1.75(d)(1). The claims recite terms and phrases that differ from those found in the specification. This has led many 112a rejections below. Even claims that do not have a 112a issue, such as claim 7, are objected to as not complying with 37 CFR 1.75(d)(1). Claim 7, for example, recites “multiple operational units”, “diagnostic assessment”, “task continuity”, “data logging” and “alert issuance.” While these limitations have sufficient support, these particular terms are not recited in the specification.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Note that dependent claims not specifically addressed below inherit the deficiency of the parent claim and do not remedy the issue.
Claim 1 line 4 recites the limitation “an integrity manager”. This limitation fulfills the 3-prong test for being interpreted as a invoking 35 U.S.C. 112(f). See MPEP 2181. This limitation is a generic placeholder that is modified by functional language, and is not further modified in the claim by a definite structure or material for performing the claimed function. The specification does not provide for a particular structure that embodies this limitation. The claim therefore lacks written description support for this limitation. The limitation may be intended to be a software function. When software functions are claimed and invoke 112(f) (that is, when they are not claimed as method steps), the specification must provide support in the form of an algorithm for performing the function. See MPEP 2181.IIB. In this case the specification does not provide a specific algorithm to perform the claimed function.
Claim 1 lines 9 recite “a multi-level system action”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 3 line 3 recites “historical usage profile”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 3 line 3 recites “predefined component criticality”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Perhaps due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 10 line 3 recites “operational history”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 13 line 2 recites “temporary data buffering for dependencies”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Perhaps due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 14 line 3 recites the limitations “a status monitor” “a diagnostic execution unit” and “a fault response unit”. These limitations fulfill the 3-prong test for being interpreted as a invoking 35 U.S.C. 112(f). See MPEP 2181. These limitations are generic placeholders that are modified by functional language, and are not further modified in the claim by a definite structure or material for performing the claimed function. The specification does not provide for a particular structure that embodies these limitations. The claim therefore lacks written description support for this limitation. The limitation may be intended to be a software function. When software functions are claimed and invoke 112(f) (that is, when they are not claimed as method steps), the specification must provide support in the form of an algorithm for performing the function. See MPEP 2181.IIB. In this case the specification does not provide a specific algorithm to perform the claimed function.
Claim 14 line 6 recites “conditional operational reintegration”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Perhaps due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 17 line 2 recites “preliminary recovery”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim 18 line 2 recites “based on idle duration”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.Claim 19 line 2 recites “predictive maintenance advisory”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.Claim 20 line 2 recites “predictive maintenance advisory”. This limitation uses language that does not conform to the terms and phrases found the specification and therefore does not comply with 37 C.F.R. 1.75(d)(1). Possibly due to obfuscation caused by modified terms and phrases, the examiner is unable to find support for this limitation in the specification. The limitation appears to lack written description.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 16 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Note that dependent claims not specifically addressed below inherit the deficiency of the parent claim and do not remedy the issue.
Claim 16 lines 2-3 recite “selected from a test library based on a target type, including structural tests, memory built-in self-tests (BIST), and functional tests.” It is unclear from this claim language whether the is “including” requires that the test library include structural tests, or whether the target type is selected from a group that includes structural tests.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 5-16 are rejected under 35 U.S.C. 103 as being unpatentable over Alben (US Patent Application Publication 2021/0286693) in view of Ditty (US Patent Application Publication 2019/0258251).
Regarding claim 1, Alben discloses a processing apparatus, comprising:
a plurality of operational resources for executing computational tasks (Figure 2a); and
an integrity manager (paragraph 17, BIST functionality) operatively coupled to said resources, configured to:
select a target subset of said operational resources for diagnostic assessment while a remaining subset of said operational resources continues operations (paragraph 18, testing is performed when a device is a low power or idle state, and see abstract, devices may be communicatively isolated from other components during testing);
conduct said diagnostic assessment on the target subset (paragraph 14); and
initiate an adaptive fault response based on an outcome of said assessment, the response including at least one of a multi-level system action or reconfiguring operational resource utilization (paragraph 1, faulty components may be removed).
Alben does not expressly disclose the system wherein the plurality of operational resources are for executing artificial neural network (ANN) computational tasks and perform ANN operations.
Ditty teaches a SoC for use in smart vehicles (see abstract). The system includes hardware accelerators optimized for different functions (paragraph 185) including deep learning accelerators designed to run a neural network (paragraph 186). The system utilizes redundant components for greater safety (paragraph 266).
Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the GPU testing system disclosed by Alben such that the component which tested is a hardware accelerator for a neural network, as taught by Ditty. This modification would have been obvious because a hardware accelerator for a neural network is similar to a GPU in that it is a specialized processing unit (Ditty paragraph 181), while use of deep learning accelerators provide benefits of being able to run a neural network with better performance efficiency than GPUs (Ditty paragraph 186). These DLAs are also known to experience failures (Ditty paragraph 267) and would benefit from diagnostic testing (as is done by Alben).
Regarding claims 2-3 and 5-6, Alben in view of Ditty discloses:
2. The processing apparatus of claim 1, wherein said operational resources include heterogeneous processing elements for distinct ANN computation pipeline stages (Ditty Figure 3 shows neural network processing stages and signal propagation), and
wherein the target subset comprises processing elements associated with one of said distinct stages (Alben paragraph 14, the testing is performed of processing elements, and Ditty paragraph 186, these elements as associated with neural network processing).
3. The processing apparatus of claim 1,
wherein said integrity manager selects the target subset based on at least one of:
current idle status (Alben paragraph 18), historical usage profile, predefined component criticality, or an external test initiation signal.
5. The apparatus of claim 1, wherein said multi-level system action comprises:
logging fault characteristics of the target subset (Alben paragraph 34, a location of a failure may be determined; and paragraph 56, test results may be stored to memory); and
executing a subsequent response based on said characteristics, selected from:
localized reset of the target subset,
reconfiguring data paths to bypass the target subset (Alben paragraph 1, faulty components may be removed; this is a reconfiguring that excludes those components from being usable),
activating a redundant operational resource, or
transmitting a fault notification.
6. The processing apparatus of claim 1, further comprising interface wrappers associated with said operational resources to facilitate controlled isolation of the target subset during diagnostic assessment (see abstract of Alben, the device under test may be clamped to communicatively isolate it from other components).
Regarding claim 7, Alben discloses a method for runtime integrity management in a system executing tasks using multiple operational units (Figure 2a), comprising:
identifying a target operational unit for diagnostic assessment while other units maintain task continuity (Figure 3, a region of a processing unit is identified for testing; see abstract and paragraph 25, devices may be communicatively isolated from other components during testing such that other devices view the component as in low power mode);
performing said diagnostic assessment on the target unit (Figure 3, apply a test to a region of a processing unit); and
initiating a system response based on an assessment result, including at least one of data logging (paragraph 34, a location of a failure may be determined; and paragraph 56, test results may be stored to memory), alert issuance, or resource reallocation.
Alben does not expressly disclose the method wherein the tasks are for executing artificial neural network (ANN) tasks.
Ditty teaches a SoC for use in smart vehicles (see abstract). The system includes hardware accelerators optimized for different functions (paragraph 185) including deep learning accelerators designed to run a neural network (paragraph 186). The system utilizes redundant components for greater safety (paragraph 266).
Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the GPU testing system disclosed by Alben such that the component which tested is a hardware accelerator for a neural network, as taught by Ditty. This modification would have been obvious because a hardware accelerator for a neural network is similar to a GPU in that it is a specialized processing unit (Ditty paragraph 181), while use of deep learning accelerators provide benefits of being able to run a neural network with better performance efficiency than GPUs (Ditty paragraph 186). These DLAs are also known to experience failures (Ditty paragraph 267) and would benefit from diagnostic testing (as is done by Alben).
Regarding claims 8-13, Alben in view of Ditty discloses:
8. The method of claim 7, wherein said system is a neural processing unit (NPU) architecture, and said ANN tasks include inference (Ditty paragraphs 40 and 171) or training computations.
9. The method of claim 8, wherein selecting said target unit includes identifying NPU sub-components (Alben paragraph 20, global processing cluster GPC may be tested as a whole or one or more texture processing clusters within the GPC may be tested alone; Ditty also teaches that the SoC that performs neural network processes includes a GPUs and CPUs with subcomponent processors (Figure 8)).
10. The method of claim 7, wherein said diagnostic assessment includes applying test vectors selected or generated based on target unit type or operational history (see abstract of Alben, a test vector is applied to the component).
11. The method of claim 7, wherein said system response, for a critical fault, includes migrating tasks to a backup unit or reconfiguring to a safe operational mode (Alben paragraph 1, a faulty component may be removed or its output discounted).
12. The method of claim 7, further comprising communicating operational status and response actions to a remote supervisor (Alben paragraph 28, an online BIST controller sits remote from the cores being tested in that it is a separate controller).
13. The method of claim 7, wherein maintaining the ANN task continuity includes predictive scheduling or temporary data buffering for dependencies on the target unit (Alben paragraph 4, a state storer stores state information from components which will be tested during the period of time that the tests are performed; this is for dependencies on the target unit because (as in Alben paragraph 24) the component state may be altered during testing, and loss of this information after testing may reduce accuracy or safety of the system).
Regarding claim 14, Alben discloses a runtime diagnostic control apparatus for a semiconductor device with multiple cores and memory (Figure 2a) for computations, comprising:
a status monitor configured to identify testable cores or memory during ongoing computations (Figure 3, a region of a processing unit is identified for testing);
a diagnostic execution unit configured to manage isolated diagnostic assessment of an identified target core or region (see abstract and paragraph 25, devices may be communicatively isolated from other components during testing such that other devices view the component as in low power mode) and its conditional operational reintegration (see abstract, the state of the component may be restored after testing); and
a fault response unit configured to, upon fault detection, log fault data (paragraph 34, a location of a failure may be determined; and paragraph 56, test results may be stored to memory) and execute a corrective action including reporting, spare resource utilization, or controlled deactivation of said target (paragraph 1, faulty components may be removed).
Alben does not expressly disclose the method wherein the computations are artificial neural network (ANN) computations.
Ditty teaches a SoC for use in smart vehicles (see abstract). The system includes hardware accelerators optimized for different functions (paragraph 185) including deep learning accelerators designed to run a neural network (paragraph 186). The system utilizes redundant components for greater safety (paragraph 266).
Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the GPU testing system disclosed by Alben such that the component which tested is a hardware accelerator for a neural network, as taught by Ditty. This modification would have been obvious because a hardware accelerator for a neural network is similar to a GPU in that it is a specialized processing unit (Ditty paragraph 181), while use of deep learning accelerators provide benefits of being able to run a neural network with better performance efficiency than GPUs (Ditty paragraph 186). These DLAs are also known to experience failures (Ditty paragraph 267) and would benefit from diagnostic testing (as is done by Alben).
Regarding claims 15 and 16, Alben in view of Ditty discloses:
15. The apparatus of claim 14, wherein said semiconductor device is a System-on-Chip (SoC) including a neural network accelerator, and said target core is part of said accelerator (Ditty paragraphs 185 and 186, system SoC includes deep learning accelerators).
16. The apparatus of claim 14, wherein said diagnostic assessment is selected from a test library based on a target type, including structural tests (Alben paragraph 30), memory built-in self-tests (BIST) (Alben paragraph 17), and functional tests (Alben paragraphs 28 and 29).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Alben in view of Ditty and Gangasani (PG-PUB 2012/0226942).
Alben in view of Ditty discloses the processing apparatus of claim 1. Alben in view of Ditty does not expressly disclose the apparatus wherein if resource contention for the target subset occurs due to ongoing ANN operations during the diagnostic assessment, the integrity manager temporarily suspends said diagnostic assessment to prioritize ongoing ANN operations.
Gangasani which teaches testing a SoC during a detected idle timeslot and after the one slot of testing, check for pending interrupts which will cause the CPU to be reset and its context to be restored; otherwise a second slot of testing is performed (paragraphs 73, 92 and 103).Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the component testing system disclosed by Alben in view of Ditty such that a pending interrupt is detected and the testing is stopped so that a CPU can be restored to service, as taught by Gangasani. This modification would have been obvious because the interruptible testing allows for tests to be performed without affecting the performance of mission-critical applications during the testing (Gangasani paragraph 3-5).
Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Alben in view of Ditty and Borkar (PG-PUB 2007/0074011).
Regarding claim 19, Alben in view of Ditty discloses the apparatus of claim 14. Alben in view of Ditty does not expressly disclose the apparatus wherein said logged fault data updates a predictive maintenance advisory or a system operational reliability model.
Borkar teaches a system for periodically testing cores in many-core processor and building a dynamic profile for each tested core to track its properties (see abstract). The profile includes trending information for the core (paragraph 17 and 18).Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the component testing system disclosed by Alben in view of Ditty such that an operational profile is maintained for each component, as taught by Borkar. This modification would have been obvious because tracking properties of specific components allows the operating system to allocate tasks to components that are more most suitable for the task (Borkar paragraph 18).
Regarding claim 20, Alben in view of Ditty discloses the apparatus of claim 14. Alben in view of Ditty does not expressly disclose the apparatus wherein said logged fault data is utilized to update a predictive maintenance advisory or a system operational reliability model.
Borkar teaches a system for periodically testing cores in many-core processor and building a dynamic profile for each tested core to track its properties (see abstract). The profile includes trending information for the core (paragraph 17 and 18).Prior to the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify the component testing system disclosed by Alben in view of Ditty such that an operational profile is maintained for each component, as taught by Borkar. This modification would have been obvious because tracking properties of specific components allows the operating system to allocate tasks to components that are more most suitable for the task (Borkar paragraph 18).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bluhm teaches performing processor debugging during idle bus cycles. Raj teaches a multi-chip module having global and local redundancy of components which allows unscheduled downtime to be deferred by keeping processes active and transferring the load to redundant nodes, which can also be performed after a failure to failover to a spare or isolate a faulty component.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH SCHELL whose telephone number is (571) 272-8186. The examiner can normally be reached on Monday through Friday 9AM-5:00PM (Pacific Time).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at (571) 272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. The fax phone number for the examiner is 571-273-8186. The examiner may be e-mailed at joseph.schell@uspto.gov though communications via e-mail are not permitted without a written authorization form (see MPEP 502.03).
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JS/JOSEPH O SCHELL/Primary Examiner, Art Unit 2114
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