DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
a) regarding claim 8:
Claim 8 recites the limitation "the reference voltage" in lines 1-2. There is insufficient antecedent basis for this limitation in the claim.
Allowable Subject Matter
Claims 1-7 and 9-20 and are allowed.
The following is an examiner’s statement of reasons for allowance:
The prior art of record fails to disclose or make obvious a current-integrating summing circuit comprising: a second pair of transistors to receive a common-mode voltage; a third pair of transistors and a fourth pair of transistors respectively configured in a cascode formation relative to the first pair of transistors and the second pair of transistors; and a pair of complementary clocks to activate the third pair of transistors to enable charging of the first and second capacitors according to the differential pair of input signals during an integration phase; wherein the pair of complementary clocks are to activate the fourth pair of transistors to enable discharging of the first and second capacitors during a reset phase, along with all the other limitations as required by claim 1.
The prior art of record fails to disclose or make obvious a method comprising: providing a common-mode voltage to a second pair of transistors; providing a first clock signal to activate a third pair of transistors coupled in a cascode formation with the first pair of transistors to enable charging of a first capacitor and a second capacitor according to the differential pair of input signals during an integration phase; providing a second clock signal to activate a fourth pair of transistors coupled in a cascode formation with the second pair of transistors to enable discharging of the first and second capacitors during a reset phase, wherein the second clock signal is complementary to the first clock signal, along with all the other limitations as required by claim 10.
The prior art of record fails to disclose or make obvious a current-integrating summing circuit comprising: a second pair of transistors to receive a common-mode voltage; and a third pair of transistors and a fourth pair of transistors respectively coupled to the first pair of transistors and the second pair of transistors; wherein the third pair of transistors are configured to receive a first clock signal to activate the third pair of transistors to enable charging of the first and second capacitors according to the differential pair of input signals during an integration phase; and wherein the fourth pair of transistors are configured to receive a second clock signal to activate the fourth pair of transistors to enable discharging of the first and second capacitors during a reset phase, wherein the second clock signal is complementary to the first clock signal, along with all the other limitations as required by claim 17.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Patrick O'Neill whose telephone number is (571)270-1677. The examiner can normally be reached Monday- Friday 9AM-5PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571)270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PATRICK O NEILL/Primary Examiner, Art Unit 2836
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