DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/06/2025, 07/01/2025, 07/21/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Status
Claims 1-21 are pending
Claims 1-21 are rejected under 35 USC § 103
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4, 5, 6, 16, 18, 19, 20 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over KIM; Byung-Jun (US 20200310968 A1)[Kim] in view of JEON; Jeong Ho et al. (US 20230401006 A1)[Jeon]
Regarding claim 1 Kim discloses: A memory system, comprising: one or more memory devices (Kim: [0059] The memory system 110 includes a memory device 150); and one or more controllers coupled with the one or more memory devices (Kim: [0059] The memory system 110 includes a controller 130 which controls storage of data in the memory device 150) and configured to cause the memory system to: receive a request for block status information from a host system (Kim [0128-0130]: teaches host 102 requesting status information to the memory system 110, and the memory system 110 transfers the status information to the host 102. Kim [0120]: teaches status information including block status information indicating number of free blocks); transmit the block status information in response to receiving the request, the block status information comprising an indication of a first quantity of blocks available for writing and an indication of a second quantity of blocks written with at least a threshold amount of valid data (Kim [0130]: teaches the host 102 receiving the status information in response to the request of the memory system 110 to transmitting the status info. Kim [0120]: teaches the host 102 checking the status information inputted from the memory system 110. The status information includes the number of free blocks (available for writing) present in the memory device. Also teaches the status information including number of free blocks being defined as a percentage of the number of free blocks with respect to the total number of the memory blocks 152, 154 and 156. Having information about the percentage of free blocks covers the information about percentage of blocks not free or is written or is dirty. Since the total number of memory blocks is known, information of the number of free blocks implies having the information about the number of blocks not free or is written or is dirty. Kim [0086]: teaches the block manager 48 managing blocks of the memory device 150 according to the number of valid pages. Further, the block manager selects and erases blocks having no valid pages when a free block is needed. So, in Kim the threshold amount of valid data in a block is having at least one valid page.); and receive, in response to transmitting the block status information, an indication to perform, during an idle time, a block maintenance operation in which data stored at the second quantity of blocks is copied to a subset of the first quantity of blocks and in which the second quantity of blocks are erased after the data stored at the second quantity of blocks is copied (Kim [0120]: teaches host 102 checking the status information and then, depending on a result of the checking, generating and sending the garbage collection command and the memory system 110 receiving the command (similar to block maintenance operation). Kim [0040]: teaches the memory system performing garbage collection as a background operation, stably securing an operation window, that is a margin such that garbage collection is performed thoroughly avoiding the deterioration of the input/output performance. Performing garbage collection as a background operation, stably securing an operation window, avoiding performance deterioration is similar to executing maintenance operation during idle time. Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(second quantity of blocks) into free blocks (first quantity of blocks). Kim [0097]: Teaches, the garbage collection control circuit 196 of the controller 130 selects at least one of the plurality of data blocks 40_1 as a target block and extracts valid data from the target block. The garbage collection control circuit 196 copies the extracted valid data to the free block 40_2. After all valid data previously stored in the target block are copied to the free block 40_2, the controller 130 considers that the target block 40_1 has no more valid data and any data remained therein is erased).
Kim teaches controller detecting an operation window that is a margin (similar to idle time) for executing garbage collection avoiding I/O performance degradation. Examiner is adding an additional reference from Jeon who also teaches executing garbage collection during an idle time of storage device.
Jeon discloses:
receive, in response to transmitting the block status information, an indication to perform, during an idle time, a block maintenance operation in which data stored at the second quantity of blocks is copied to a subset of the first quantity of blocks and in which the second quantity of blocks are erased after the data stored at the second quantity of blocks is copied (Jeon [0056]: teaches the host 300 providing garbage collection control command instructing to perform the garbage collection based on the garbage collection cost information and an idle time of the storage device 50 to the memory controller 200. The garbage collection unit time may be an expected time required to secure one free block. The garbage collection unit time may be calculated based on the expected number of free blocks and the expected time included in the garbage collection cost information. When the idle time is greater than the garbage collection unit time, the host 300 may provide the second garbage collection control command to the memory controller 200.).
Both Kim and Jeon represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim in view of Jeon as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim using idle time of storage device for garbage collection as used in Jeon) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Jeon [0008, 0056]).
Regarding claim 16, this is a method claim corresponding to the memory system claim 1 and is rejected for the same reason mutatis mutandis.
Regarding claim 3 Kim/Jeon discloses: The memory system of claim 1, wherein the one or more controllers is further configured to cause the memory system to: receive an indication of the threshold amount, wherein the indication of the second quantity of blocks is transmitted in response to receiving the indication of the threshold amount (Kim [0120]: teaches status information including the number of free blocks (available for writing) present in the memory device. Since the total number of memory blocks is known, information of the number of free blocks implies having the information about the number of blocks not free or is written or is dirty (which is similar to threshold amount of valid/dirty blocks). Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(second quantity of blocks) into free blocks (first quantity of blocks) and is similar to transmitting the blocks.).
Regarding claim 18, this is a method claim corresponding to the memory system claim 3 and is rejected for the same reason mutatis mutandis. Regarding claim 4 Kim/Jeon discloses: The memory system of claim 1, wherein the one or more controllers is further configured to cause the memory system to: receive a request for block maintenance information in response to receiving the indication to perform the block maintenance operation; and transmit the block maintenance information in response to receiving the request for the block maintenance information, the block maintenance information indicating a status of the block maintenance operation (Kim[0009-0012]: teaches a controller suitable for checking a number of free blocks among the plurality of memory blocks, generating or updating status information depending on a result of the checking, and outputting the status information by including the status information in a response to be outputted to a host in response to a command inputted from the host. The controller may generate the status information when the number of free blocks among the blocks is less than a first preset reference. The controller may update the status information when the number of free blocks among the blocks changes by an amount greater than or equal to a second preset reference. Kim [0095] teaches the garbage collection control circuit 196 included in the controller 130 may self-start to perform garbage collection by checking the status of the memory device 150 or may perform garbage collection in response to the garbage collection command inputted from the host 102.
Examiner interprets checking/receiving/transmitting storage space, number of free blocks and dirty blocks etc. as checking/receiving/transmitting block maintenance information. Conducting garbage collection is similar to block maintenance operation. Kim's teaching of memory system receiving request for checking/receiving/transmitting storage space, number of free blocks and dirty blocks etc. and also conducting garbage collection covers the teachings of receiving/transmitting block maintenance information as claimed.).
Regarding claim 19, this is a method claim corresponding to the memory system claim 4 and is rejected for the same reason mutatis mutandis.
Regarding claim 5 Kim/Jeon discloses: The memory system of claim 4, wherein the one or more controllers is further configured to cause the memory system to: receive, in response to transmitting the block maintenance information, an indication to cease performing the block maintenance operation; and cease performing the block maintenance operation in response to receiving the indication to cease performing the block maintenance operation (Kim [0014]: teaches the memory system outputting the status information by including the status information in a response to be outputted to the host in response to a command inputted from the host, and the host selectively generate a garbage collection command depending on the status information transferred from the memory system. Kim [0021]: The host generates the garbage collection command when the number of free blocks among the memory blocks is less than a third preset reference, and the third preset reference is less than the first preset reference. Executing garbage collection if number of free blocks is less than a third preset reference implies not executing garbage collection if number of free blocks among the memory blocks is more than a third preset reference. Garbage collection is a form of block maintenance operation.).
Regarding claim 20, this is a method claim corresponding to the memory system claim 5 and is rejected for the same reason mutatis mutandis. Regarding claim 6 Kim/Jeon discloses: The memory system of claim 1, wherein the block status information comprises a third quantity of blocks written with at least a second threshold amount of valid data, and wherein the indication to perform the block maintenance operation indicates the threshold amount (Kim [0118, 0120]: teaches three threshold values as first preset reference, second preset reference and third preset reference and number of free blocks is compared against these threshold values. Since the total number of blocks in the system is known, knowing number of free blocks also implies the number of blocks not free or having valid data and each threshold value indicating number of free blocks also implies another set of threshold values (complementary-thresholds which can be derived by subtracting the current threshold values from the total number of blocks in the memory system) which indicates the number of blocks with valid data. Kim [0120] also teaches depending on a result of checking the status information, generating and sending the garbage collection command to the memory system. Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(third quantity of blocks) into free blocks and these activity covers the situation where number/quantity of blocks with valid data reaches a complementary-threshold.).
Regarding claim 21, this is a method claim corresponding to the memory system claim 6 and is rejected for the same reason mutatis mutandis.
Claims 2, 17 are rejected under 35 U.S.C. 103 as being unpatentable over KIM; Byung-Jun (US 20200310968 A1)[Kim] in view of JEON; Jeong Ho et al. (US 20230401006 A1)[Jeon] in view of ELIASSON N E et al. (US 20230236835 A1)[Eliasson]
Regarding claim 2 Kim/Jeon discloses: The memory system of claim 1, wherein the one or more controllers is further configured to cause the memory system to: detect a window of time as the idle time in response to determining that access commands from a host system have been paused for at least a threshold duration; and perform the block maintenance operation during the window of time in response to the indication (Kim [0127], FIG. 7: teaches the host 102 determining that there is a time margin for performing garbage collection. Kim [0040]: teaches a host or a computing device controls whether to perform garbage collection for a memory system. Also teaches, performing garbage collection as a background operation, stably securing an operation window, that is, a margin, for garbage collection such that garbage collection is sufficiently performed through control of the host or the computing device, avoiding the deterioration of the input/output performance and endurance of the memory system. Avoiding the deterioration of the input/output performance implies finding a time window when needed I/O operation is minimal and can be delayed (memory access is paused) without degrading I/O performance and such window is similar to an idle window paused for memory accesses. The margin is similar to threshold duration. Jeon [0056]: teaches the host 300 providing garbage collection control command instructing to perform the garbage collection based on the garbage collection cost information and an idle time of the storage device 50 to the memory controller 200. The garbage collection unit time is an expected time required to secure one free block. The garbage collection unit time is calculated based on the expected number of free blocks and the expected time included in the garbage collection cost information. When the idle time is greater than the garbage collection unit time, the host 300 provides the garbage collection control command to the memory controller 200.).
Kim/Jeon teaches executing garbage collection (block maintenance operation) during an idle time of the storage device. However, Kim/Jeon does not explicitly teach host system being paused during garbage collection.
Eliasson discloses:
[detect a window of time as the idle time in response to determining that] access commands from a host system have been paused for at least a threshold duration; and perform the block maintenance operation during the window of time in response to the indication (Eliasson: abstract, claim 1: teaches pausing execution of a thread between two accesses to a data field and performing a garbage collection operation while the thread of execution is paused. Here the threshold duration is the duration of a garbage collection operation.).
Both Kim/Jeon and Eliasson represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim/Jeon in view of Eliasson as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim/Jeon pausing the host for garbage collection operation as used in Eliasson) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Eliasson [abstract, claim 1]).
Regarding claim 17, this is a method claim corresponding to the memory system claim 2 and is rejected for the same reason mutatis mutandis.
Claims 7, 8, 10, 11, 12 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over KIM; Byung-Jun (US 20200310968 A1)[Kim] in view of JEON; Jeong Ho et al. (US 20230401006 A1)[Jeon] in view of Li; Guang Cheng et al. (US 20200218990 A1)[Li]
Regarding claim 7 Kim discloses: An apparatus, comprising: one or more controllers configured to couple with a memory system (Kim: [0059] The memory system 110 includes a controller 130 which controls storage of data in the memory device 150), wherein the one or more controllers is configured to cause to the apparatus to: transmit a request for block status information to a memory system ([0128-0130]: teaches host 102 transmitting status information request to the memory system 110. Kim [0120]: teaches status information including block status information indicating number of free blocks); receive the block status information in response to transmitting the request, the block status information comprising an indication of a first quantity of blocks available for writing and an indication of a second quantity of blocks written with at least a threshold amount of valid data (Kim [0130]: teaches the host 102 receiving the status information in response to the request of the memory system 110. Kim [0120]: teaches the host 102 checking the status information inputted from the memory system 110. The status information includes the number of free blocks (available for writing) present in the memory device. Also teaches the status information including number of free blocks being defined as a percentage of the number of free blocks with respect to the total number of the memory blocks 152, 154 and 156. Having information about the percentage of free blocks covers the information about percentage of blocks not free or is written or is dirty. Since the total number of memory blocks is known, information of the number of free blocks implies having the information about the number of blocks not free or is written or is dirty. Kim [0086]: teaches the block manager 48 managing blocks of the memory device 150 according to the number of valid pages. Further, the block manager selects and erases blocks having no valid pages when a free block is needed. So, in Kim the threshold amount of valid data in a block is having at least one valid page); and transmit, in accordance with the block status information and a target performance metric, an indication for the memory system to perform, during an idle time, a block maintenance operation in which data stored at the second quantity of blocks is copied to a subset of the first quantity of blocks and in which the second quantity of blocks are erased after the data stored at the second quantity of blocks is copied (Kim [0120]: teaches host 102 checking the status information and then, depending on a result of the checking, generating and sending the garbage collection command to the memory system 110 (similar to block maintenance operation). Kim [0040]: teaches the memory system performing garbage collection as a background operation, stably securing an operation window, that is a margin such that garbage collection is performed thoroughly avoiding the deterioration of the input/output performance. Performing garbage collection as a background operation, stably securing an operation window, avoiding performance deterioration is similar to executing maintenance operation during idle time. Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(second quantity of blocks) into free blocks (first quantity of blocks). Kim [0097]: Teaches, the garbage collection control circuit 196 of the controller 130 selects at least one of the plurality of data blocks 40_1 as a target block and extracts valid data from the target block. The garbage collection control circuit 196 copies the extracted valid data to the free block 40_2. After all valid data previously stored in the target block are copied to the free block 40_2, the controller 130 considers that the target block 40_1 has no more valid data and any data remained therein is erased).
Kim teaches controller detecting an operation window that is a margin (similar to idle time) for executing garbage collection avoiding I/O performance degradation. Examiner is adding an additional reference from Jeon who also teaches executing garbage collection during an idle time of storage device.
Jeon discloses:
transmit, in accordance with the block status information [and a target performance metric], an indication for the memory system to perform, during an idle time, a block maintenance operation in which data stored at the second quantity of blocks is copied to a subset of the first quantity of blocks and in which the second quantity of blocks are erased after the data stored at the second quantity of blocks is copied (Jeon [0056]: teaches the host 300 providing garbage collection control command instructing to perform the garbage collection based on the garbage collection cost information and an idle time of the storage device 50 to the memory controller 200. The garbage collection unit time may be an expected time required to secure one free block. The garbage collection unit time may be calculated based on the expected number of free blocks and the expected time included in the garbage collection cost information. When the idle time is greater than the garbage collection unit time, the host 300 may provide the second garbage collection control command to the memory controller 200.).
Both Kim and Jeon represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim in view of Jeon as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim using idle time of storage device for garbage collection as used in Jeon) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Jeon [0008, 0056]).
Kim/Jeon discloses receiving block status information and sending command to execute block status operation and the related activities as shared above. However, Kim/Jeon did not explicitly disclose requirement of target performance metric.
Li discloses:
transmit, in accordance with the block status information and a target performance metric, an indication for the memory system to perform, during an idle time, a block maintenance operation in which data stored at the second quantity of blocks is copied to a subset of the first quantity of blocks and in which the second quantity of blocks are erased after the data stored at the second quantity of blocks is copied (Li [0060]: teaches block 610, receiving domain knowledge requirements for a target system and a status of the domain(cluster of blocks) knowledge/information requirements is defined and effective performance metrics are computed responsive to the status of the domain knowledge requirements and real performance metrics are provided. In block 632, the real performance metrics are received from the target system. So, Li teaches including performance metrics along with block status information).
Both Kim/Jeon and Li represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim/Jeon in view of Li as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim/Jeon including a target performance metrics as part of block status information as used in Li) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Li [0060]).
Regarding claim 8 Kim/Jeon/Li discloses: The apparatus of claim 7, wherein the idle time comprises a window of time during which access commands from a host system are paused for at least a threshold duration (Kim [0127], FIG. 7: teaches the host 102 determining that there is a time margin for performing garbage collection. Kim [0040]: teaches a host or a computing device controls whether to perform garbage collection for a memory system. Also teaches, performing garbage collection as a background operation, stably securing an operation window, that is, a margin, for garbage collection such that garbage collection is sufficiently performed through control of the host or the computing device, avoiding the deterioration of the input/output performance and endurance of the memory system. Avoiding the deterioration of the input/output performance implies finding a time window when needed I/O operation is minimal and can be delayed (memory access is paused) without degrading I/O performance and such window is similar to an idle window paused for memory accesses. The margin is similar to threshold duration. Jeon [0056]: teaches the host 300 providing garbage collection control command instructing to perform the garbage collection based on the garbage collection cost information and an idle time of the storage device 50 to the memory controller 200. The garbage collection unit time is an expected time required to secure one free block. The garbage collection unit time is calculated based on the expected number of free blocks and the expected time included in the garbage collection cost information. When the idle time is greater than the garbage collection unit time, the host 300 provides the garbage collection control command to the memory controller 200.).
Kim/Jeon/Li teaches executing garbage collection (block maintenance operation) during an idle time of the storage device. However, Kim/Jeon does not explicitly teach host system being paused during garbage collection.
Eliasson discloses:
[detect a window of time as the idle time in response to determining that] access commands from a host system have been paused for at least a threshold duration; and perform the block maintenance operation during the window of time in response to the indication (Eliasson: abstract, claim 1: teaches pausing execution of a thread between two accesses to a data field and performing a garbage collection operation while the thread of execution is paused. Here the threshold duration is the duration of a garbage collection operation. So, Li teaches including performance metrics along with block status information).
Both Kim/Jeon/Li and Eliasson represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim/Jeon/Li in view of Eliasson as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim/Jeon/Li pausing the host for garbage collection operation as used in Eliasson) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Eliasson [abstract, claim 1]).
Regarding claim 10 Kim/Jeon/Li discloses: The apparatus of claim 7, wherein the one or more controllers is further configured to cause the apparatus to: transmit an indication of the threshold amount, wherein the request for block status information is transmitted in response to transmitting the indication of the threshold amount (Kim [0120]: teaches status information including the number of free blocks (available for writing) present in the memory device. Since the total number of memory blocks is known, information of the number of free blocks implies having the information about the number of blocks not free or is written or is dirty (which is similar to threshold amount of valid/dirty blocks). Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(second quantity of blocks) into free blocks (first quantity of blocks) and is similar to transmitting the threshold amount (of data in the valid blocks).
Regarding claim 11 Kim/Jeon/Li discloses: The apparatus of claim 7, wherein the one or more controllers is further configured to cause the apparatus to: transmit a request for block maintenance information in response to transmitting the indication to perform the block maintenance operation; and receive the block maintenance information in response to transmitting the request for the block maintenance information, the block maintenance information indicating a status of the block maintenance operation (Kim[0009-0012]: teaches a controller suitable for checking a number of free blocks among the plurality of memory blocks, generating or updating status information depending on a result of the checking, and outputting the status information by including the status information in a response to be outputted to a host in response to a command inputted from the host. The controller may generate the status information when the number of free blocks among the blocks is less than a first preset reference. The controller may update the status information when the number of free blocks among the blocks changes by an amount greater than or equal to a second preset reference. Kim [0095] teaches the garbage collection control circuit 196 included in the controller 130 may self-start to perform garbage collection by checking the status of the memory device 150 or may perform garbage collection in response to the garbage collection command inputted from the host 102.
Examiner interprets checking/receiving/transmitting storage space, number of free blocks and dirty blocks etc. as checking/receiving/transmitting block maintenance information. Conducting garbage collection is similar to block maintenance operation. Kim's teaching of memory system receiving request for checking/receiving/transmitting storage space, number of free blocks and dirty blocks etc. and also conducting garbage collection covers the teachings of receiving/transmitting block maintenance information as claimed.).
Regarding claim 12 Kim/Jeon/Li discloses: The apparatus of claim 11, wherein the one or more controllers is further configured to cause the apparatus to: transmit, in accordance with the block maintenance information, an indication for the memory system to cease performing the block maintenance operation (Kim [0014]: teaches the memory system outputting the status information by including the status information in a response to be outputted to the host in response to a command inputted from the host, and the host selectively generate a garbage collection command depending on the status information transferred from the memory system. Kim [0021]: The host generates the garbage collection command when the number of free blocks among the memory blocks is less than a third preset reference, and the third preset reference is less than the first preset reference. Executing garbage collection if number of free blocks is less than a third preset reference implies not executing garbage collection if number of free blocks among the memory blocks is more than a third preset reference. Garbage collection is a form of block maintenance operation.).
Regarding claim 15 Kim/Jeon/Li discloses: The apparatus of claim 7, wherein the block status information comprises a third quantity of blocks written with at least a second threshold amount of valid data, and wherein the indication to perform the block maintenance operation indicates the threshold amount (Kim [0118, 0120]: teaches three threshold values as first preset reference, second preset reference and third preset reference and number of free blocks is compared against these threshold values. Since the total number of blocks in the system is known, knowing number of free blocks also implies the number of blocks not free or having valid data and each threshold value indicating number of free blocks also implies another set of threshold values (complementary-thresholds which can be derived by subtracting the current threshold values from the total number of blocks in the memory system) which indicates the number of blocks with valid data. Kim [0120] also teaches depending on a result of checking the status information, generating and sending the garbage collection command to the memory system. Kim [0088]: teaches during garbage collection the state manager 42 copies valid page(s)(third quantity of blocks) into free blocks and these activity covers the situation where number/quantity of blocks with valid data reaches a complementary-threshold).
Claims 9, 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over KIM; Byung-Jun (US 20200310968 A1)[Kim] in view of JEON; Jeong Ho et al. (US 20230401006 A1)[Jeon] in view of Li; Guang Cheng et al. (US 20200218990 A1)[Li] in view of Chibon; Pierre-Yves et al. (US 20230308356 A1)[Chibon]
Regarding claim 9 Kim/Jeon/Li teaches all the limitation of claim 7. However, Kim/Jeon/Li did not explicitly disclose elements of performance metric.
Chibon discloses: The apparatus of claim 7, wherein the target performance metric comprises a storage capacity metric, a latency metric, or a data rate metric, or any combination thereof (Chibon [0032]: teaches performance metrics for measuring performance of a node and includes, a latency, a storage capacity. The performance rules require a device to fulfill a performance metric.).
Both Kim/Jeon/Li and Chibon represent works within the same field of endeavor, namely information processing devices focusing on storage systems. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim/Jeon/Li in view of Chibon as it represents a combination of known prior art elements according to known methods (block maintenance operation of Kim/Jeon/Li including storage capacity and latency as performance metrics as used in Chibon) to yield a more efficient storage system resulting in a more efficient and more reliable computing system (see also Chibon [0032]).
Regarding claim 13, Kim/Jeon/Li teaches all the limitation of claim 7. However, Kim/Jeon/Li did not explicitly disclose elements of performance metric.
Chibon discloses:
The apparatus of claim 7, wherein the one or more controllers is further configured to cause the apparatus to: determine a performance metric associated with the first quantity of blocks and the second quantity of blocks, wherein the indication to perform the block maintenance operation is transmitted in accordance with the performance metric (Chibon [0042-0045]: teaches determining nodes having the deficient performance metric and is a violating node. The controller identifies a capability of the violating node that corresponds to the deficiency (e.g., a deficient performance metric) of the violating node (block 318). These capabilities includes storage capacity, a latency. Chibon also teaches determining nodes having the most optimal performance metric to deliver the capability so that node deficient of performance metric can be retired. Chibon's performance metric includes storage capacity which includes considering capacity of all blocks including blocks that are free and the ones that have valid data (first and second quantity of blocks)).
The reasons for obviousness regarding claim 13 are same as those applied to claim 9 above.
Regarding claim 14, Kim/Jeon/Li teaches all the limitation of claim 7. However, Kim/Jeon/Li did not explicitly disclose elements of performance metric.
Chibon discloses:
The apparatus of claim 7, wherein the one or more controllers is further configured to cause the apparatus to: determine a collective storage capacity of the first quantity of blocks, a collective storage capacity of the second quantity of blocks, or a collective amount of valid data stored at the second quantity of blocks, or any combination thereof, wherein the indication to perform the block maintenance operation is transmitted in accordance with the collective storage capacity of the first quantity of blocks, the collective storage capacity of the second quantity of blocks, or the collective amount of valid data stored at the second quantity of blocks, or any combination thereof (Chibon [0042-0045]: teaches determining nodes having the deficient performance metric and is a violating node. The controller identifies a capability of the violating node that corresponds to the deficiency (e.g., a deficient performance metric) of the violating node (block 318). These capabilities includes storage capacity, a latency. Chibon also teaches determining nodes having the most optimal performance metric to deliver the capability so that node deficient of performance metric can be retired. Chibon's performance metric includes storage capacity which includes considering capacity of all blocks including blocks that are free and the ones that have valid data (first and second quantity of blocks)).
The reasons for obviousness regarding claim 14 are same as those applied to claim 9 above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure and is included in pe2e_search_notes and is attached as OA.APPENDIX.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD S HASAN whose telephone number is (571)270-1737. The examiner can normally be reached on Mon-Fri 8-5.
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/M.S.H/Examiner, Art Unit 2138
/SHAWN X GU/
Primary Examiner, AU2138
Prosecution Insights