DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings were received on 07/10/2026. These drawings are acceptable.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 12, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Padhamnath et al. (“Impact of firing temperature on fire-through metal contacts to P-doped (n+) and B-doped (p+) poly-Si”).
Regarding claim 1, Padhamnath discloses a solar cell comprising: a silicon substrate (first line of Section 2.1 in right column of page 2); a first semiconductor layer (line 7 of left column on page 3 discloses n+ poly-Si) and a second semiconductor layer (line 8 of left column on page 3 discloses p+ poly-Si) that are provided on the silicon substrate (lines 16 and 17 of Section 2.1 in right column of page 2); a first electrode electrically connected to the first semiconductor layer (lines 15 and 16 of left column on page 3 disclose metallization of the n+ poly-Si) through a plurality of first conductive structures (line 6 of right column on page 3 disclose metal crystallites); and a second electrode electrically connected to the second semiconductor layer (line 16 of left column on page 3 discloses metallization of the p+ poly-Si) through a plurality of second conductive structures (line 6 of right column on page 3 disclose metal crystallites); wherein a distribution density of the plurality of first conductive structures is greater than a distribution density of the plurality of second conductive structures (Figures 10 through 15).
Regarding claim 12, Padhamnath discloses all the claim limitations as set forth above. Padhamnath further discloses the silicon substrate is an n-type substrate (Fig. 16), the second semiconductor layer is provided on a light receiving surface of the silicon substrate (p+ layer in Fig. 16), the first semiconductor layer is provided on a backlight surface of the silicon substrate (n+ layer in Fig. 16), and the solar cell further comprises a first dielectric layer provided between the first semiconductor layer and the silicon substrate (iOx layer in Fig. 16).
Regarding claim 20, Padhamnath discloses all the claim limitations as set forth above. Padhamnath further discloses a photovoltaic module comprising the solar cell (abstract discloses a solar cell; it is noted that a solar cell satisfies the limitation requiring a photovoltaic module).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2-8 are rejected under 35 U.S.C. 103 as being unpatentable over Padhamnath et al. (“Impact of firing temperature on fire-through metal contacts to P-doped (n+) and B-doped (p+) poly-Si”) as applied to claim 1 above.
Regarding claim 2, Padhamnath discloses all the claim limitations as set forth
above.
While Padhamnath does disclose a relationship between firing temperature and
contact resistivity and recombination current density (abstract), Padhamnath does not explicitly disclose wherein in any contact region of 1 mm x 1 mm between the first electrode and the first semiconductor layer, a number of the plurality of first conductive structures is in a range from 1 x 105 to 1 x 106; and in any contact region of 1 mm x 1 mm between the second electrode and the second semiconductor layer, a number of the plurality of second conductive structures is in a range of 5 x 104 to 5 x 105.
As the manufacturing cost (firing temperature) and operation efficiency (contact resistivity and recombination current density) are variables that can be modified, among others, by adjusting said number of the conductive structures, the precise number of conductive structures would have been considered a result effective variable by one having ordinary skill in the art at the time the invention was made. As such, without showing unexpected results, the claimed number of conductive structures cannot be considered critical. Accordingly, one of ordinary skill in the art at the time the invention was made would have optimized, by routine experimentation, the number of conductive structures in the apparatus of Padhamnath to obtain the desired balance between the manufacturing cost and the operation efficiency (In re Boesch, 617 F.2d. 272, 205 USPQ 215 (CCPA 1980)), since it has been held that where the general conditions of the claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. (In re Aller, 105 USPQ 223).
Regarding claim 3, Padhamnath discloses all the claim limitations as set forth
above.
While Padhamnath does disclose a relationship between firing temperature and contact resistivity (first paragraph of right column on page 7) and further discloses a relationship between firing temperature and the size of the agglomerates (second paragraph of left column and first paragraph of right column on page 7), and discloses that as the firing temperature initially increases, the density of the finely formed crystallites also increases, with a corresponding improvement in the pc until the optimum crystallites coverage fraction is reached (~50%), and that any further increase in the firing temperature fails to improve the crystallite distribution, rather leads to the formation of agglomerates. These agglomerates could also incorporate voids in their structure which could contribute to the higher pl values (first paragraph of right column on page 7); Padhamnath does not explicitly disclose a size of a projection of each first conductive structure on the first semiconductor layer is greater than or equal to a size of a projection of each second conductive structure on the second semiconductor layer, and that the size of the projection of each first conductive structure on the first semiconductor layer is in a range from 100 nm to 2000 nm, and the size of the projection of each second conductive structure on the second semiconductor layer is in a range from 100 nm to 1000 nm.
As the manufacturing cost (firing temperature) and operation efficiency (pc and pl) are variables that can be modified, among others, by adjusting said size of the projection of the conductive structure, the precise size of the projections of the respective conductive structures would have been considered a result effective variable by one having ordinary skill in the art at the time the invention was made. As such, without showing unexpected results, the claimed size of the projections of the respective conductive structures cannot be considered critical. Accordingly, one of ordinary skill in the art at the time the invention was made would have optimized, by routine experimentation, the size of the projections of the respective conductive structures in the apparatus of Padhamnath to obtain the desired balance between the manufacturing cost and the operation efficiency (In re Boesch, 617 F.2d. 272, 205 USPQ 215 (CCPA 1980)), since it has been held that where the general conditions of the claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. (In re Aller, 105 USPQ 223).
Regarding claim 4, Padhamnath discloses all the claim limitations as set forth above.
While Padhamnath does disclose the individual morphology and physical characteristics of the crystallites from by Ag and Ag-Al pastes were different from each other (second paragraph of left column on page 7), Padhamnath does not explicitly disclose each conductive structure is shaped as a leaf vein.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form each conductive structure of Padhamnath in the shape of a leaf vein because such modification would involve a mere change in configuration. It has been held that a change in configuration of shape of a device is obvious, absent persuasive evidence that a particular configuration is significant. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 5, modified Padhamnath discloses all the claim limitations as set forth above.
While modified Padhamnath does not explicitly disclose each first conductive structure comprises a plurality of strip-shaped first structures diverging toward the first electrode, and each second conductive structure comprises a plurality of strip-shaped second structures diverging toward the second electrode, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the conductive structures of modified Padhamnath such that each conductive structure is strip-shaped and diverges towards the respective electrode because such modification would involve a mere change in configuration. It has been held that a change in configuration of shape of a device is obvious, absent persuasive evidence that a particular configuration is significant. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 6, modified Padhamnath discloses all the claim limitations as set forth above. Modified Padhamnath further discloses each first structure comprises a first crystalline main chain and a plurality of first crystalline side chains extending in directions different from a direction of the first crystalline main chain (Fig. 10), and each second structure comprises a second crystallization main chain and a plurality of second crystallization side chains extending in directions different from a direction of the second crystallization main chain (Fig. 11).
It is noted that with regard to the limitation “growth direction,” the limitation is directed to the manner in which the product is made, and it is noted that said limitations are not given patentable weight in the product claims. Even though a product-by-process is defined by the process steps by which the product is made, determination of patentability is based on the product itself and does not depend on its method of production. In re Thorpe, 777 F.2d 695, 227 USPQ 964 (Fed. Cir. 1985).
Regarding claim 7, modified Padhamnath discloses all the claim limitations as set forth above.
It is noted that with regard to the limitation “wherein each first structure and each second structure are both formed by crystallization and polymerization of a plurality of conductive particles,” the limitation is directed to the manner in which the product is made, and it is noted that said limitations are not given patentable weight in the product claims. Even though a product-by-process is defined by the process steps by which the product is made, determination of patentability is based on the product itself and does not depend on its method of production. In re Thorpe, 777 F.2d 695, 227 USPQ 964 (Fed. Cir. 1985).
Regarding claim 8, modified Padhamnath discloses all the claim limitations as set forth above. Padhamnath further discloses an element in each conductive particle comprises silver (abstract L13-14 disclose Ag and Ag-Al contacts).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Padhamnath et al. (“Impact of firing temperature on fire-through metal contacts to P-doped (n+) and B-doped (p+) poly-Si”) as applied to claim 1 above, in view of Shen et al. (US 2023/0387337 A1).
Regarding claim 9, Padhamnath discloses all the claim limitations as set forth
above.
Padhamnath does not explicitly disclose a doping concentration of the n-type
conductive element in the first semiconductor layer is in a range of 1 x 1020 atoms/cm3 to 1 x 1021 atoms/cm3, and a doping concentration of the p-type conductive element in the second semiconductor layer is in a range from 1 x 1018 atoms/cm3 to 1 x 1020 atoms/cm3.
Shen discloses a solar cell ([0051]) and further discloses a doping concentration of the n-type conductive element in the first semiconductor layer is in a range of 1 x 1018 to 9 x 1022 atoms/cm3 ([0097]), and a doping concentration of the p-type conductive element in the second semiconductor layer is in a range of 1 x 1018 to 1 x 1020 atoms/cm3 ([0068]).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the first semiconductor layer of Padhamnath with an n-type doping concentration in a range of 1 x 1018 to 9 x 1022 atoms/cm3, and form the second semiconductor layer of Padhamnath with a p-type doping concentration in a range from 1 x 1018 atoms/cm3 to 1 x 1020 atoms/cm3, as disclosed by Shen, because as evidenced by Shen, forming first and second semiconductor layers of a solar cell with the disclosed dopant concentration ranges amounts to the use of known components/materials in the art for their intended purpose to achieve an expected result, and one skilled in the art would have a reasonable expectation of success when forming the first and second semiconductor layers of Padhamnath with the disclosed dopant concentration ranges based on the teaching of Shen.
Additionally, it would have been obvious to one of ordinary skill in the art at the time of invention to have selected the overlapping portion of the ranges disclosed by the reference because selection of overlapping portion of ranges has been held to be a prima facie case of obviousness. In re Malagari, 182 USPQ 549.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Padhamnath et al. (“Impact of firing temperature on fire-through metal contacts to P-doped (n+) and B-doped (p+) poly-Si”) as applied to claim 1 above, in view of Kim et al. (US 2016/0181447).
Regarding claim 10, Padhamnath discloses all the claim limitations as set forth above.
Padhamnath does not explicitly disclose the first semiconductor layer and the
second semiconductor layer are provided on a backlight surface of the silicon substrate, the first and second semiconductor layers are separated by an isolation region, and the first and second semiconductor layers are arranged in an interdigitated shape.
Kim discloses a solar cell (abstract) and further discloses first and second semiconductor layers (N and P layers in Fig. 3) provided on a back surface of a silicon substrate (100 in Fig. 3; [0036]), the first and second semiconductor layers are separated by an isolation region (122 in Fig. 3 satisfies the limitation “isolation region”), and the first and second semiconductor layers are arranged in an interdigitated shape ([0030]).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the solar cell of Padhamnath such that first and second semiconductor layers are provided on a back surface of the silicon substrate, and the first and second semiconductor layers are arranged in an interdigitated shape, as disclosed by Kim, because as evidenced by Kim, the configuration in which first and second semiconductor layers are arranged on the back surface of a substrate of a solar cell is a known configuration in the art, and one skilled in the art would have a reasonable expectation of success when forming the solar cell of Padhamnath such that the first and second semiconductor layers are provided on the back surface of the substrate of the cell based on the teaching of Kim.
Regarding claim 11, modified Padhamnath discloses all the claim limitations as set forth above. Modified Padhamnath further discloses a first dielectric layer provided between the first semiconductor layer and the silicon substrate (Kim – [0035]; 102 in Fig. 3), and a second dielectric layer provided between the second semiconductor layer and the silicon substrate (Kim – [0035]; 102 in Fig. 3).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Padhamnath et al. (“Impact of firing temperature on fire-through metal contacts to P-doped (n+) and B-doped (p+) poly-Si”) as applied to claim 12 above, in view of Chen et al. (US 2021/0217907).
Regarding claim 13, Padhamnath discloses all the claim limitations as set forth above. CN ‘465
Padhamnath does not explicitly disclose a plurality of first semiconductor layers
provided on the backlight surface, wherein each first semiconductor layer is provided on a partial region of the backlight surface, and adjacent two first semiconductor layers are separated by a first separation region.
Chen discloses a solar cell (abstract) and further discloses a plurality of first semiconductor layers provided on the backlight surface (71 in Fig. 10; [0240]), wherein each first semiconductor layer is provided on a partial region of the backlight surface (71 in relation to back surface of 1 in Fig. 10), and adjacent two first semiconductor layers are separated by a first separation region (region between adjacent layers 71 in Fig. 10 satisfy the limitation “separated by a first separation region”).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the solar cell of Padhamnath with a plurality of first semiconductor layers on the back surface with a separation region between adjacent first semiconductor layers, as disclosed by Chen, because as evidenced by Chen, the configuration in which a solar cell is formed with a plurality of first semiconductor layers on a back surface of the cell is a known structural arrangement in the art, and one skilled in the art would have a reasonable expectation of success when forming the solar cell of Padhamnath such that a plurality of first semiconductor layers are provided on the back surface of the cell based on the teaching of Chen.
Response to Arguments
Applicant's arguments filed 07/10/2026 have been fully considered but they are not persuasive. Specifically, Applicant argues the distribution density of the plurality of first conductive structures being greater than the distribution density of the plurality of second conductive structures results in an unexpected and significant technical effect. Applicant further argues that as shown in Table 1 of the specification, the solar cells of examples 1 to 5 exhibit lower series resistance and higher photoelectric conversion efficiency.
In response to Applicant’s argument, Padhamnath anticipates the limitation
“wherein a distribution density of the plurality of first conductive structures is greater than a distribution density of the plurality of second conductive structures” as set forth in the office action.
Additionally, it is noted that if claim 1 were rejected under 35 U.S.C. 103 as being unpatentable over Padhamnath, Applicant’s argument that the distribution density of the plurality of first conductive structures being greater than the distribution density of the plurality of second conductive structures results in an unexpected and significant technical effect would not be evidence of non-obviousness because the structure/parameters described in Examples 1 to 5 of the as-filed specification (which produce the results shown in Table 1) are not commensurate in scope with the structure/parameters claimed.
Unexpected results must be established by factual evidence; mere argument or conclusory statements in the specification do not suffice. In re Geisler, 116 F.3d 1465, 1470, 43 USPQ2d 1362, 1365 (Fed. Cir. 1977) (quoting In re De Blauwe, 736 F.2d 699, 705, 222 USPQ 191, 196 (Fed. Cir. 1984)). MPEP 716.02(d) II. states “To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside of the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).” It is also well settled that where patentability is predicated upon a change in a condition of a prior art composition, such as a change in size, concentration or the like, the burden is on the applicant to establish with objective evidence that the change is critical, i.e., it leads to a new, unexpected result. In re Woodruff 919 F.2d 1575, 1578 (Fed. Cir. 1990); In re Aller, 220 F.2d 454, 456 (CCPA 1955).
It is noted that the claim amendments overcome the 35 U.S.C. 112(b) rejections set forth in the previous office action.
Applicant’s remaining arguments with respect to claims 1-13 and 20 have been considered but are moot because the arguments are not directed to the current rejection(s).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAMIR AYAD whose telephone number is (313) 446-6651. The examiner can normally be reached Monday - Friday, 8:30am - 5pm EST.
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/TAMIR AYAD/ Primary Examiner, Art Unit 1726
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