DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s arguments/amendments filed July 23, 2026 have been fully considered. Claims 2 and 5 had been canceled.
Claim Rejections - 35 USC § 102
2. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1, 3 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai (2008/0266007, cited by Applicant in the IDS submitted on Mar. 06, 2026).
Regarding claim 1, Tsai discloses an oscillator circuit (Fig.9, please refer to the whole reference for detailed), comprising: a first cross coupled pair (a first cross coupled transistor pair of 604 in Fig.9); a second cross coupled pair (formed by Mc and Md); a resonant circuit (formed by Lg, Ce and Cf), coupled between the first cross coupled pair and the second cross coupled pair and comprising a first node (Nd) outputting a first voltage signal (a first voltage signal at node Nd) and a second node (Nc) outputting a second voltage signal (a second voltage signal at node Nc); and a first injection circuit (608), coupled to the first cross coupled pair (a first cross coupled transistor pair of 604) and injecting a first compensating current (Icomp as shown in Fig.2) with a first predetermined phase (please refer to phase of Icomp in Fig.3) to a predetermined node (node between two transistors of the first cross coupled transistor pair of 604) of the first cross coupled pair; wherein the first cross coupled pair (the first cross coupled transistor pair of 604 in Fig.9) comprises: a first transistor, comprising a first electrode (drain electrode of the first transistor), a second electrode (gate electrode of the first transistor) and a third electrode (source electrode of the first transistor; please refer to the Tsai’s Fig.9 with Examiner’s notes below); and a second transistor, comprising a first electrode drain electrode of the second transistor), a second electrode (gate electrode of the second transistor) and a third electrode (source electrode of the second transistor; please refer to the Tsai’s Fig.9 with Examiner’s notes below), wherein the first electrode of the first transistor (drain electrode of the first transistor) is coupled to the second electrode of the second transistor (gate electrode of the second transistor), and the first electrode of the second transistor (drain electrode of the second transistor) is coupled to the second electrode of the first transistor (gate electrode of the first transistor), and wherein the predetermined node is a node connecting to the third electrode of the first transistor (source electrode of the first transistor; please refer to Tsai’s Fig.9 with the Examiner’s notes below); wherein the first injection circuit (608) injects the first compensating current (Icomp) in response to the first voltage signal (a first voltage signal at node Nd, which is V+ in Figs.2 and 3), and the first predetermined phase (please refer to phase of Icomp in Fig.3) is nearly 90-degree phase with respect to a gate voltage of the first transistor (voltage at the node Nc, which is V- in Figs.2 and 3; please refer to Tsai’s Fig.3 with the Examiner’s notes below).
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842
637
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626
830
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Regarding claim 3, Tsai discloses the first electrode of the first transistor is coupled to the first node (Nd) of the resonant circuit (formed by Lg, Ce and Cf) and the first electrode of the second transistor is coupled to the second node (Nc) of the resonant circuit, and wherein the first voltage signal (the first voltage signal at node Nd) is provided to the first injection circuit (608 via Ce).
Regarding claim 8, Tsai discloses the second cross coupled pair (formed by Mc and Md) comprises: a third transistor, comprising a first electrode, a second electrode and a third electrode; and a fourth transistor, comprising a first electrode, a second electrode and a third electrode, wherein the first electrode of the third transistor is coupled to the second electrode of the fourth transistor, and the first electrode of the fourth transistor is coupled to the second electrode of the third transistor (please refer to Tsai’s Fig.9 with the Examiner’s notes below).
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861
716
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Allowable Subject Matter
4. Claims 4, 6, 7 and 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
5. Claims 13-20 are allowed.
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD TAN whose telephone number is (571)270-7455. The examiner can normally be reached on M-F 8:30am-5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached on 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Richard Tan/Primary Examiner 2849
Prosecution Insights