DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 9, 10, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Fitzpatrick et al. (US PGPub 2014/0310445, hereafter referred to as Fitzpatrick) in view of Xie et al. (US PGPub 2021/0019084, hereafter referred to as Xie).
Regarding claim 1, Fitzpatrick teaches a memory system comprising: a non-volatile memory including a first memory cell unit and a second memory cell unit, and a controller connectable to a host (Fig. 1 and Paragraphs [0033]-[0036], shows the system that has NAND memory devices that comprise pages and blocks (cell units) that are connected to a controller that is connected to a host), the controller being configured to: store a value corresponding to an elapsed time from an execution of an erase operation or a write operation with respect to the first memory cell unit (Paragraph [0056], states that the age of data based on how long since the data was written can be tracked. Paragraphs [0097]-[0101], describes the decay metric which is tracked and based on P/E cycles, etc. meaning it can correspond to the elapse time from the erase or write as dwell and age of the memory device are used for the calculation and both will be dependent upon the elapse time), store a power-off time of the memory system when a power of the memory system is powered off, receive from the host power-on time information indicating a power-on time of the memory system when the memory system is powered on, determine a power-off period during which the memory system is being powered off based on the stored power-off time and the power-on time (Paragraphs [0102]-[0104] and [0110], describes the process of determining the power off time by using a previously stored host time/date and a newly acquired host time/date that is received from the host). Fitzpatrick does not teach determine a value relating to a read voltage used for a read operation with respect to the first memory cell unit based on the first time period, and perform the read operation with respect to the first memory cell unit using the determined value relating to the read voltage.
Xie teaches determine a value relating to a read voltage used for a read operation with respect to the first memory cell unit based on the first time period, and perform the read operation with respect to the first memory cell unit using the determined value relating to the read voltage (Paragraph [0031], states that different read voltages can be used for different time periods meaning the value of the voltage would need to be determined and then used). Since both Fitzpatrick and Xie teach performing refresh operations it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the method of performing the refresh operation of Fitzpatrick to utilize the different read voltages as taught Xie to obtain the predictable result of determine a value relating to a read voltage used for a read operation with respect to the first memory cell unit based on the first time period, and perform the read operation with respect to the first memory cell unit using the determined value relating to the read voltage (as all this does is specify how the refreshing is done).
Regarding claim 2, Fitzpatrick and Xie teach all the limitations to claim 1. Xie further teaches wherein the controller is further configured to determine the read voltage to be a first voltage when the first time period is a first duration of time, and to be a second voltage less than the first voltage when the first time period is a second duration of time shorter than the first duration of time (Fig. 3 and Paragraph [0031], as stated in the rejection to claim 1, a time period can be determined which can be used to determine the read voltage value. If the time period is long, a higher read voltage can be used). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 9, Fitzpatrick and Xie teach all the limitations to claim 1. Fitzpatrick further teaches wherein the non-volatile memory comprises a NAND flash memory (Fig. 1 and Paragraphs [0033]-[0036], as stated in the rejection to claim 1, the memory can be NAND memory). The combination of and reason for combining are the same as those given in claim 1.
Regarding claims 10, 11, and 18, claims 10, 11, and 18 are the method claims associated with claims 1, 2, and 9. Since Fitzpatrick and Xie teach all the limitations of claims 1, 2, and 9 they also teach all the limitations of claims 10, 11, and 18; therefore the rejection for claims 1, 2, and 9 also apply to claims 10, 11, and 18.
Claims 3, 4, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Fitzpatrick and Xie as applied to claims 1 and 10 above, and further in view of Kim et al. (US PGPub 2014/0372674, hereafter referred to as Kim2014).
Regarding claim 3, Fitzpatrick and Xie teach all the limitations to claim 1. Fitzpatrick further teaches wherein the controller is further configured to count a number of times the erase operation has been executed with respect to the first memory cell unit (Paragraph [0023], states that program/erase counts can be done). Fitzpatrick and Xie do not teach determine the read voltage also based on the counted number of times.
Kim2014 teaches determine the read voltage also based on the counted number of times (Paragraph [0062], states that if the erase count for a block is less than a threshold a lower read voltage can be used and if it is higher than a threshold a different, greater, read voltage can be used). Since both Fitzpatrick/Xie and Kim2014 teach determining a read voltage it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the prior art elements according to known methods by modifying the teachings of Fitzpatrick and Xie to also use the erase count as taught in Kim2014 to obtain the predictable result of determine the read voltage also based on the counted number of times.
Regarding claim 4, Fitzpatrick, Xie, and Kim2014 teach all the limitations to claim 3. Kim2014 further teaches wherein the controller is further configured to determine the read voltage to be a first voltage when the counted number of times is a first value, and to be a second voltage less than the first voltage when the counted number of times is a second value less than the first value (Paragraph [0062], as stated in the rejection to claim 3). The combination of and reason for combining are the same as those given in claim 3.
Regarding claims 12 and 13, claims 12 and 13 are the method claims associated with claims 3 and 4. Since Fitzpatrick, Xie, and Kim2014 teach all the limitations of claims 3 and 4 they also teach all the limitations of claims 12 and 13; therefore the rejection for claims 3 and 4 also apply to claims 12 and 13.
Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Fitzpatrick, Xie, and Kim2014 as applied to claims 3 and 12 above, and further in view of Achtenberg et al. (US PGPub 2017/0345510, hereafter referred to as Achtenberg).
Regarding claim 5, Fitzpatrick, Xie, and Kim2014 teach all the limitations to claim 3. Fitzpatrick further teaches a temperature sensor (Paragraph [0022], states a temperature sensor can exist), wherein the controller is further configured to: acquire data indicating temperature from the temperature sensor (Paragraph [0066], states the temperature can be used to calculate the decay rate of data which means the temperate data would need to be acquired). Fitzpatrick, Xie, and Kim2014 do not teach determine the read voltage also based on the temperature indicated by the acquired data.
Achtenberg teaches determine the read voltage also based on the temperature indicated by the acquired data (Paragraph [0082], states the read voltage can be modified based on the temperature). Since both Fitzpatrick/Xie/Kim2014 and Achtenberg teach determining a read voltage it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the prior art elements according to known methods by modifying the teachings of Fitzpatrick, Xie, and Kim2014 to also use temperature as taught in Achtenberg to obtain the predictable result of determine the read voltage also based on the temperature indicated by the acquired data.
Regarding claim 14, claim 14 is the method claim associated with claim 5. Since Fitzpatrick, Xie, Kim2014, and Achtenberg teach all the limitations of claim 5, they also teach all the limitations of claim 14; therefore the rejection for claim 5 also applies to claim 14.
Claims 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Fitzpatrick, Xie, Kim2014, and Achtenberg as applied to claims 5 and 14 above, and further in view of Kim et al. (US PGPub 2018/0301178, hereafter referred to as Kim 2018).
Regarding claim 6, Fitzpatrick, Xie, Kim2014, and Achtenberg teach all the limitations of claim 5. Fitzpatrick, Xie, Kim2014, and Achtenberg do not teach wherein the controller is further configured to determine the read voltage to be a first voltage when the temperature is a first temperature, and to be a second voltage less than the first voltage when the temperature is a second temperature less than the first temperature.
Kim2018 teaches wherein the controller is further configured to determine the read voltage to be a first voltage when the temperature is a first temperature, and to be a second voltage less than the first voltage when the temperature is a second temperature less than the first temperature (Paragraph [0105], states the reference value for the read voltage can increase with temperature increase or decrease with a temperature decrease). Since both Fitzpatrick/Xie/Kim2014/Achtenberg and Kim2018 teach determining a read voltage it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the prior art elements according to known methods by modifying the teachings of Fitzpatrick, Xie, Kim2014, and Achtenberg to increase and decrease the read voltage with temperature as taught in Kim2018 to obtain the predictable result of wherein the controller is further configured to determine the read voltage to be a first voltage when the temperature is a first temperature, and to be a second voltage less than the first voltage when the temperature is a second temperature less than the first temperature (as all this does is specify how the read voltage changes with temperature)
Regarding claim 15, claim 15 is the method claim associated with claim 6. Since Fitzpatrick, Xie, Kim2014, Achtenberg, and Kim2018 teach all the limitations of claim 6, they also teach all the limitations of claim 15; therefore the rejection for claim 6 also applies to claim 15.
Allowable Subject Matter
Claims 7, 8, 16, and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/NICHOLAS A. PAPERNO/Examiner, Art Unit 2132
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