DETAILED ACTION
Claims 1-20 are pending.
The office acknowledges the following papers:
IDS filed on 7/3/2025.
Allowable Subject Matter
Claims 1-20 would be allowable if rewritten or amended to overcome the double patenting rejections, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
The Huff et al. (U.S. 6,185,670) reference is the closest prior art to reading upon some, but not all of the independent claim limitations. The operation selector code reads upon the first subset of the set of bits and the operation class code reads upon the second subset of the set of bits. However, Huff makes no mention of a PIM device nor the PIM device and one or more compute components performing the claimed obtain and execute steps.
Priority
The effective filing date for the subject matter defined in the pending claims in this application is 8/24/2016.
IDS
It is desirable to avoid the submission of long lists of documents if it can be avoided. Eliminate clearly irrelevant and marginally pertinent cumulative information. If a long list is submitted, highlight those documents which have been specifically brought to applicant's attention and/or are known to be of most significance. See Penn Yan Boats, Inc. v. Sea Lark Boats, Inc., 359 F. Supp. 948, 175 USPQ 260 (S.D. Fla. 1972), aff'd, 479 F.2d 1338, 178 USPQ 577 (5th Cir. 1973), cert. denied, 414 U.S. 874 (1974). But cf. Molins PLC v. Textron Inc., 48 F.3d 1172, 33 USPQ2d 1823 (Fed. Cir. 1995). See MPEP 2004.
An applicant's duty of disclosure of material and information is not satisfied by presenting a patent examiner with “a mountain of largely irrelevant [material] from which he is presumed to have been able, with his expertise and with adequate time, to have found the critical [material]. It ignores the real world conditions under which examiners work.” Rohm & Haas Co. v. Crystal Chemical Co., 722 F.2d 1556, 1573 [220 USPQ 289] (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984). (Emphasis in original). Patent applicant has a duty not just to disclose pertinent prior art references but to make a disclosure in such way as not to “bury” it within other disclosures of less relevant prior art; See Golden Valley Microwave Foods Inc. v. Weaver Popcorn Co. Inc., 24 USPQ2d 1801 (N.D. Ind. 1992); Molins PLC v. Textron Inc., 26 USPQ2d 1889, at 1899 (D.Del 1992); Penn Yan Boats, Inc. v. Sea Lark Boats, Inc. et al., 175 USPQ 260, at 272 (S.D. Fl. 1972).
It is impractical for the examiner to thoroughly review each reference, given the number of references cited. By initialing each of the cited references on the accompanying 1449 forms, the examiner is merely acknowledging the submission of the cited references and merely indicating that only a cursory review was made of the cited references.
Drawings
The Examiner contends that the drawings submitted on 5/28/2025 are acceptable for examination proceedings.
Specification
The disclosure is objected to because of the following informalities:
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. The Applicant’s cooperation is requested in correcting any errors of which the Applicant may become aware.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970);and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b).
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Applicants can file an eTerminal Disclaimer (eTD) in utility applications filed under 35 U.S.C. 111(a) or in compliance with 35 U.S.C. 371, and design applications. Filing an eTD via EFS-Web is highly recommended due to an extensive backlog for processing paper TDs. However, applicants may still file a TD for manual review.
Claims 1-16 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12,340,217. Although the conflicting claims are not identical, they are not patentably distinct from each other because U.S. Patent No. 12,340,217 contains every element of claims 1-16 of the instant application and thus anticipates the claims of the instant application. Claims of the instant application therefore are not patently distinct from earlier patent claims and as such are unpatentable over obvious-type double patenting. A later application claim is not patently distinct from an earlier claim if the later claim is anticipated by the earlier claim.
Instant Application
U.S. Patent No. 12,340,217
1. A processor in memory (PIM) device, comprising:
1. A processor in memory (PIM) device, comprising:
one or more memory arrays;
one or more memory arrays;
one or more controllers coupled with the one or more memory arrays, and configured to cause the PIM device to:
one or more controllers coupled with the one or more memory arrays, and configured to cause the PIM device to:
obtain an instruction, wherein a first set of bits of the instruction indicate a type of the instruction, wherein the type of the instruction corresponds to a subset of processing operations of a set of processing operations at the PIM device, and wherein a second set of bits of the instruction are formatted according to the type of the instruction; and
obtain an instruction comprising a set of bits; determine a type of the instruction based at least in part on a first subset of the set of bits, the type corresponding to a respective subset of a plurality of processing operations at the PIM device; and parse a second subset of the set of bits according to a first format, wherein the first format of the second subset of the set of bits is based at least in part on the type of the instruction; and
one or more compute components in communication with the one or more controllers and the one or more memory arrays, and configured to:
one or more compute components in communication with the one or more controllers and the one or more memory arrays, and configured to:
execute a first processing operation of the subset of processing operations based at least in part on obtaining the instruction.
execute a first processing operation of the respective subset of the plurality of processing operations in accordance with parsing the second subset of the set of bits.
Claim 9 is similar to claim 1 and is rejected for the same reasons. Dependent claims 2-8 and 10-16 are read upon by the claims 1-14 of U.S. Patent No. 12,340,217.
Claims 17-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12,340,217 in view of official notice.
a first set of bits indicate an arithmetic operation of a plurality of arithmetic operations (Official notice is given that opcodes can be used to indicate which arithmetic operation is to be performed out of a plurality of arithmetic operations for the advantage of ensuring correct program execution. Thus, it would have been obvious to one of ordinary skill in the art to implement opcodes for arithmetic operations in the parent claims.);
first bits corresponding to operand addresses and second bits corresponding to register addresses (Official notice is given that instruction encodings can include operand and register addresses for the advantage of accessing register data for execution operations. Thus, it would have been obvious to one of ordinary skill in the art to implement instruction encodings with register and operand addresses in the parent claims.).
Conclusion
The following is text cited from 37 CFR 1.111(c): In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections.
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Steiss (U.S. 2013/0036294), taught instruction sets with run-time consistency checks.
Garg et al. (U.S. 5,493,687), taught implementing typed register sets.
Chin et al. (U.S. 5,581,778), taught instruction fields.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB A. PETRANEK whose telephone number is (571)272-5988. The examiner can normally be reached on M-F 8:00-4:30.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on (571) 270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JACOB PETRANEK/Primary Examiner, Art Unit 2183
