DETAILED ACTION
Claims 1-25 are present for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 11-16 and 23-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Horn et al. (US 2005/0066138) in view of Vishne et al. (US 2016/0147671).
With respect to claim 1, Horn et al. teaches one or more memory devices (see Fig. 1 and paragraph 19; storage elements); and
processing circuitry coupled with the one or more memory devices (see Fig. 1 and paragraph 19; storage element 1 command executor 175 coupled to storage element 1) and configured to cause the memory system to:
execute one or more first write commands in a command queue of the memory system (see paragraphs 16 and 19-20; feeding storage element 1 a list of commands taken from the oldest commands residing in storage element 1 pending queue 1 160… storage element 1 command executor 175 waits until storage element 1 has processed some of its commands (i.e., command of a certain type are provided and processed)), the one or more first write commands associated with a first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type));
compare, in response to executing the one or more first write commands, a quantity of one or more second write commands in the command queue with a threshold quantity that is greater than one (see paragraphs 29-32 and 35-38; number of remaining commands in queue, that may comprise different task types, are examined; and queue having pending commands is selected) wherein the one or more second write commands indicate data to write to one or more memory devices of the memory system and are associated with a second write type different than the first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type)).
Horn et al. does not teach determine whether to flush the data to the one or more memory devices in response to comparing the quantity of the one or more second write commands with the threshold quantity.
However, Vishne et al. teaches wherein when the data storage device 302 receives a FUA-enabled write command, the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304 (i.e., if the quantity of the FUA-enabled write command satisfies the full block threshold, the data is flushed/written to non-volatile memory)) (see paragraph 46).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 2, Horn et al. does not teach wherein the processing circuitry is further configured to cause the memory system to: flush the data to the one or more memory devices in accordance with the quantity of the one or more second write commands being greater than or equal to the threshold quantity; and transmit, to a host system coupled with the memory system, a response in accordance with flushing the data to the one or more memory devices.
However, Vishne et al. teaches wherein when the data storage device 302 receives a FUA-enabled write command, the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304 (i.e., if the quantity of the FUA-enabled write command satisfies the full block threshold, the data is flushed/written to non-volatile memory)) (see paragraph 46); and wherein a write command, such as the write command 170, includes a FUA flag, the command processing unit 120 does not provide a corresponding complete indication 172 until the data associated with the FUA-enabled write command has been written to the non-volatile memory 104 (i.e., after data associated with the FUA-enabled write command has been written to the non-volatile memory a response is sent to indicate completion) (see paragraph 20).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 3, Horn et al. does not teach wherein the processing circuitry is further configured to cause the memory system to: perform, in accordance with the quantity of the one or more second write commands being less than the threshold quantity, one or more command count comparisons, wherein determining whether to flush the data to the one or more memory devices is further in accordance with the one or more command count comparisons.
However, Vishne et al. teaches wherein the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304. If the data can be used to generate a full write block, the data storage device 302 determines whether the data associated with the FUA-enabled write command can be combined with data associated with a pending write command 310 or a pending write command identified at a submission queue of the accessing device (i.e., if the quantity of the FUA-enabled write command does not satisfy the threshold, the other quantity comparison using other commands are performed) (see paragraph 46).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 4, Horn et al. does not teach wherein the processing circuitry is further configured to cause the memory system to: determine whether a second time at which performance of the one or more command count comparisons is complete is within a threshold time period of a first time at which the performance of the one or more command count comparisons is initiated; and flush the data to the one or more memory devices in response to determining that the second time is not within the threshold time period.
However, Vishne et al. teaches wherein the pending command evaluator 136 of FIG. 1 may determine a size of an unfilled portion of a partial write block in the write cache 126 (e.g., based on a size of a full write block and a size of data in the first partial write block 130). The pending command evaluator 136 may evaluate pending commands to identify pending data 160 to fill a partial write block. When the timer is used, the method 500 also includes, at 516, determining whether the timer has expired. If the timer has expired, the method 500 includes, at 518, adding padding to generate a full write block. The method 500 may further include, at 530, writing the full write block to the non-volatile memory (i.e., timer is compared with an expiration time; and if the timer has expired data is flushed) (see paragraphs 28, 46 and 57).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 11, Horn et al. does not teach wherein the threshold quantity is in accordance with a page size associated with the one or more memory devices.
However, Vishne et al. teaches wherein the threshold quantity is in accordance with a page size associated with the one or more memory devices (see paragraphs 46 and 56; determining, based on a size of the particular data (e.g., the data in the write cache and/or the data associated with the FUA-enabled write command) and a size of a write block of data, whether the particular data, alone, fills the write block of data).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 12, Horn et al. does not teach wherein the first write type comprises a non-force unit access (FUA) write type and the second write type comprises an FUA write type.
However, Vishne et al. teaches wherein the first write type comprises a non-force unit access (FUA) write type and the second write type comprises an FUA write type (see paragraph 17 and 24; first pending commands 122 correspond to commands that have been copied to a memory (e.g., a volatile memory) of the data storage device 102 from one of the submission queues 152. The second pending commands 154 correspond to other commands of the pending commands (i.e., commands that have been submitted and that have not yet been copied to a memory of the data storage device 102 as first pending commands 122)… he command instructing the data storage device 102 to write particular data to the non-volatile memory 104 may be a FUA-enabled write command he command instructing the data storage device 102 to write particular data to the non-volatile memory 104 may be a FUA-enabled write command (i.e., normal write command and FUA-enabled write commands)).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 13, Horn et al. teaches execute one or more first write commands in a command queue of a memory system (see paragraphs 16 and 19-20; feeding storage element 1 a list of commands taken from the oldest commands residing in storage element 1 pending queue 1 160… storage element 1 command executor 175 waits until storage element 1 has processed some of its commands (i.e., command of a certain type are provided and processed)), the one or more first write commands associated with a first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type));
compare, in response to executing the one or more first write commands, a quantity of one or more second write commands in the command queue with a threshold quantity that is greater than one (see paragraphs 29-32 and 35-38; number of remaining commands in queue, that may comprise different task types, are examined; and queue having pending commands is selected), wherein the one or more second write commands indicate data to write to one or more memory devices of the memory system and are associated with a second write type different than the first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type)).
Horn et al. does not teach determine whether to flush the data to the one or more memory devices in response to comparing the quantity of the one or more second write commands with the threshold quantity.
However, Vishne et al. teaches wherein when the data storage device 302 receives a FUA-enabled write command, the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304 (i.e., if the quantity of the FUA-enabled write command satisfies the full block threshold, the data is flushed/written to non-volatile memory)) (see paragraph 46).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 14, Horn et al. does not teach wherein the instructions are further executable by the one or more processors to: flush the data to the one or more memory devices in accordance with the quantity of the one or more second write commands being greater than or equal to the threshold quantity; and transmit, to a host system coupled with the memory system, a response in accordance with flushing the data to the one or more memory devices.
However, Vishne et al. teaches wherein when the data storage device 302 receives a FUA-enabled write command, the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304 (i.e., if the quantity of the FUA-enabled write command satisfies the full block threshold, the data is flushed/written to non-volatile memory)) (see paragraph 46); and wherein a write command, such as the write command 170, includes a FUA flag, the command processing unit 120 does not provide a corresponding complete indication 172 until the data associated with the FUA-enabled write command has been written to the non-volatile memory 104 (i.e., after data associated with the FUA-enabled write command has been written to the non-volatile memory a response is sent to indicate completion) (see paragraph 20).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 15, Horn et al. does not teach wherein the instructions are further executable by the one or more processors to: perform, in accordance with the quantity of the one or more second write commands being less than the threshold quantity, one or more command count comparisons, wherein determining whether to flush the data to the one or more memory devices is further in accordance with the one or more command count comparisons.
However, Vishne et al. teaches wherein the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304. If the data can be used to generate a full write block, the data storage device 302 determines whether the data associated with the FUA-enabled write command can be combined with data associated with a pending write command 310 or a pending write command identified at a submission queue of the accessing device (i.e., if the quantity of the FUA-enabled write command does not satisfy the threshold, the other quantity comparison using other commands are performed) (see paragraph 46).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 16, Horn et al. does not teach wherein the instructions are further executable by the one or more processors to: determine whether a second time at which performance of the one or more command count comparisons is complete is within a threshold time period of a first time at which the performance of the one or more command count comparisons is initiated; and flush the data to the one or more memory devices in response to determining that the second time is not within the threshold time period.
However, Vishne et al. teaches wherein the pending command evaluator 136 of FIG. 1 may determine a size of an unfilled portion of a partial write block in the write cache 126 (e.g., based on a size of a full write block and a size of data in the first partial write block 130). The pending command evaluator 136 may evaluate pending commands to identify pending data 160 to fill a partial write block. When the timer is used, the method 500 also includes, at 516, determining whether the timer has expired. If the timer has expired, the method 500 includes, at 518, adding padding to generate a full write block. The method 500 may further include, at 530, writing the full write block to the non-volatile memory (i.e., timer is compared with an expiration time; and if the timer has expired data is flushed) (see paragraphs 28, 46 and 57).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 23, Horn et al. does not teach wherein the threshold quantity is in accordance with a page size associated with the one or more memory devices.
However, Vishne et al. teaches wherein the threshold quantity is in accordance with a page size associated with the one or more memory devices (see paragraphs 46 and 56; determining, based on a size of the particular data (e.g., the data in the write cache and/or the data associated with the FUA-enabled write command) and a size of a write block of data, whether the particular data, alone, fills the write block of data).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 24, Horn et al. does not teach wherein the first write type comprises a non-force unit access (FUA) write type and the second write type comprises an FUA write type.
However, Vishne et al. teaches wherein the first write type comprises a non-force unit access (FUA) write type and the second write type comprises an FUA write type (see paragraph 17 and 24; first pending commands 122 correspond to commands that have been copied to a memory (e.g., a volatile memory) of the data storage device 102 from one of the submission queues 152. The second pending commands 154 correspond to other commands of the pending commands (i.e., commands that have been submitted and that have not yet been copied to a memory of the data storage device 102 as first pending commands 122)… he command instructing the data storage device 102 to write particular data to the non-volatile memory 104 may be a FUA-enabled write command he command instructing the data storage device 102 to write particular data to the non-volatile memory 104 may be a FUA-enabled write command (i.e., normal write command and FUA-enabled write commands)).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
With respect to claim 25, Horn et al. teaches executing one or more first write commands in a command queue of a memory system (see paragraphs 16 and 19-20; feeding storage element 1 a list of commands taken from the oldest commands residing in storage element 1 pending queue 1 160… storage element 1 command executor 175 waits until storage element 1 has processed some of its commands (i.e., command of a certain type are provided and processed)), the one or more first write commands associated with a first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type));
comparing, in response to executing the one or more first write commands, a quantity of one or more second write commands in the command queue with a threshold quantity that is greater than one (see paragraphs 29-32 and 35-38; number of remaining commands in queue, that may comprise different task types, are examined; and queue having pending commands is selected), wherein the one or more second write commands indicate data to write to one or more memory devices of the memory system and are associated with a second write type different than the first write type (see paragraphs 16 and 26; task type requestor 1 105 generates specific typed task requests in response to controller top-level storage element service requests. These requests may be either internal (e.g., cache management) or external (e.g., host request processing) storage element service requests, such as a flush cache command, a cache misread command, a no-cache write command, a copy command, a rebuild command… storage element commands from pending queues in which they have been stored based on priority and specific-type tasks (i.e. pending command in pending queue is of a first type)).
Horn et al. does not teach determining whether to flush the data to the one or more memory devices in response to comparing the quantity of the one or more second write commands with the threshold quantity.
However, Vishne et al. teaches wherein when the data storage device 302 receives a FUA-enabled write command, the data storage device 302 may determine whether data associated with the FUA-enabled write command can be used to fill one of the partial write blocks 330, 332. If the data can be used to generate a full write block, the data is added to a partial write block and the resulting full write block is written to the non-volatile memory 304 (i.e., if the quantity of the FUA-enabled write command satisfies the full block threshold, the data is flushed/written to non-volatile memory)) (see paragraph 46).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the method taught by Horn et al. to include the above mentioned to improve efficiency of use of the storage capacity of the non-volatile memory (see Vishne, paragraph 4).
Claim(s) 8 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Horn et al. (US 2005/0066138) and Vishne et al. (US 2016/0147671) as applied to claims 1 and 13 above, and further in view of Cheng (US 2024/0361934).
With respect to claim 8, Horn et al. and Vishne et al. do not teach wherein flushing the data comprises the processing circuitry configured to cause the memory system to: write a first portion of the data to a first plane of each memory die of a plurality of memory dies of the memory system; and write, after writing to the first plane in every memory die of the plurality of memory dies, a second portion of the data to a second plane of each memory die of the plurality of memory dies.
However, Cheng teaches Each memory die comprises at least a first plane and a second plane, in the write operation of the predetermined data, and corresponding write operations performed on a first page on the first plane of all memory dies of the first target superblock are earlier than corresponding write operations performed on a first page on the second plane of all memory dies of the first target superblock (see paragraphs 3 and 46-49).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the system taught by Horn et al. and Vishne et al. to include the above mentioned to improve the efficiency of accessing the memory device (see Cheng, paragraph 1).
With respect to claim 20, Horn et al. and Vishne et al. do not teach wherein the instructions to flush the data are executable by the one or more processors to: write a first portion of the data to a first plane of each memory die of a plurality of memory dies of the memory system; and write, after writing to the first plane in every memory die of the plurality of memory dies, a second portion of the data to a second plane of each memory die of the plurality of memory dies.
However, Cheng teaches Each memory die comprises at least a first plane and a second plane, in the write operation of the predetermined data, and corresponding write operations performed on a first page on the first plane of all memory dies of the first target superblock are earlier than corresponding write operations performed on a first page on the second plane of all memory dies of the first target superblock (see paragraphs 3 and 46-49).
It would have been obvious to a person having ordinary skill in the art to which said subject matter pertains before the effective filing date of the claimed invention to have modified the medium taught by Horn et al. and Vishne et al. to include the above mentioned to improve the efficiency of accessing the memory device (see Cheng, paragraph 1).
Allowable Subject Matter
Claims 5-7, 9-10, 17-19 and 21-22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
No prior art or combination of prior art teaches or suggest compare, at a second time that is after the first time, a sum of the second quantity of one or more pending write operations and the quantity of the one or more second write commands with the threshold quantity; and execute, at a third time, one or more third write commands of the first write type that are in the command queue, wherein executing the one or more third write commands is in accordance with the second quantity being greater than the threshold quantity or is in accordance with the sum being less than or equal to the threshold quantity or both, and wherein a duration between the first time and the third time comprises a delay in accordance with the one or more command count comparisons as recited in claims 5 and 17; compare the quantity of the one or more second write commands with a most recent quantity of one or more commands flushed to the one or more memory devices in a previous flush cycle of the memory system; and determine whether to generate a delay in response to comparing the quantity of the one or more second write commands with the most recent quantity of one or more commands flushed to the one or more memory devices in the previous flush cycle of the memory system as recited in claims 6 and 18; write, before writing the first portion of the data to the first plane, a third portion of the data sequentially across a subset of one or more planes of one or more first memory dies of the plurality of memory dies; and switch from a sequential write mode to a jump write mode in response to completing a write of the third portion of the data to a final plane of a final memory die as recited in claims 9 and 21; and switch from a jump write mode associated with writing the first portion of the data and the second portion of the data to a sequential write mode in response to completing a write of the second portion of the data to the second plane in each memory die of the plurality of memory dies as recited in claims 10 and 22.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Rose (US 2016/0335006) teaches solid-state mass storage device and method for processing forced unit access write commands.
Yu et al. (US 8,990,493) teaches a method and apparatus for performing forced unit access writes on a disk.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARACELIS RUIZ whose telephone number is (571)270-1038. The examiner can normally be reached Monday-Friday 11:00am-7:30pm.
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/ARACELIS RUIZ/Primary Examiner, Art Unit 2139
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