Prosecution Insights
Last updated: August 06, 2026
Application No. 19/223,275

APPARATUS FOR ULTRASONIC FINGERPRINT IDENTIFICATION AND ELECTRONIC DEVICE

Final Rejection §103
Filed
May 30, 2025
Priority
Aug 24, 2023 — CN 202311078646.7 +1 more
Examiner
FLORES, ROBERTO W
Art Unit
2621
Tech Center
2600 — Communications
Assignee
Huike (Singapore) Holding Pte. Ltd.
OA Round
2 (Final)
50%
Grant Probability
Moderate
3-4
OA Rounds
1y 9m
Est. Remaining
63%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allowance Rate
269 granted / 543 resolved
-12.5% vs TC avg
Moderate +14% lift
Without
With
+13.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
28 currently pending
Career history
586
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
68.1%
+28.1% vs TC avg
§102
15.5%
-24.5% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 543 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 5-10, 13-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Panchawagh et al. U.S. Patent Publication No. 2018/0196982 (hereinafter Panchawagh) in view of Pallerla et al. U.S. Patent Publication No. 2023/0097300 (hereinafter Pallerla) and further view of Tseng et al. U.S. Patent Publication No. 2024/0424529 (hereinafter Tseng). Consider claim 1, Panchawagh teaches an apparatus (Figure 1, 100) for ultrasonic fingerprint identification [0008], arranged below a cover plate of an electronic device to implement ultrasonic fingerprint identification (Figures 7-8, 11 and [0081], PMUT including piezoelectric layer 745 and cover 725), the apparatus comprising: an ultrasonic fingerprint identification chip ([0081], PMUT), a matching layer stacked on the ultrasonic fingerprint identification chip (Figure 11, 740), and a second electrode arranged with respect to the matching layer (Figure 11, 1110); wherein the ultrasonic fingerprint identification chip comprises a substrate (Figure 11, 755), a first electrode (Figure 11, 1105), a pixel electrode array (Figure 8 and [0081], pixel circuitry 755 that may be a TFT or complementary metal-oxide-semiconductor (CMOS) layer with a silicon substrate), and a piezoelectric layer (Figure 7, 745); and the first electrode is configured to receive a drive signal to drive the piezoelectric layer to excite an ultrasonic signal (Figure 11, Tx), and the second electrode is configured to output a touch sensing signal to detect capacitance between the second electrode and a finger to perform fingerprint identification of the finger (Figure 11, Rx. Figure 8 and [0085], capacitance). Panchawagh does not appear to disclose a self-capacitance. However, in a related field of endeavor, Pallerla teaches ultrasonic fingerprint sensors (abstract) and further teaches a self-capacitance [0163]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide self-capacitance in order to meet design choices since Pallerla teaches mutual or self-capacitance in [0163]. In addition, self-capacitance measures its capacitance relative to ground as known in the art. Pancawagh does not appear to specifically disclose wherein the matching layer comprises a first adhesive layer, an interlayer, and a second adhesive layer stacked sequentially from top to bottom, the interlayer comprises a conductive material with high acoustic impedance, wherein the second electrode is positioned in the interlayer. However, in a related field of endeavor, Tseng teaches an ultrasonic sensor (abstract) wherein the matching layer comprises a first adhesive layer (Figure 3, 318), an interlayer (Figure 3, 320), and a second adhesive layer stacked sequentially from top to bottom (Figure 3, 316), the interlayer comprises a conductive material with high acoustic impedance [0062], wherein the second electrode is positioned in the interlayer (Figure 3, 320). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a matching layer with high acoustic impedance as taught by Tseng with the benefit that a high level of acoustic impedance mismatch such as a boundary between a high-impedance material and a low-impedance material may cause most of the ultrasonic waves to be reflected back into a given medium. The reflected ultrasonic waves may constructively interfere with consecutively generated ultrasonic waves in the given medium, resulting in enhanced signals that amplify over time as suggested in [0063]. Consider claim 5, Panchawagh, Pallerla and Tseng teach all the limitations of claim 1. In addition, Tseng teaches wherein the first adhesive layer and the second adhesive layer (Figure 3, 318 and 316) includes acrylic or epoxy resin ([0092], adhesive such as epoxy, see motivation to combine in claim 2). Consider claim 6, Panchawagh, Pallerla and Tseng teach all the limitations of claim 1. In addition, Tseng teaches wherein the conductive material with high acoustic impedance comprises a metal (Figure 3 and [0061-0062], 320, see motivation to combine in claim 2). Consider claim 7, Panchawagh, Pallerla and Tseng teach all the limitations of claim 1. Panchawagh does not appear to specifically disclose wherein a thickness of the piezoelectric layer is 7 um-11um. However, Tseng teaches wherein a thickness of the piezoelectric layer is 7 um-11um [0056]. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a particular thickness as taught by Tseng with the benefit that the piezoelectric layer may include a piezoelectric material such as PVDF polymer or a layer of PVDF-TrFE copolymer. Other piezoelectric materials may be used such as AlN or PZT as suggested in [0056]. Consider claim 8, Panchawagh, Pallerla and Tseng teach all the limitations of claim 1. Panchawagh teaches wherein the ultrasonic fingerprint identification chip comprises: the substrate (Figure 7, 755), the pixel electrode array ([0081], silicon substrate including an array of sensor pixel circuits; [0058], an array of sensor pixel circuits and associated interface circuitry of the ultrasonic receiver 310 may be configured from CMOS circuitry formed in or on the substrate 304), the piezoelectric layer (Figure 7, 745), and the first electrode stacked sequentially from the bottom up (Figure 7, 710); or the first electrode, the piezoelectric layer, the pixel electrode array, and the substrate stacked sequentially from the bottom up. Consider claim 9, Panchawagh, Pallerla and Tseng teach all the limitations of claim 8. Panchawagh teaches wherein an electrode layer is provided above or below the piezoelectric layer, and the first electrode is provided in the electrode layer (Figure 7, 710 and 745). Consider claim 10, Panchawagh, Pallerla and Tseng teach all the limitations of claim 9. Panchawagh does not appear to specifically disclose wherein the electrode layer comprises a silver slurry, and the silver slurry has a thickness of 4 um-30 um. However, Tseng teaches wherein the electrode layer comprises a silver slurry, and the silver slurry has a thickness of 4 um-30 um ([0057], silver ink). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide silver ink with a particular thickness as taught by Tseng with the benefit that a thick metal layer may be sufficiently thick and made of a suitable metal for acoustic coupling with the ultrasonic sensor stack as suggested in [0057]. Consider claim 13, Panchawagh, Pallerla and Tseng teach all the limitations of claim 1. In addition, Pachawagh teaches wherein the cover plate is configured to provide a pressing region of a finger and receive pressing of the finger (Figures 7-8, 725); and the apparatus for ultrasonic fingerprint identification is arranged below the cover plate for detecting a fingerprint of the finger pressed against the cover plate (Figures 7-8, 745 and 725). Consider claim 14, Panchawagh, Pallerla and Tseng teach all the limitations of claim 12. In addition, Pachawagh teaches wherein the cover plate (Figures 7-8, platen 725) comprises a conductive material or a non-conductive material ([0058-0059], one or more protective layers, acoustic matching layers, anti-smudge layers, adhesive layers, decorative layers, conductive layers or other coating layers (not shown) may be included on one or more sides of the platen; the platen 306 may be formed of one or more of glass, plastic, ceramic, sapphire, metal or metal alloy). Consider claim 15, Panchawagh, Pallerla and Tseng teach all the limitations of claim 14. In addition, Pachawagh teaches wherein the cover plate comprises the conductive material, an insulating coating is provided on a surface of the cover plate [0058-0059], and the cover plate has a thickness of 0.1mm-1.5mm [0059]. Consider claim 16, Panchawagh, Pallerla and Tseng teach all the limitations of claim 14. In addition, Pachawagh teaches wherein the cover plate comprises the non-conductive material [0058-0059], thickness of the cover plate is smaller than or equal to 3mm [0059]. Consider claim 17, Panchawagh, Pallerla and Tseng teach all the limitations of claim 14. In addition, Pachawagh teaches wherein the conductive material is a metal, and the non-conductive material is plastic or glass ([0059], metal, glass). Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Panchawagh, Pallerla and Tseng as applied to claim 10 above, and further in view of Buchan et al. U.S. Patent Publication No. 2017/0364726 (hereinafter Buchan). Consider claim 11, Panchawagh, Pallerla and Tseng teach all the limitations of claim 10. Panchawagh does not appear to specifically disclose wherein the apparatus further comprises a circuit board electrically connected to the ultrasonic fingerprint identification chip. However, in a related field of endeavor, Buchan teaches a ultrasonic sensor device (abstract) and further teaches wherein the apparatus further comprises a circuit board electrically connected to the ultrasonic fingerprint identification chip (Figure 11, circuit board 211-212; transceiver 206 and connection 220). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a circuit board as taught by Buchan with the benefit that the FPC 211 may be electrically coupled to a sensor controller or other circuitry (e.g., a control unit, control circuitry or an applications processor) for signal processing of signals to/from the sensor circuits as suggested in [0080]. Consider claim 12, Panchawagh, Pallerla, Tseng and Buchan teach all the limitations of claim 11. In addition, Panchawagh teaches wherein when the first electrode layer is stacked on the piezoelectric layer (Figure 7, 710 and 745). Panchawagh does not appear to specifically disclose the apparatus further comprises a reinforcing plate attached to the circuit board to fix the circuit board, and the ultrasonic fingerprint identification chip is arranged on a surface of the reinforcing plate. However, Buchan teaches the apparatus further comprises the apparatus further comprises a reinforcing plate attached to the circuit board to fix the circuit board (Figure 11, 1002), and the ultrasonic fingerprint identification chip is arranged on a surface of the reinforcing plate (Figure 11, 206, 220 and 214). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a reinforcing plate as taught by Buchan in order to provide additional structural support as suggested in [0100]. Response to Arguments Applicant's arguments filed 07/02/2026 have been fully considered but they are not persuasive. On page 7, Applicant argues that “Nowhere in Tseng does it disclose or teach the electrically conductive layer 320 is a second electrode configured to output a touch sensing signal to detect self-capacitance between the second electrode and a finger to perform fingerprint identification of the finger.” The Office respectfully disagrees for the following reasons. Panchawagh teaches in figures 8 and 11, second electrode Rx and touch capacitances. Pallerla teaches self-capacitance in [0163]. On page 7, Applicant argues that “None of the references teach or suggest a touch-sensing and self-capacitance electrode inside the specific interlayer of the claimed matching layer. The mapping of the shielding layer 320 in the Office Action as both the interlayer and the location of the second electrode in claim 1 is improper since the explicit structural and functional recitations of claim 1 presented above are ignored.” The Office respectfully disagrees for the following reasons. Panchawagh teaches second electrode or conductor 1110 inside 740. Panchawagh do not specifically disclose electrode or conductor in between adhesive layers. However, Tseng teaches electrically conductive layer 320 in between adhesives 318/316 in figure 3. On page 7, Applicant argues that “Applicant submits that it would be clear to a person of ordinary skill in the art that the matching layer as defined in claim 1 serves the function of acoustic impedance matching. Tseng, however, teaches a substantially different stack arrangement: the electrically conductive layer 320 is a separate shielding/thermal layer located between the display stack 311 (including stiffener 330) and the ultrasonic sensor stack 305.” The Office respectfully disagrees for the following reasons. Tseng teaches in [0062], the adhesive layers 316 and/or 318 may be, or may include, a pressure-sensitive adhesive (PSA). That way, the high-impedance material of the electrically conductive layer 320 may be sandwiched between low-impedance materials. On page 7, Applicant argues that “Tseng uses the term "matching layer" separately and distinctly elsewhere in the specification (e.g., matching layer 572 in Fig. 5B and paragraphs [0089]-[0090]), which confirms that the adhesive layer 318, the electrically conductive layer 320 and the optional adhesive layer 316 shown in Fig. 3 is not a matching layer within the meaning of claim 1.” The Office respectfully disagrees for the following reasons. Examiner is not using layer 572 for the rejection. In addition, Tseng teaches in [0062], the adhesive layers 316 and/or 318 may be, or may include, a pressure-sensitive adhesive (PSA). That way, the high-impedance material of the electrically conductive layer 320 may be sandwiched between low-impedance materials. On page 8, Applicant argues that “Applicant submits that a person of ordinary skill in the art would not have been motivated to modify Tseng's shielding structure into the precise three-layer matching layer recited in claim 1, since doing so would alter Tseng's intended acoustic resonator function (see paragraphs [0063]-[0064] of Tseng), which relies on the conductive layer 320 interacting with both the display stiffener 330 and the transistor layer 302 across a large cavity, not functioning as an internal interlayer of a matching layer stacked directly on the chip.” The Office respectfully disagrees for the following reasons. It would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a matching layer with high acoustic impedance as taught by Tseng with the benefit that a high level of acoustic impedance mismatch such as a boundary between a high-impedance material and a low-impedance material may cause most of the ultrasonic waves to be reflected back into a given medium. The reflected ultrasonic waves may constructively interfere with consecutively generated ultrasonic waves in the given medium, resulting in enhanced signals that amplify over time as suggested in [0063]. Consequently, these arguments have been considered but they are not persuasive. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO W FLORES whose telephone number is (571)272-5512. The examiner can normally be reached Monday-Friday, 7am-4pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMR A AWAD can be reached at (571)272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERTO W FLORES/Primary Examiner, Art Unit 2621
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Prosecution Timeline

May 30, 2025
Application Filed
Apr 08, 2026
Non-Final Rejection mailed — §103
Jul 02, 2026
Response Filed
Jul 28, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
50%
Grant Probability
63%
With Interview (+13.6%)
3y 0m (~1y 9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 543 resolved cases by this examiner. Grant probability derived from career allowance rate.

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