DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-4 and 8-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 3-4, 7-8, 10-11, 13, 16-18, and 20 of U.S. Patent No. 11997898. Although the claims at issue are not identical, they are not patentably distinct from each other because the systems of this application contains similar structures adequate to perform the functions recited in the patent application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. The claims are as follows with the differences highlighted:
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11997898
With reference to claim 1: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, wherein the display panel further comprises a shielding portion, and an orthographic projection of the shielding portion on the base substrate at least partially overlaps with the orthographic projection of the first conductive structure on the base substrate.
With reference to claim 1: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.
Claim 1 of this application is being anticipated by claims 1 and 16 of patent 11997898 with similar variation in the non-highlighted limitation above.
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11997898
With reference to claim 1: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, wherein the display panel further comprises a shielding portion, and an orthographic projection of the shielding portion on the base substrate at least partially overlaps with the orthographic projection of the first conductive structure on the base substrate.
With reference to claim 16: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, wherein a material of the first conductive structure is the same as a material of the conductive connection portion.
Claim 1 of this application is being anticipated by claim 16 of patent 11997898 with similar variation in the non-highlighted limitation above.
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11997898
With reference to claim 1: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, wherein the display panel further comprises a shielding portion, and an orthographic projection of the shielding portion on the base substrate at least partially overlaps with the orthographic projection of the first conductive structure on the base substrate.
With reference to claim 17: A display panel, comprising: a base substrate; a pixel unit, located on the base substrate and comprising a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit comprising a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor being connected with a second electrode of the driving transistor, a second electrode of the threshold compensation transistor being connected with a gate electrode of the driving transistor; a first power line, configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, wherein the threshold compensation transistor comprises a first channel and a second channel, and the first channel and the second channel are connected by a conductive connection portion; an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, the display panel further comprises a connection line, wherein the first conductive structure is connected with the gate electrode of the driving transistor through the connection line.
Claim 1 of this application is being anticipated by claim 17 of patent 11997898 with similar variation in the non-highlighted limitation above.
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11997898
Claim 2 is anticipated and comparison
With respect to claim 16.
Claim 3 is anticipated and comparison
With respect to claim 17.
Claim 4 is anticipated and comparison
With respect to claim 20.
Claim 8 is anticipated and comparison
With respect to claim 18.
Claim 9 is anticipated and comparison
With respect to claim 3.
Claim 10 is anticipated and comparison
With respect to claim 3.
Claim 11 is anticipated and comparison
With respect to claim 3.
Claim 12 is anticipated and comparison
With respect to claims 4, 7.
Claim 13 is anticipated and comparison
With respect to claim 4.
Claim 14 is anticipated and comparison
With respect to claim 8.
Claim 15 is anticipated and comparison
With respect to claim 20.
Claim 16 is anticipated and comparison
With respect to claim 20.
Claim 17 is anticipated and comparison
With respect to claim 20.
Claim 18 is anticipated and comparison
With respect to claims 4, 10, 11, and 13.
Claim 19 is anticipated and comparison
With respect to claims 4, 10, 11, and 13.
Claim 20 is anticipated and comparison
With respect to claims, 1, 16, and 17.
Claims 2-4 and 8-20 of this application is being anticipated by and comparable to claims 1, 3-4, 7-8, 10-11, 13, 16-18, and 20 of patent 11997898.
Allowable Subject Matter
Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/IFEDAYO B ILUYOMADE/Primary Examiner, Art Unit 2624 04/04/2026