DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1 – 4, 6, 7, 10, 11, and 13 – 17 are rejected under 35 U.S.C. 103 as being unpatentable over Hu (US Publication Number 2010/0007634) in view of Tu (US Publication Number 2013/0151746) in view of Beebe et al. (US Patent Number 6,715,110, hereinafter “Beebe”).
4. As per claim 1, Hu teaches a monitoring device, comprising: a D-sub connector (VGA interface 300, figure 1, paragraph 8), wherein the D-sub connector comprises a plurality of terminals (SCL pin and SDA pin of VGA interface 300, paragraph 8), the plurality of terminals comprise a first terminal operable as a clock terminal (SCL pin of VGA interface 300 carries serial clock of display data channel, paragraph 8) and a second terminal operable as a data terminal (the SDA pin of the same interface carries serial data of channel, paragraph 8); wherein the first terminal of the D-sub connector is coupled to the first signal line of the I/O expansion circuit (SCL pin of VGA interface 300 is tied through R3 and Q1 to clock line of circuit board, paragraph 8), and the second terminal of the D-sub connector is coupled to the second signal line of the I/O expansion circuit (SDA pin tied same way through R5 and Q2 to corresponding data line, paragraph 8).
Hu does not appear to explicitly disclose and an input/output (I/O) expansion circuit, a monitoring device wherein the I/O expansion circuit comprises a communication interface, the communication interface comprises a first signal line and a second signal line.
However, Tu discloses and an input/output (I/O) expansion circuit (GPIO expander 40, figure 1 fitted between elements of a server and management controller, paragraphs 4 and 10).
Hu and Tu are analogous art because they are from the same field of endeavor data handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hu and Tu before him or her, to modify the data handling of Hu to include the expansion configuration of Tu because it would enhance signal flexibility.
One of ordinary skill would be motivated to make such modification in order to enhance data signaling (paragraph 4). Therefore, it would have been obvious to combine Tu with Hu to obtain the invention as specified in the instant claims.
Hu/Tu does not appear to explicitly disclose a monitoring device wherein the I/O expansion circuit comprises a communication interface, the communication interface comprises a first signal line and a second signal line.
However, Beebe discloses a monitoring device (debug card 120, figures 1b and 3, external device connector to a server) wherein the I/O expansion circuit comprises a communication interface (I2C bus 201, figure 2), the communication interface comprises a first signal line (SCL 204, figure 2) and a second signal line (SDA 202, figure2).
Hu/Tu and Beebe are analogous art because they are from the same field of endeavor of data bus handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hu and Tu before him or her, to modify the structure of Hu to include the bus configuration of Tu because it would hance bus communication.
One of ordinary skill would be motivated to make such modification in order to enhance data integrity (column 1, lines 15 – 50). Therefore, it would have been obvious to combine Beebe with Hu/Tu to obtain the invention as specified in the instant claims.
5. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claim 10, Beebe teaches a system, comprising: a server comprising a first D-sub connector (Hu: 300, figure 1, SCL/SDA, paragraph 8); and a monitoring device (debug card 120, figure 1b) comprising: a second D-sub connector (debug port 117 of 114 with 116, figure 1b) operable to be coupled to the first D-sub connector of the server (114 joined to 112 signals routed off car, figure 1b), wherein the second D-sub connector comprises a plurality of terminals (conductors of debug ribbon cable 116, figure 1b), the plurality of terminals comprise a first terminal operable as a clock terminal (the SCL line of 201 is among signals carried through debug port into 120, figures 1b and 2) and a second terminal operable as a data terminal (SDA line carried through same port and lands on card’s I2C compliant microcontroller, figures 1b, 2, and 3); and an input/output (I/O) expansion circuit (Tu: GPIO 40, figure 1, paragraphs 4 and 10), wherein the I/O expansion circuit comprises a communication interface (bus 201, figure 2), the communication interface comprises a first signal line (SCL 204, figure 2) and a second signal line (SDA 202, figure 2); wherein the first terminal of the second D-sub connector is coupled to the first signal line of the I/O expansion circuit, and the second terminal of the second D-sub connector is coupled to the second signal line of the I/O expansion circuit (I2C signals teed off at connector 114 run over debug cable 116 into 120, figures 1b and 3).
6. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claims 2 and 14, Hu teaches a device and system, wherein the D-sub connector comprises a Video Graphics Array (VGA) connector (VGA 300, figure 1, paragraph 8).
7. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claims 3 and 15, Beebe teaches a device and system, wherein the communication interface comprises an inter-integrated circuit (I2C) communication interface (I2C 201, figure 2).
8. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claim 4, Hu teaches a device, wherein the first signal line of the communication interface is a clock line (DDC_CLK of 100, SCL, paragraph 8), and the second signal line of the communication interface is a data line (DDC_DATA of 100 SDA, paragraph 8).
9. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claims 6 and 16, Tu teaches a device and system, wherein the I/O expansion circuit further comprises a plurality of input/output (I/O) terminals (GPIO of 40, figure 1, paragraph 10).
10. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claims 7 and 17, Tu teaches a device and system, wherein the plurality of I/O terminals are General Purpose Input/Output (GPIO) terminals (GPIO of 40, figure 1).
11. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claim 11, Hu teaches a system, wherein the first D-sub connector of the server comprises a first terminal operable as a clock terminal (SCL of 300, paragraph 8) and a second terminal operable as a data terminal (SDA of 300, paragraph 8).
12. Hu modified by the teachings of Tu/Beebe as seen in claim 1 above, as per claim 13, Hu teaches a system, wherein the first terminal of the first D-sub connector is operable to be coupled to the first terminal of the second D-sub connector (400 interfaced to 300, paragraph 8), and the second terminal of the first D-sub connector is operable to be coupled to the second terminal of the second D-sub connector (SDA pin meets its counterpart in connection EDID passes over device to host, paragraph 9).
13. Claims 5, 8, 9, 18, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hu/Tu/Beebe in view of Wu et al. (US Publication Number 2007/0208973, hereinafter “Wu”).
14. As per claim 20, Hu teaches a monitoring device, comprising: a D-sub connector (VGA 300, paragraph 8), wherein the D-sub connector comprises a plurality of terminals (SCL/SDA pins of 300, paragraph 8), the plurality of terminals comprise a first terminal operable as a clock terminal (SCL pin carries clock of display data channel, paragraph 8)and a second terminal operable as a data terminal (SDA pin, paragraph 8); wherein the first terminal of the D-sub connector is coupled to the first signal line of the I/O expansion circuit (SCL pin tied through R3 and Q1 to clock line of circuit board, paragraph 8), and the second terminal of the D-sub connector is coupled to the second signal line of the I/O expansion circuit (SDA pin tied through R5 and Q2 to data line, paragraph 8).
Hu does not appear to explicitly disclose an input/output (I/O) expansion circuit, wherein the I/O expansion circuit comprises a communication interface, the communication interface comprises a first signal line and a second signal line; wherein the I/O expansion circuit further comprises a plurality of input/output (I/O) terminals, and each of the plurality of I/O terminal is coupled to an indicator operable to provide an indication based on a signal present at the corresponding I/O terminal.
However, Tu discloses an input/output (I/O) expansion circuit (GPIO 40, figure 1, paragraphs 4 and 10); wherein the I/O expansion circuit further comprises a plurality of input/output (I/O) terminals (GPIO interfaces P1…n of 40, figure 1, paragraph 10).
Hu and Tu are analogous art because they are from the same field of endeavor data handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hu and Tu before him or her, to modify the data handling of Hu to include the expansion configuration of Tu because it would enhance signal flexibility.
One of ordinary skill would be motivated to make such modification in order to enhance data signaling (paragraph 4). Therefore, it would have been obvious to combine Tu with Hu to obtain the invention as specified in the instant claims.
Hu/Tu does not appear to explicitly disclose wherein the I/O expansion circuit comprises a communication interface, the communication interface comprises a first signal line and a second signal line; and each of the plurality of I/O terminal is coupled to an indicator operable to provide an indication based on a signal present at the corresponding I/O terminal.
However, Beebe discloses a monitoring device (debug card 120, figures 1b and 3) wherein the I/O expansion circuit comprises a communication interface (I2C bus 201, figure 2), the communication interface comprises a first signal line (SCL 204, figure 2) and a second signal line (SDA 202, figure 2).
Hu/Tu and Beebe are analogous art because they are from the same field of endeavor of data bus handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hu and Tu before him or her, to modify the structure of Hu to include the bus configuration of Tu because it would hance bus communication.
One of ordinary skill would be motivated to make such modification in order to enhance data integrity (column 1, lines 15 – 50). Therefore, it would have been obvious to combine Beebe with Hu/Tu to obtain the invention as specified in the instant claims.
Hu/Tu/Beebe does not appear to explicitly disclose each of the plurality of I/O terminal is coupled to an indicator operable to provide an indication based on a signal present at the corresponding I/O terminal.
However, Wu discloses each of the plurality of I/O terminal is coupled to an indicator (142 and 140, figure 1, paragraphs 26 and 34) operable to provide an indication based on a signal present at the corresponding I/O terminal (via 140 from decoder, figure 1, paragraphs 26, 33, and 34).
Hu/Tu/Beebe and Wu are analogous art because they are from the same field of endeavor of device data handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hu/Tu/Beebe and Wu before him or her, to modify the interface of Hu/Tu/Beebe to include the interface indications of Wu because it would enhance user functionality.
One of ordinary skill would be motivated to make such modification in order to enhance user functionality in status notification (paragraphs 7 – 10). Therefore, it would have been obvious to combine Wu with Hu/Tu/Beebe to obtain the invention as specified in the instant claims.
15. Hu modified by the teachings of Tu/Beebe/Wu as seen in claim 20 above, as per claim 5, Wu teaches a device, wherein the D-sub connector further comprises a third terminal (128 on 114, figure 2b, paragraph 26), the I/O expansion circuit further comprises a power terminal (power source of 110, figure 1, paragraphs 14 and 15), and the third terminal of the D-sub connector is coupled to the power terminal of the I/O expansion circuit (pin 128 slot power pin to power source to 110, figures 1 and 2b, paragraphs 14, 15, and 26).
16. Hu modified by the teachings of Tu/Beebe/Wu as seen in claim 20 above, as per claims 8 and 18, Wu teaches a device and system, wherein at least one I/O terminal of the plurality of I/O terminals (power pin 128, figure 2b, paragraph 26) is coupled to an indicator (power indicator 142, figure 1, paragraph 24) operable to provide an indication based on a signal present at the at least one I/O terminal (142 connected to 128 lights up at presence of power, figure 1, paragraph 34).
17. Hu modified by the teachings of Tu/Beebe/Wu as seen in claim 20 above, as per claims 9 and 19, Wu teaches a device and system, wherein the indicator comprises a light-emitting element (LED 140, figure 1, paragraph 26).
Allowable Subject Matter
18. Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
19. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cudak/Litichever/Pang/Wren/Zheng have teachings of VGA/I2C/GPIO handling.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AURANGZEB HASSAN whose telephone number is (571)272-8625. The examiner can normally be reached 7 AM to 3 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
AH
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
Prosecution Insights