Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/30/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-18 of U.S. Patent No. 12,333,179. Although the claims at issue are not identical, they are not patentably distinct from each other because the limitations of claims 1-20 are anticipated by claims 1-18 of the Patent.
19/224,375
Patent 12,333,179
1. A computing system comprising:
a compute express link (CXL) switch;
a first CXL storage device connected to the CXL switch, and the first CXL storage device being configured to store first user data from an external host and first map data;
a first CXL memory device connected to the CXL switch; and
a second CXL memory device connected to the CXL switch;
wherein the first map data comprises first sub-map data and second sub-map data,
wherein the first CXL storage is further configured to store the first sub-map data in the first CXL memory device and the second sub-map data in the second CXL memory device, in an initialization operation.
8. A system comprising:
a first compute express link (CXL) storage device configured to store first map data;
a first CXL memory device;
a second CXL memory device; and
a CXL switch connected to the first CXL storage device, the first CXL memory device and the second CXL memory device through a CXL interface, the CXL switch configured to arbitrate communications between the first CXL storage device, and the first CXL memory device and the second CXL memory device,
wherein at least one of the first CXL memory device and the second CXL memory device is configured to store first map data of the first CXL storage device, and wherein the first CXL storage device is configured to exchange at least a portion of the first map data with the at least one of the first CXL memory device and the second CXL memory device,
wherein the first map data comprises first sub-map data and second sub-map data, and
wherein the first sub-map data are stored in the first CXL memory device and the second sub-map data are stored in the second CXL memory device.
Allowable Subject Matter
Claims 1-20 are allowable provided the above cited Double Patenting issues are properly overcome. The prior art of record including the disclosure of Hahn et al. (US 2023/0176775) generally teaches s system comprising a plurality of PCIe storage devices connected via a PCIe switching device. The storage devices are capable of storing into its DRAM address mapping table information that would normally be stored in a host memory buffer. Han et al. (US 2024/0020174) generally teaches an information handling system comprising a plurality of CXL storage devices interconnected via CXL switching device. However, none of the prior art of record anticipates nor renders obvious the claim limitations directed towards dividing mapping data and storing to dedicated mapping areas in separate CXL memory devices.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Pal et al. (US 2022/0269433), Malladi et al. (US 2021/0373951) – Disclose a CXL storage
system in which address mapping information may be stored at the CXL switching device.
Hinkle (US 2023/0297236) – Discloses a switched PCIe/CXL storage system in which address
mapping is stored at a “far” storage device so that host does not need to waste resources
transferring mapping information back and forth.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN BERTRAM whose telephone number is (571)270-1377. The examiner can normally be reached M-F 8:30-5MNT.
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/RYAN BERTRAM/Primary Examiner, Art Unit 2137
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