DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over the claims of U.S. Patent No. 12,455,832. Although the claims at issue are not identical, they are not patentably distinct from each other because the differences are not material to patentability. Essentially all that Applicant has done to the patented claims to arrive at the instant claims is remove limitations. It is obvious to remove limitations from patented claims. The claim chart below shows the differences between instant claim 1 and patented claim 1.
Instant claim 1
Patented claim 1 from
US 12,455,832
1. A method for translation lookaside buffer (TLB) compression, comprising:
1. A method for translation lookaside buffer (TLB) compression, comprising:
determining that a plurality of physical memory addresses, which are associated with a plurality of virtual memory addresses, are contiguous with one another,
determining that a plurality of physical memory addresses, which are associated with a plurality of virtual memory addresses, are contiguous with one another and share one or more common address bits or one or more common attribute bits,
wherein each respective physical memory address of the plurality of physical memory addresses corresponds to a separate respective physical memory page;
wherein each respective physical memory address of the plurality of physical memory addresses corresponds to a separate respective physical memory page;
generating a tag for an entry in a TLB, the tag representing the plurality of virtual memory addresses;
generating a tag for an entry in a TLB, the tag representing the plurality of virtual memory addresses;
and associating, in the entry in the TLB, the tag with data comprising bits representing the plurality of physical memory addresses.
and associating, in the entry in the TLB, the tag with data comprising: a single instance of the one or more common address bits or the one or more common attribute bits of the plurality of physical memory addresses; and one or more other bits from each physical memory address of the plurality of physical memory addresses, other than the one or more common address bits or the one or more common attribute bits, that are not shared across the plurality of physical memory addresses.
Conclusion
Any inquiry concerning this Office action should be directed to the Examiner by phone at (571) 272-4214.
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/Kevin Verbrugge/
Kevin Verbrugge
Primary Examiner
Art Unit 2132
Prosecution Insights