Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Preliminary Amendment
Applicant's preliminary amendments, filed September 03, 2025 are respectfully acknowledged and have been fully considered.
Claim 1 is amended.
Claims 1-20 are pending.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: CNT in Fis 6 and 12. In addition, it is unclear to what feature CNT refers in Fig 12.
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the structure described in Claim 5 [“the second contact hole overlaps with the data driving circuit in a plan view”] must be shown or the feature canceled from the claim. No new matter should be entered.
As the specification nor drawings provide no example nor teaching how this limitation is made possible to implement, examiner assumes the limitation to include ““the second contact hole overlaps with the data driving circuit in a plan view, when viewed along the Y direction” for examination purposes.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities: typographical error. “plurality of gate line” in line 6 should be “plurality of gate lines”. Appropriate correction is required.
Further depending claims not mentioned inherit the deficiencies of their respective base claims and are rejected [objected to] under similar rationale.
Claim 16 is objected to because of the following informalities: typographical error. “disposed to parallel to” in line 6 should perhaps be “disposed parallel to”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, 6, 8-9, 12, and 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. (U.S. Patent Application 20190278145 A1, hereinafter “Tanaka”) in view of Liu et al. (U.S. Patent Application 20250126987 A1, hereinafter “Liu”).
Regarding Claim 1 (Currently Amended), Tanaka teaches a display device comprising:
a substate comprising a display area and a non-display area (par 0043 Fig 2A substrate 10 comprising a display area R and a non-display frame region [par 0047] around the display area R);
a data driving circuit disposed around an edge of the display area or the non-display area (par 0045 Fig 2A data/source driving circuit 14 in the frame region around an edge of the display area R);
a plurality of data lines extending in a first direction in the display area (par 0044 Fig 2A a plurality of data lines 12P,12Q extending in a first Y direction in the display area R);
a plurality of gate line extending in a second direction intersecting the first direction (par 0044 Fig 2A a plurality of gate lines 11 extending in a second X direction intersecting the first Y direction);
a plurality of pixels included in the display area (par 0051 Fig 3 plurality of pixels pix included in the display area R), each of the plurality of pixels comprising
a first data line group disposed in a first area at least corresponding to the data driving circuit (par 0047 Fig 2A first data line group 12Q disposed in a first area at least corresponding to the data driving circuit 14);
a second data line group disposed in a second area corresponding to at least one area outside of the data driving circuit (par 0047 Fig 2A second data line group 12P disposed in a second area corresponding to at least area outside of the data driving circuit 14);
a plurality of data link lines extending toward a display panel from a data pad part to which the data driving circuit is connected (paras 0047-0048 Fig 2A a plurality of data link lines 120P,120Q extending toward a display panel from a data pad part to which the data driving circuit 14 is connected); and
a data link area in which the plurality of data link lines are disposed (par 0048 Fig 2B area denoted by “120Q” in Fig B), wherein
the plurality of data link lines comprises first data link lines included in a first data link line group and second data link lines included in a second data link line group (paras 0047-0048 Figs 2A,2B plurality of data link lines comprises first data link lines 120Q included in a first data link line group and second data link lines 120P included in a second data link line group), wherein
the first data link line group is disposed in the data link area, and the second data link line group is disposed at least in the first area and the second area (paras 0047-0048 Fig 2A,2B the first data link line group 120Q is disposed in the data link area, and the second data link line group 120P is disposed at least in the first area and the second area), and wherein
the second data link line group and the second data line group are electrically connected to each other (par 0048 Fig 2A,2B the second data link line group 120P and the second data line group 12P are electrically connected to each other).
However, Tanaka appears not to expressly teach
each of the plurality of pixels comprising at least one driving transistor and at least one switching transistor.
Liu teaches each of the plurality of pixels comprising at least one driving transistor and at least one switching transistor (par 0101 Fig 5 each of the plurality of pixel circuits comprising at least one driving transistor T3 [par 0106] and at least one switching transistor T2 [par 0105]).
Tanaka and Liu are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka with the inclusion of the pixel arrangement of Liu. The motivation would have been in order to provide a narrow border data line arrangement for an OLED display.
Regarding Claim 2 (Original), Tanaka as modified teaches the display device of claim 1, wherein
the second data line group is disposed in the second area and disposed to be symmetrical about the first area (Tanaka par 0047 Fig 2A second data line group 12P disposed in the second area and disposed to be symmetrical about the first [12Q] area).
Regarding Claim 3 (Original), Tanaka as modified teaches the display device of claim 1, wherein
each of the second data link lines included in the second data link line group (Tanaka paras 0047-0048 Figs 2A,2B second data link lines 120P) comprises:
a second-first data link line disposed in the data link area (Tanaka par 0048 Fig 2B second-first vertical data link line portion of 120P disposed in the data link area designated with “120Q{“ in Fig 2B);
a second-second data link line disposed in the first area and connected to the second-first data link line (Tanaka par 0048 Fig 2B second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B]); and
a second-third data link line connecting the second-second data link line and the second data line group to each other (Tanaka par 0048 Fig 2B second-third horizontal data link line portion of 120P connecting the second-second data link line and the second data line group 12P to each other).
Regarding Claim 4 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-first data link line and the second-second data link line are connected to each other through a first contact hole (Tanaka par 0048 Fig 2B second-first vertical data link line portion of 120P disposed in the data link area designated with “120Q{“ in Fig 2B and the second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B] are connected to each other through a first contact hole Fig 3 CHa, par 0052), and
the second-second data link line and the second-third data link line are connected to each other through a second contact hole (Tanaka par 0048 Fig 2B second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B] and the second-third horizontal data link line portion of 120P are connected to each other through a second contact hole Fig 3 CHa, par 0052).
Regarding Claim 6 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-first data link line and the second-second data link line extend in the first direction, and
the second-third data link line extends in the second direction intersecting the first direction (Tanaka par 0048 Fig 2B shows such).
Regarding Claim 8 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-second data link lines and the second-third data link lines are connected to each other through contact holes (Tanaka par 0048 Fig 2B second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B] and the second-third horizontal data link line portion of 120P are connected to each other through a contact hole Fig 3 CHa, par 0052), and wherein
the contact holes are disposed to be gradually close to a central area of the first area as a distance from the data driving circuit increases (Liu par 0000 Fig 7A vertices between second-second vertical data link lines 74 and the second-third horizontal data link lines 68 are disposed to be gradually close to a central area of the first area as a distance from the data driving circuit increases).
Tanaka and Liu are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device with contact holes connecting second-second and second-third data link lines of Tanaka with the inclusion of the vertices connecting second-second and second-third data link lines disposed to be gradually close to a central area of the first area as a distance from the data driving circuit increases of Liu to provide the contact holes are disposed to be gradually close to a central area of the first area as a distance from the data driving circuit increases. The motivation would have been in order to provide the second-third horizontal datalink lines on the same layer as the gate lines in a data line interconnection arrangement that provides a narrower border.
Regarding Claim 9 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-third data link lines and data lines included in the second data line group among the plurality of data lines are connected to each other through contact holes (Tanaka par 0048 Fig 2B second-third horizontal data link line portion of 120P and data lines included in the second data line group are connected to each other through a contact hole Fig 3 CHb, par 0052), wherein
the contact holes are disposed to be gradually close to an outer edge of the second area adjacent to the data driving circuit as a distance from the data driving circuit decreases (Tanaka par 0048 Fig 3 shows such).
Regarding Claim 12 (Original), Tanaka as modified teaches the display device of claim 3, wherein
a second-third data link line among the second-third data link lines does not intersect the first data link lines included in the first data link line group (Tanaka par 0048 Fig 3 shows such).
Regarding Claim 14 (Original), Tanaka as modified teaches the display device of claim 1, wherein
a width of the data pad part in which first to nth data pads are disposed in the second direction corresponds to a width of the data driving circuit (Tanaka par 0047 Fig 2A at least suggests such to one of skill in the art).
Regarding Claim 15 (Original), Tanaka as modified teaches the display device of claim 1, wherein
a width of the data driving circuit is less than a width of the display area, and
a width of the data pad part is less than the width of the display area (Tanaka par 0047 Fig 2A teaches such).
Regarding Claim 16 (Original), Tanaka as modified teaches the display device of claim 1, further comprising
at least one dummy data link line disposed to parallel to at least one data line included in the second data line group among the plurality of data lines in the second area (Tanaka par 0054 Fig 3 at least one dummy line 221 is disposed parallel to at least one data line 12P included in the second data line group among the plurality of data lines in the second area).
Regarding Claim 17 (Original), Tanaka as modified teaches the display device of claim 3, wherein
at least one of the plurality of gate lines intersects at least one of the second-second data link line (Tanaka par 0047 Figs 2A,3 at least one of the plurality of gate lines 11 intersects at least one of the second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B]).
Regarding Claim 18 (Original), Tanaka as modified teaches the display device of claim 1, wherein
the first data link line group is connected between the data driving circuit and the first data line group in straight lines (Tanaka par 0049 Fig 2A,2B shows such, first data link line group 120Q shown as connected between the data driving circuit and the first data line group in straight lines).
Regarding Claim 19 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-first data link line is disposed in a bezel area of the display panel (Tanaka par 0048 Fig 2B second-first vertical data link line portion of 120P disposed in the data link area designated with “120Q{“ in Fig 2B which is a bezel area).
Regarding Claim 20 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-third data link line is formed on a layer different from the second data line group (Tanaka par 0052 Fig 2B,3 the second-third data link line/partial line 120Pb is made of a material same as a material for the gate lines 11, and is provided in a layer including the gate lines 11 different than a layer including the data lines 12).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. (U.S. Patent Application 20190278145 A1, hereinafter “Tanaka”) in view of Liu et al. (U.S. Patent Application 20250126987 A1, hereinafter “Liu”) and further in view of Wang et al. (U.S. Patent Application 20240212597 A1, hereinafter “Wang”).
Regarding Claim 7 (Original), Tanaka as modified teaches the display device of claim 3. However, Tanaka as modified appears not to expressly teach wherein
lengths of the second-third data link lines are formed to gradually increase as a distance from the data driving circuit increases.
Wang teaches wherein
lengths of the second-third data link lines are formed to gradually increase as a distance from the data driving circuit increases (par 0100 Fig 7 second-third horizontal data link line portions of 50 lengths are formed to gradually increase as a distance from the data driving circuit increases).
Tanaka Liu and Wang are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka/Liu with the inclusion of the second-third data link lines arrangement of Wang. The motivation would have been in order to provide a narrow border data line arrangement for an OLED display; since the bonding area does not need to be provided with a fan-shaped oblique line, a width of a fan-out region is reduced, and a width of a lower bezel can be effectively reduced (Wang par 0110).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. (U.S. Patent Application 20190278145 A1, hereinafter “Tanaka”) in view of Liu et al. (U.S. Patent Application 20250126987 A1, hereinafter “Liu”) and further in view of Cheng et al. (U.S. Patent Application 20240196682 A1, hereinafter “Cheng”).
Regarding Claim 10 (Original), Tanaka as modified teaches the display device of claim 3. However, Tanaka as modified appears not to expressly teach wherein
the second-first data link lines and the second-second data link lines are connected to each other through contact holes, wherein the contact holes are disposed to be aligned to each other in the second direction.
Cheng teaches wherein
the second-first data link lines and the second-second data link lines are connected to each other through contact holes, wherein the contact holes are disposed to be aligned to each other in the second direction (par 0131 Fig 8 second-first data link lines 60 and the second-second data link lines 301 are connected to each other through contact holes 50 aligned to each other in the second X direction).
Tanaka Liu and Cheng are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka/Liu with the inclusion of the contact holes arrangement of Cheng. The motivation would have been in order to provide that the first extension line 60 is arranged in the same layer and made of the same material as the second connecting portion 402; the first extension line 60 which is located in the bending region 202 has a better bending reliability (Cheng par 0131,0136).
Claims 5 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. (U.S. Patent Application 20190278145 A1, hereinafter “Tanaka”) in view of Liu et al. (U.S. Patent Application 20250126987 A1, hereinafter “Liu”) and further in view of Cui et al. (U.S. Patent Application 20250040368 A1, hereinafter “HCui”).
Regarding Claim 5 (Original), Tanaka as modified teaches the display device of claim 4. However, Tanaka as modified appears not to expressly teach wherein
the second contact hole overlaps with the data driving circuit in a plan view.
HCui teaches wherein
the second contact hole overlaps with the data driving circuit in a plan view (par 0140 Figs 5A,5C second contact hole overlaps with the data driving circuit in a plan view, when viewed along the Y direction).
Tanaka Liu and HCui are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka/Liu with the inclusion of the second hole arrangement of HCui. The motivation would have been in order to provide a narrow border data line arrangement for an OLED display (HCui par 0144).
Regarding Claim 11 (Original), Tanaka as modified teaches the display device of claim 3, wherein
the second-second data link lines and the second-third data link lines are connected to each other through contact holes (Tanaka par 0048 Fig 2B second-second vertical data link line portion of 120P disposed in the first area [and above the data link line area designated with “120Q{“ in Fig 2B] and the second-third horizontal data link line portion of 120P are connected to each other through a contact hole Fig 3 CHa, par 0052). However, Tanaka as modified appears not to expressly teach wherein
a first half of the contact holes and a second half of the contact holes are disposed to be symmetrical about a first data link line included in the first data link line group, and disposed to be gradually close to each other as a distance from the data driving circuit increases.
HCui teaches wherein
a first half of the contact holes and a second half of the contact holes are disposed to be symmetrical about a first data link line included in the first data link line group, and disposed to be gradually close to each other as a distance from the data driving circuit increases (par 0140 Figs 5A,5C teaches such).
Tanaka Liu and HCui are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka/Liu with the inclusion of the second-third data link lines arrangement of HCui. The motivation would have been in order to provide a narrow border data line arrangement for an OLED display; a width of a lower bezel is greatly shortened, and a screen-to-body ratio is increased, which is beneficial to achieve full-screen display. (HCui par 0144).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. (U.S. Patent Application 20190278145 A1, hereinafter “Tanaka”) in view of Liu et al. (U.S. Patent Application 20250126987 A1, hereinafter “Liu”) and further in view of Shin et al. (U.S. Patent Application 20190362678 A1, hereinafter “Shin”).
Regarding Claim 13 (Original), Tanaka as modified teaches the display device of claim 3. However, Tanaka as modified appears not to expressly teach wherein
all of the second-second data link lines have at least a length corresponding to a length of each of the first data lines included in the first data line group disposed in the first area.
Shin teaches wherein
all of the second-second data link lines have at least a length corresponding to a length of each of the first data lines included in the first data line group disposed in the first area (par 0114 Fig 7A all of the second-second data link lines [here D3,D4 lines act as data link lines for D2,D1, and D3,D4 have at least a length corresponding to a length of each of the first data lines included in the first data line group disposed in the first area).
Tanaka Liu and Shin are analogous art as they each pertain to display devices. It would have been obvious to a person of ordinary skill in the art to modify the display device of Tanaka/Liu with the inclusion of the second-second data link lines having at least a length corresponding to a length of each of the first data lines of Shin. The motivation would have been in order to provide data signal delivery to data lines isolated in an upper area of the display.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARK EDWARDS whose telephone number is 571-270-7731. The examiner can normally be reached on M-F 9a-5p.
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/MARK EDWARDS/
Primary Examiner, Art Unit 2624