Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 1-20 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,032,833. Although the conflicting claims are not identical, they are not patentably distinct from each other because of the following reasons:
Claims 1-20 of U.S. Patent No. 12,032,833 (hereinafter, “Patent”), contains every element of claims 1-20 of the instant application (hereinafter, “Instant Applicant”) and thus anticipate the claims of the instant application. Claims of the instant application therefore are not patently distinct from the earlier patent claims and as such are unpatentable over obvious-type double patenting. A later patent claim is not patentably distinct from an earlier claim if the later claim is anticipated by the earlier claim.
"A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). " ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
“Claim 12 and Claim 13 are generic to the species of invention covered by claim 3 of the patent. Thus, the generic invention is "anticipated" by the species of the patented invention. Cf., Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (holding that an earlier species disclosure in the prior art defeats any generic claim) 4. This court's predecessor has held that, without a terminal disclaimer, the species claims preclude issuance of the generic application. In re Van Ornum, 686 F.2d 937, 944, 214 USPQ 761, 767 (CCPA 1982); Schneller, 397 F.2d at 354. Accordingly, absent a terminal disclaimer, claims 12 and 13 were properly rejected under the doctrine of obviousness-type double patenting.” (In re Goodman (CA FC) 29 USPQ2d 2010 (12/3/1993).
Patent No.: US 12,032,833
Instant Application
1. A system comprising: a memory device; and a processing device, operatively coupled to the memory device, to perform operations comprising: running sample data through each of a set of error-handling operations performed on data residing in a segment of the memory device in an existing order associated with a workload; obtaining error recovery data as a result of running the sample data; and determining an optimized order of the set of error-handling operations based on probability of error recovery and latency data, wherein the probability of error recovery is based on the error recovery data, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order.
A system comprising: a memory device; and a processing device, operatively coupled to the memory device, to perform operations comprising: determining an optimized order of a set of error-handling operations based on a result of testing using sample data, wherein the sample data is tested through each of the set of error-handling operations performed on data residing in a segment of the memory device in an existing order, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order; and executing the set of error-handling operations in the optimized order to correct one or more errors in the data stored on the memory device.
Reasons of Allowance
Claims 1-20 would be allowable if the double patenting rejection is overcome.
The following is a statement of reasons for the indication of allowable subject matter:
Independent Claims 1, 14 and 17 identifies the distinct features “a memory device; and a processing device, operatively coupled to the memory device, to perform operations comprising: determining an optimized order of a set of error-handling operations based on a result of testing using sample data, wherein the sample data is tested through each of the set of error-handling operations performed on data residing in a segment of the memory device in an existing order, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order; and executing the set of error-handling operations in the optimized order to correct one or more errors in the data stored on the memory device", which are not taught or suggested by the prior art of records.
Claims 1-20 would be allowable over the prior art of record because the claimed features as mentioned above in combination with other claimed features are not recited or suggested by the prior art of records. The above features in conjunction with all other limitations of the dependent and independent claims 1-20 are hereby allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lam (US Patent No.: US 8,924,832) “Efficient Error Handling Mechanisms In Data Storage Systems”
Considered for teachings related to data storage systems for computer systems. More particularly, the disclosure relates to mechanisms for efficient searching and updating of system data.
Does not disclose or suggest determining an optimized order of a set of error-handling operations based on a result of testing using sample data, wherein the sample data is tested through each of the set of error-handling operations performed on data residing in a segment of the memory device in an existing order, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order; and executing the set of error-handling operations in the optimized order to correct one or more errors in the data stored on the memory device.
Pignatelli et al. (Pub. No.: US 2018/0137003) “MEDIA QUALITY AWARE ECC DECODING METHOD SELECTION TO REDUCE DATA ACCESS LATENCY”
Considered for teachings related to a memory system, and more particularly to a memory system having a media quality aware Error-Correcting Code (ECC) decoding selection and operating method thereof.
Does not disclose or suggest determining an optimized order of a set of error-handling operations based on a result of testing using sample data, wherein the sample data is tested through each of the set of error-handling operations performed on data residing in a segment of the memory device in an existing order, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order; and executing the set of error-handling operations in the optimized order to correct one or more errors in the data stored on the memory device.
Any inquiry concerning this communication should be directed to Yong Choe at telephone number 571-270-1053 or email to yong.choe@uspto.gov. The examiner can normally be reached on M-F 10:00 am to 6:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rutz, Jared Ian can be reached on (571) 272-5535. Any inquiry of a general nature or relating to the status of this application should be directed to the TC 2100 whose telephone number is (571) 272-2100.
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/YONG J CHOE/Primary Examiner, Art Unit 2135
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