Prosecution Insights
Last updated: August 06, 2026
Application No. 19/234,747

Security Resource Access Method For Integrated Circuit, And Electronic Device

Non-Final OA §103
Filed
Jun 11, 2025
Priority
Jun 11, 2024 — CN 202410748667.3
Examiner
HUSSEIN, HASSAN A
Art Unit
2431
Tech Center
2400 — Computer Networks
Assignee
Horizon Journey (Hangzhou) Technology Co. Ltd.
OA Round
1 (Non-Final)
60%
Grant Probability
Moderate
1-2
OA Rounds
1y 10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
81 granted / 136 resolved
+1.6% vs TC avg
Strong +55% interview lift
Without
With
+54.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
31 currently pending
Career history
171
Total Applications
across all art units

Statute-Specific Performance

§101
4.9%
-35.1% vs TC avg
§103
71.2%
+31.2% vs TC avg
§102
2.8%
-37.2% vs TC avg
§112
14.6%
-25.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 136 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This office action is in response to the application filed on 06/11/2025. In which, claims 1-20 are pending and being considered, claims 1, 9 and 17 are independent, claims 1-20 are rejected. Specification Applicant is reminded of the proper language and format for an abstract of the disclosure. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided. The abstract of the disclosure is objected to because “disclosed” is stated on line 1 of the abstract. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). Claim Objections Claim 2, 5-6, 10, 13-14, 16 and 18-19 objected to because of the following informalities: In regards to Claims 2 and 10, the applicant recites the limitation “a plurality of operating system domains”, this is a typographical error as the claim should read “the plurality of operating system domains”. Appropriate correction is required. In regards to Claims 2,10 and 18, the applicant recites the limitation “the corresponding interrupt controller”, this is a typographical error as there is a lack of antecedent basis. Examiner suggest amending the claim by removing the phrase “the”. Appropriate correction is required. In regards to Claims 3, 11 and 19, the applicant recites the limitation “a security resource access request”, this is a typographical error as the claim should read “the security resource access request”. Appropriate correction is required. In regards to Claims 5-6 and 13-14, the applicant recites the limitation “the process”, this is a typographical error as there is a lack of antecedent basis. Examiner suggest amending the claim by removing the phrase “the”. Appropriate correction is required. In regards to Claims 8 and 16, the applicant recites the limitation “the interrupt controller”, this is a typographical error as there is a lack of antecedent basis. Examiner suggest amending the claim by removing the phrase “the”. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 9 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”) further in view of Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) In regards to Claim 1, Liu teaches a security resource access method for an integrated circuit, comprising: (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) processing a security resource access request of the second preset-state operating system in the operating system domain based on the first preset-state operating system in the operating system domain. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu does not explicitly teach determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and Wherein Kumar teaches determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and (Par. (0020-0022); running (executing) a first preset-state operating (executing a first OS with state of operating system) with second OS)), (Par. (0074); first preset operating system (CPU with OS and state) with domains of CPU)), (Par. (0025, 0057); first preset-state operating system or a second preset-state operating (Operating system with suspended state and operating system with active state)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining available memory based on operating systems to facilitate migration and transfers improve the overall performance of computers. (Kumar Par. (0003-006, 0021-0022 and 0026)) In regards to Claim 9, Liu teaches a non-transitory computer readable storage medium, on which a computer program is stored, (Par. (0187-0188); computer readable medium with computer program)) wherein the computer program, when executed by a processor, causes the processor to implement a security resource access method for an integrated circuit ,wherein the method comprises: (Par. (0187-0188); computer program)) (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) processing a security resource access request of the second preset-state operating system in the operating system domain based on the first preset-state operating system in the operating system domain. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu does not explicitly teach determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and Wherein Kumar teaches determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and (Par. (0020-0022); running (executing) a first preset-state operating (executing a first OS with state of operating system) with second OS)), (Par. (0074); first preset operating system (CPU with OS and state) with domains of CPU)), (Par. (0025, 0057); first preset-state operating system or a second preset-state operating (Operating system with suspended state and operating system with active state)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining available memory based on operating systems to facilitate migration and transfers improve the overall performance of computers. (Kumar Par. (0003-006, 0021-0022 and 0026)) In regards to Claim 17, Liu teaches an electronic device, (Par. (0064, 0187); device) wherein the electronic device comprises: a processor; and a memory, configured to store processor-executable instructions, (Par. (0185-0187); device with processor and memory)) wherein the processor is configured to read the executable instructions from the memory, and execute the instructions to implement a security resource access method for an integrated circuit, wherein the method comprises: (Par. (0185-0187) processor, memory and instructions)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) processing a security resource access request of the second preset-state operating system in the operating system domain based on the first preset-state operating system in the operating system domain. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu does not explicitly teach determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and Wherein Kumar teaches determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) running a first preset-state operating system or a second preset-state operating system in the operating system domain by the processor core corresponding to the operating system domain; and (Par. (0020-0022); running (executing) a first preset-state operating (executing a first OS with state of operating system) with second OS)), (Par. (0074); first preset operating system (CPU with OS and state) with domains of CPU)), (Par. (0025, 0057); first preset-state operating system or a second preset-state operating (Operating system with suspended state and operating system with active state)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining available memory based on operating systems to facilitate migration and transfers improve the overall performance of computers. (Kumar Par. (0003-006, 0021-0022 and 0026)) Claim(s) 2, 10 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”) and Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) further in view of Benhammadi et al. (U.S Pub. No. 20210318972, hereinafter referred to as “Benhammadi”) In regards to Claim 2, the combination of Liu and Kumar teach the method of claim 1, Kumar further teaches wherein the determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains comprises: (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining operating systems with domains to enhance the transfer of data and allow the system to determine based on the OS and domain allocated a particular CPU and to perform execution. (Kumar Par. (0020 and 0035)) Liu and Kumar do not explicitly teach determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and determining the processor core corresponding to each operating system domain based on the connection relationship, wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. Wherein Benhammadi teaches determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and (Par. (0062); interrupt controller linked to and connected with processor core of integrated circuit (linked and connected to circuit CC)), (Par.(0094; interrupt controller with plurality of processor cores (interrupt controller with CPU’s)), (Par. (0020-0021, 0027); plurality of interrupt controllers with connection relationship (delivering interrupt signals for a processor with control circuit)) determining the processor core corresponding to each operating system domain based on the connection relationship, (Par. (0091-0095); determining secure and unsecure domains with CPU based on item and code associated with connection relationship (incorporated interrupt controller with CPU)) wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. (Figure 1 label CI, CPU; processor core (CPU) connected to interrupt controller (CL)), (Par. (0091-0095); CPU with domain incorporating interrupt controller)) (Figure 5 labels ITC, CPU, EQ1S; domain with CPU with interrupt controller all connected)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Benhammadi to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of implementing interrupt controller associated with domains to identify secure from unsecure processing circuitry based on specific domains. (Benhammadi Par. (0003-0004)) In regards to Claim 10, the combination of Liu and Kumar teach the non-transitory computer readable storage medium of claim 9, Kumar further teaches determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains; (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining operating systems with domains to enhance the transfer of data and allow the system to determine based on the OS and domain allocated a particular CPU and to perform execution. (Kumar Par. (0020 and 0035)) Liu and Kumar do not explicitly teach determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and determining the processor core corresponding to each operating system domain based on the connection relationship, wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. Wherein Benhammadi teaches determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and (Par. (0062); interrupt controller linked to and connected with processor core of integrated circuit (linked and connected to circuit CC)), (Par.(0094; interrupt controller with plurality of processor cores (interrupt controller with CPU’s)), (Par. (0020-0021, 0027); plurality of interrupt controllers with connection relationship (delivering interrupt signals for a processor with control circuit)) determining the processor core corresponding to each operating system domain based on the connection relationship, (Par. (0091-0095); determining secure and unsecure domains with CPU based on item and code associated with connection relationship (incorporated interrupt controller with CPU)) wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. (Figure 1 label CI, CPU; processor core (CPU) connected to interrupt controller (CL)), (Par. (0091-0095); CPU with domain incorporating interrupt controller)) (Figure 5 labels ITC, CPU, EQ1S; domain with CPU with interrupt controller all connected)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Benhammadi to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of implementing interrupt controller associated with domains to identify secure from unsecure processing circuitry based on specific domains. (Benhammadi Par. (0003-0004)) In regards to Claim 18, the combination of Liu and Kumar teach the electronic device of claim 17, Kumar further teaches wherein the determining, on the integrated circuit, a processor core corresponding to each of a plurality of operating system domains comprises: (Par. (0035); determining on the integrated circuit, (determining on CPU) a domain amongst plurality of affinity domains that is allocated to a particular processor)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu to incorporate the teaching of Kumar to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of determining operating systems with domains to enhance the transfer of data and allow the system to determine based on the OS and domain allocated a particular CPU and to perform execution. (Kumar Par. (0020 and 0035)) Liu and Kumar do not explicitly teach determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and determining the processor core corresponding to each operating system domain based on the connection relationship, wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. Wherein Benhammadi teaches determining connection relationships between each of a plurality of interrupt controllers of the integrated circuit and a plurality of processor cores of the integrated circuit; and (Par. (0062); interrupt controller linked to and connected with processor core of integrated circuit (linked and connected to circuit CC)), (Par.(0094; interrupt controller with plurality of processor cores (interrupt controller with CPU’s)), (Par. (0020-0021, 0027); plurality of interrupt controllers with connection relationship (delivering interrupt signals for a processor with control circuit)) determining the processor core corresponding to each operating system domain based on the connection relationship, (Par. (0091-0095); determining secure and unsecure domains with CPU based on item and code associated with connection relationship (incorporated interrupt controller with CPU)) wherein the processor core corresponding to the operating system domain is connected to the corresponding interrupt controller. (Figure 1 label CI, CPU; processor core (CPU) connected to interrupt controller (CL)), (Par. (0091-0095); CPU with domain incorporating interrupt controller)) (Figure 5 labels ITC, CPU, EQ1S; domain with CPU with interrupt controller all connected)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Benhammadi to utilize the above feature because of the analogous concept of hardware circuitry and processing operating system based on domain properties, with the motivation of implementing interrupt controller associated with domains to identify secure from unsecure processing circuitry based on specific domains. (Benhammadi Par. (0003-0004)) Claim(s) 3-4, 11-12 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”) and Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) further in view of Asanovic et al. (U.S Pub. No. 20230333861, hereinafter referred to as “Asanovic”) In regards to Claim 3, the combination of Liu and Kumar teach the method of claim 1, Liu further teaches the method according to claim 1, wherein the processing a security resource access request of the second preset-state operating system in the operating system domain based on the first preset-state operating system in the operating system domain comprises: (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) processing the security resource access request of the second preset-state operating system based on the first preset-state operating system. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu and Kumar do not explicitly teach switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and Wherein Asanovic teaches switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and (Par. (0099); switching the second preset state (switching from a prior operating system) to the first preset-state operating system (switching to first operating system) based on a security monitoring program (detection of context data) corresponding to the operating system domain (determining parameters and security domain of first and second operating systems)), (Par. (0022, 0098); first preset-state operating system and second preset-state operating system (guest operating system and operating system with attributes set)), (Par. (0037, 0048); security monitoring program (processor selector that detects context data/ context switch and address space change)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of detecting characteristics of operating system and applying application security based on behaviors and switching operating systems to allow security domains and other parameters to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) In regards to Claim 4, the combination of Liu and Kumar do not explicitly teach wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. Wherein Asanovic teaches wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. (Par. (0037, 0048); same security monitoring program (single processor selector that detects context data/ context switch and address space change corresponding to operating system domains)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of utilizing domains associated with security monitoring to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) In regards to Claim 11, the combination of Liu and Kumar teach the non-transitory computer readable storage medium of claim 9, Liu further teaches the non-transitory computer readable storage medium according to claim 9, wherein the processing a security resource access request of the second preset-state operating system in the operating system domain based on the first preset-state operating system in the operating system domain comprises: (Par. (0187); computer-readable medium), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) processing the security resource access request of the second preset-state operating system based on the first preset-state operating system. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu and Kumar do not explicitly teach switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and Wherein Asanovic teaches switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and (Par. (0099); switching the second preset state (switching from a prior operating system) to the first preset-state operating system (switching to first operating system) based on a security monitoring program (detection of context data) corresponding to the operating system domain (determining parameters and security domain of first and second operating systems)), (Par. (0022, 0098); first preset-state operating system and second preset-state operating system (guest operating system and operating system with attributes set)), (Par. (0037, 0048); security monitoring program (processor selector that detects context data/ context switch and address space change)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of detecting characteristics of operating system and applying application security based on behaviors and switching operating systems to allow security domains and other parameters to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) In regards to Claim 12, the combination of Liu and Kumar do not explicitly teach wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. Wherein Asanovic teaches wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. (Par. (0037, 0048); same security monitoring program (single processor selector that detects context data/ context switch and address space change corresponding to operating system domains)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of utilizing domains associated with security monitoring to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) In regards to Claim 19, the combination of Liu and Kumar teach the electronic device of claim 17, Liu further teaches the electronic device according to claim 17, wherein the processing a security resource access request of the second preset-state operating systemin the operating system domain based on the first preset-state operating system in the operating system domain comprises: (Par. (0064); device), (Par. (0187); computer-readable medium), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)) (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) processing the security resource access request of the second preset-state operating system based on the first preset-state operating system. (Par. (0050); sending a access request to second preset-state operating system domain (second sink CPU with domain) based on based on the first preset-state operating system in the operating system domain (forwarded access request to second sink CPU based on first preset-state operating system in the operating system domain (first sink SPU with domain)), (Par. (0045); processing a security resource access request (sending access request corresponding to transaction and data packet of CPU)), (Par. (0016); second preset-state operating system in the operating system domain based on the first preset-state operating system (CPU with domain that has data states a silent state for a sink CPU and invalid state with second sink CPU)) Liu and Kumar do not explicitly teach switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and Wherein Asanovic teaches switching, based on a security monitoring program corresponding to the operating system domain, the second preset-state operating system running on the processor core corresponding to the operating system domain to the first preset-state operating system; and (Par. (0099); switching the second preset state (switching from a prior operating system) to the first preset-state operating system (switching to first operating system) based on a security monitoring program (detection of context data) corresponding to the operating system domain (determining parameters and security domain of first and second operating systems)), (Par. (0022, 0098); first preset-state operating system and second preset-state operating system (guest operating system and operating system with attributes set)), (Par. (0037, 0048); security monitoring program (processor selector that detects context data/ context switch and address space change)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of detecting characteristics of operating system and applying application security based on behaviors and switching operating systems to allow security domains and other parameters to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) In regards to Claim 20, the combination of Liu and Kumar do not explicitly teach wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. Wherein Asanovic teaches wherein the plurality of operating system domains correspond to a same security monitoring program, or each of the plurality of operating system domains corresponds to one security monitoring program, separately. (Par. (0037, 0048); same security monitoring program (single processor selector that detects context data/ context switch and address space change corresponding to operating system domains)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of utilizing domains associated with security monitoring to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) Claim(s) 5 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”), Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) and Asanovic et al. (U.S Pub. No. 20230333861, hereinafter referred to as “Asanovic”) further in view of Werner et al. (U.S Pub. No. 20200167085, hereinafter referred to as “Werner”) In regards to Claim 5, the combination of Liu and Kumar do not explicitly teach starting a first security monitoring program corresponding to a first operating system domain in the plurality of operating system domains, and initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. Wherein Asanovic teaches starting a first security monitoring program corresponding to a first operating system domain in the plurality of operating system domains, and (Par. (0037, 0048); starting security monitoring program (single processor selector that detects context data/ context switch and address space change corresponding to operating system and domain)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of detecting characteristics of operating system and applying application security based on behaviors and switching operating systems to allow security domains and other parameters to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) Liu, Kumar and Asanovic do not explicitly teach initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. Wherein Werner teaches initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and (Par. (0049, 0072); hardware configuration module (TKE system with client server configuration and TKE configuration on computer system)), (Par. (0040, 0072); configuration with first operating system of security monitoring program (authentication of operating system) and configuration TKE steps)), (Par.(0068-0069); first security monitoring program (application and program that runs authentication process with operating systems)) starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. (Par. (0040, 0072); security monitoring program (authentication process) and configuration with second operating system)), (Par. (0087-0088); corresponding to a second operating system domain in the plurality of operating system domains (authentication process and second level operating systems with different domains)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar and Asanovic to incorporate the teaching of Werner to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of increasing effectiveness and combatting challenges of security vulnerabilities to prevent breaches and loss of data by system malfunctions and using hardware modules to secure data and manage computer resources. (Werner Par. (0002)) In regards to Claim 13, the combination of Liu and Kumar do not explicitly teach starting a first security monitoring program corresponding to a first operating system domain in the plurality of operating system domains, and initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. Wherein Asanovic teaches starting a first security monitoring program corresponding to a first operating system domain in the plurality of operating system domains, and (Par. (0037, 0048); starting security monitoring program (single processor selector that detects context data/ context switch and address space change corresponding to operating system and domain)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Asanovic to utilize the above feature because of the analogous concept of secure monitoring of hardware within operating systems, with the motivation of detecting characteristics of operating system and applying application security based on behaviors and switching operating systems to allow security domains and other parameters to determine performances, malware responses and permitted configurations. (Asanovic Par. (0020, 0022, 0081)) Liu, Kumar and Asanovic do not explicitly teach initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. Wherein Werner teaches initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program; and (Par. (0049, 0072); hardware configuration module (TKE system with client server configuration and TKE configuration on computer system)), (Par. (0040, 0072); configuration with first operating system of security monitoring program (authentication of operating system) and configuration TKE steps)), (Par.(0068-0069); first security monitoring program (application and program that runs authentication process with operating systems)) starting a second security monitoring program corresponding to a second operating system domain in the plurality of operating system domains. (Par. (0040, 0072); security monitoring program (authentication process) and configuration with second operating system)), (Par. (0087-0088); corresponding to a second operating system domain in the plurality of operating system domains (authentication process and second level operating systems with different domains)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar and Asanovic to incorporate the teaching of Werner to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of increasing effectiveness and combatting challenges of security vulnerabilities to prevent breaches and loss of data by system malfunctions and using hardware modules to secure data and manage computer resources. (Werner Par. (0002)) Claim(s) 6 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”), Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”), Asanovic et al. (U.S Pub. No. 20230333861, hereinafter referred to as “Asanovic”)Werner et al. (U.S Pub. No. 20200167085, hereinafter referred to as “Werner”) and Chitnis et al. (U.S No. 10929209, hereinafter referred to as “Chitnis”) further in view of Shiratori et al. (U.S Pub. No. 20140181344, hereinafter referred to as “Shiratori”) In regards to Claim 6, the combination of Liu, Kumar and Asanovic do not explicitly teach wherein the initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program comprises: during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Werner teaches wherein the initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program comprises: (Par. (0049, 0072); hardware configuration module (TKE system with client server configuration and TKE configuration on computer system)), (Par. (0040, 0072); configuration with first operating system of security monitoring program (authentication of operating system) and configuration TKE steps)), (Par.(0068-0069); first security monitoring program (application and program that runs authentication process with operating systems)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar and Asanovic to incorporate the teaching of Werner to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of increasing effectiveness and combatting challenges of security vulnerabilities to prevent breaches and loss of data by system malfunctions and using hardware modules to secure data and manage computer resources. (Werner Par. (0002)) Liu, Kumar, Asanovic and Werner do not explicitly teach during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Chitnis teaches during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and (Col. 11 lines 10-65 and Col. 12 1-15; during the process of starting the first security monitoring program (MMU checking request from trusted source) configuring different memory spaces respectively for the operating system domains by a firewall (destination memory address that are domain specific corresponding to firewall)), (Col. 10 liens 55-67 and Col. 11 lines 1-15; different memory spaces (memory and address space sizes with larger and smaller spaces for memory), (Figure 5 label 502, 504 and 318; firewall and proxy in hardware configuration module (trusted and sandbox IPC)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar, Asanovic and Werner to incorporate the teaching of Chitnis to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of improving security of operating systems and devices that are susceptible to malware or other malicious security threats to reduce human operation error, disruption and system failures. (Chitnis Col. 1 lines 15-40)) Liu, Kumar, Asanovic, Werner and Chitnis do not explicitly teach during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Shiratori teaches during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. (Par. (0012); during the process of starting the first security monitoring program (detection of abnormal operation) a connection relationship between each interrupt controller and the processor core by an interrupt selector (interrupt controller sending to processor and interrupt priority selector with interrupt processing circuit that configures and assigned levels)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar, Asanovic, Werner and Chitnis to incorporate the teaching of Shiratori to utilize the above feature because of the analogous concept of detection of operating systems and hardware configurations, with the motivation of detecting abnormal operations based on interrupts and confirming to CPU’s in the operating system accepted operations to limit failures and create flow in transmission. (Shiratori Par. (0004-0010)) In regards to Claim 14, the combination of Liu, Kumar and Asanovic do not explicitly teach wherein the initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program comprises: during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Werner teaches wherein the initializing a hardware configuration module of the integrated circuit during the process of starting the first security monitoring program comprises: (Par. (0049, 0072); hardware configuration module (TKE system with client server configuration and TKE configuration on computer system)), (Par. (0040, 0072); configuration with first operating system of security monitoring program (authentication of operating system) and configuration TKE steps)), (Par.(0068-0069); first security monitoring program (application and program that runs authentication process with operating systems)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar and Asanovic to incorporate the teaching of Werner to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of increasing effectiveness and combatting challenges of security vulnerabilities to prevent breaches and loss of data by system malfunctions and using hardware modules to secure data and manage computer resources. (Werner Par. (0002)) Liu, Kumar, Asanovic and Werner do not explicitly teach during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Chitnis teaches during the process of starting the first security monitoring program, configuring different memory spaces respectively for the operating system domains by a firewall in the hardware configuration module; and (Col. 11 lines 10-65 and Col. 12 1-15; during the process of starting the first security monitoring program (MMU checking request from trusted source) configuring different memory spaces respectively for the operating system domains by a firewall (destination memory address that are domain specific corresponding to firewall)), (Col. 10 liens 55-67 and Col. 11 lines 1-15; different memory spaces (memory and address space sizes with larger and smaller spaces for memory), (Figure 5 label 502, 504 and 318; firewall and proxy in hardware configuration module (trusted and sandbox IPC)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar, Asanovic and Werner to incorporate the teaching of Chitnis to utilize the above feature because of the analogous concept of detection of operating systems based on domain and hardware configurations, with the motivation of improving security of operating systems and devices that are susceptible to malware or other malicious security threats to reduce human operation error, disruption and system failures. (Chitnis Col. 1 lines 15-40)) Liu, Kumar, Asanovic, Werner and Chitnis do not explicitly teach during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. Wherein Shiratori teaches during the process of starting the first security monitoring program, configuring a connection relationship between each interrupt controller and the processor core by an interrupt selector in the hardware configuration module. (Par. (0012); during the process of starting the first security monitoring program (detection of abnormal operation) a connection relationship between each interrupt controller and the processor core by an interrupt selector (interrupt controller sending to processor and interrupt priority selector with interrupt processing circuit that configures and assigned levels)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu, Kumar, Asanovic, Werner and Chitnis to incorporate the teaching of Shiratori to utilize the above feature because of the analogous concept of detection of operating systems and hardware configurations, with the motivation of detecting abnormal operations based on interrupts and confirming to CPU’s in the operating system accepted operations to limit failures and create flow in transmission. (Shiratori Par. (0004-0010)) Claim(s) 7 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”) and Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) further in view of Han et al. (U.S Pub. No. 20160314008, hereinafter referred to as “Han”) In regards to Claim 7, the combination of Liu and Kumar do not explicitly teach writing to-be-transmitted data into a shared memory space of the first operating system domain and the second operating system domain by the second preset-state operating system in the first operating system domain; transmitting notification information to a second preset-state operating system in the second operating system domain by the second preset-state operating system in the first operating system domain, wherein the notification information indicates that data that can be read by the second preset-state operating system in the second operating system domain is stored in the shared memory space; and in response to the notification information, reading the to-be-transmitted data from the shared memory space by the second preset-state operating system in the second operating system domain. Wherein Han teaches writing to-be-transmitted data into a shared memory space of the first operating system domain and the second operating system domain by the second preset-state operating system in the first operating system domain; (Par. (0100); write to be transferred to shared memory on first operating system domain (GPU domain)), (Par. (0047-0049); second preset operating system domain (plurality of GPU domains)), (Par. (0127); second preset-state operating system in the first operating system domain; (quantity of GPU that includes types of operating systems)) transmitting notification information to a second preset-state operating system in the second operating system domain by the second preset-state operating system in the first operating system domain, (Par. (0513); sending notification to second preset-state operating system (GPU) in the second operating system domain (GPU domain ) by the second preset-state operating system in the first operating system domain (notification sent from processor corresponding to GPU)) wherein the notification information indicates that data that can be read by the second preset-state operating system in the second operating system domain is stored in the shared memory space; and (Par. (0513-0515); notification indicates GPU and GPU domain has read permission associated with shared memory)), (Par. (0167, 0183); GPU domain and storage in memory corresponding to shared memory)) in response to the notification information, reading the to-be-transmitted data from the shared memory space by the second preset-state operating system in the second operating system domain. (Par. (0033-0038); after notification is sent, reading the data and read data is completed by GPU corresponding to domain)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Han to utilize the above feature because of the analogous concept of operating systems based on domain and hardware configurations, with the motivation of utilizing different operating systems and addresses the problem and transferring and converting data with large scale and complex program while using shared memory and permissions identified by hardware component in the operating system to determine space and complete transmission. (Han Par. (0003-0004 and 0040-0041)) In regards to Claim 15, the combination of Liu and Kumar do not explicitly teach writing to-be-transmitted data into a shared memory space of the first operating system domain and the second operating system domain by the second preset-state operating system in the first operating system domain; transmitting notification information to a second preset-state operating system in the second operating system domain by the second preset-state operating system in the first operating system domain, wherein the notification information indicates that data that can be read by the second preset-state operating system in the second operating system domain is stored in the shared memory space; and in response to the notification information, reading the to-be-transmitted data from the shared memory space by the second preset-state operating systemin the second operating system domain. Wherein Han teaches writing to-be-transmitted data into a shared memory space of the first operating system domain and the second operating system domain by the second preset-state operating system in the first operating system domain; (Par. (0100); write to be transferred to shared memory on first operating system domain (GPU domain)), (Par. (0047-0049); second preset operating system domain (plurality of GPU domains)), (Par. (0127); second preset-state operating system in the first operating system domain; (quantity of GPU that includes types of operating systems)) transmitting notification information to a second preset-state operating system in the second operating system domain by the second preset-state operating system in the first operating system domain, (Par. (0513); sending notification to second preset-state operating system (GPU) in the second operating system domain (GPU domain ) by the second preset-state operating system in the first operating system domain (notification sent from processor corresponding to GPU)) wherein the notification information indicates that data that can be read by the second preset-state operating system in the second operating system domain is stored in the shared memory space; and (Par. (0513-0515); notification indicates GPU and GPU domain has read permission associated with shared memory)), (Par. (0167, 0183); GPU domain and storage in memory corresponding to shared memory)) in response to the notification information, reading the to-be-transmitted data from the shared memory space by the second preset-state operating systemin the second operating system domain. (Par. (0033-0038); after notification is sent, reading the data and read data is completed by GPU corresponding to domain)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Han to utilize the above feature because of the analogous concept of operating systems based on domain and hardware configurations, with the motivation of utilizing different operating systems and addresses the problem and transferring and converting data with large scale and complex program while using shared memory and permissions identified by hardware component in the operating system to determine space and complete transmission. (Han Par. (0003-0004 and 0040-0041)) Claim(s) 8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (U.S Pub. No. 20170364475, hereinafter referred to as “Liu”) and Kumar et al. (U.S Pub. No. 20170131938, hereinafter referred to as “Kumar”) further in view of Freeman et al. (U.S Pub. No. 20190163519, hereinafter referred to as “Freeman”) In regards to Claim 8, the combination of Liu and Kumar do not explicitly teach receiving an interrupt request by the interrupt controller corresponding to each operating system domain; and controlling, based on the interrupt request, by the interrupt controller corresponding to each operating system domain, the first preset-state operating system or the second preset-state operating system in the operating system domain to execute an interrupt handler. Wherein Freeman teaches receiving an interrupt request by the interrupt controller corresponding to each operating system domain; and (Par. (0020); receiving interrupt requests from interrupt controller)) controlling, based on the interrupt request, by the interrupt controller corresponding to each operating system domain, (Par. (0020); interrupt controller controlling (selecting) interrupt request and routing based on the plurality of domains)) the first preset-state operating system or the second preset-state operating system in the operating system domain to execute an interrupt handler. (Par. (0009, 0014-0016); interrupt handle and handling of the first operating system (data processing system) of interrupt request received and handling of particular type)), (Par. (0049); first preset operating system (computer system/operating system with state information)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Freeman to utilize the above feature because of the analogous concept of operating systems based on domain and hardware configurations, with the motivation of creating priority in the operating system to increase interested core within devices to scale and increase power and routing in real-time to enhance latency and identify interruption. (Freeman Par. (0002)) In regards to Claim 16, the combination of Liu and Kumar do not explicitly teach receiving an interrupt request by the interrupt controller corresponding to each operating system domain; and controlling, based on the interrupt request, by the interrupt controller corresponding to each operating system domain, the first preset-state operating system or the second preset-state operating system in the operating system domain to execute an interrupt handler. Wherein Freeman teaches receiving an interrupt request by the interrupt controller corresponding to each operating system domain; and (Par. (0020); receiving interrupt requests from interrupt controller) controlling, based on the interrupt request, by the interrupt controller corresponding to each operating system domain, (Par. (0020); interrupt controller controlling (selecting) interrupt request and routing based on the plurality of domains)) the first preset-state operating system or the second preset-state operating system in the operating system domain to execute an interrupt handler. (Par. (0009, 0014-0016); interrupt handle and handling of the first operating system (data processing system) of interrupt request received and handling of particular type)), (Par. (0049); first preset operating system (computer system/operating system with state information)) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liu and Kumar to incorporate the teaching of Freeman to utilize the above feature because of the analogous concept of operating systems based on domain and hardware configurations, with the motivation of creating priority in the operating system to increase interested core within devices to scale and increase power and routing in real-time to enhance latency and identify interruption. (Freeman Par. (0002)) Relevant Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sayyed; Ibrahim (U.S Pub. No. 20240028739 ) “PRE-OPERATING SYSTEM EMBEDDED CONTROLLER HARDENING BASED ON OPERATING SYSTEM SECURITY AWARENESS”. Considered this reference because it addressed detection of various operating systems and secure monitoring of resources. Dorris; Roderick Lee (U.S Pub. No. 20240020379) “System On Chip With Pre-Exemption Interrupts For Partition Execution Control”. Considered this application because it relates to domain of operating systems and interrupt handlers and interrupt requests. Areno; Matthew C. (U.S Pub. No. 20200082091) “TRUSTED BOOTING BY HARDWARE ROOT OF TRUST (HROT) DEVICE”. Considered this application because it addressed operating system and security monitoring. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HASSAN A HUSSEIN whose telephone number is (571)272-3554. The examiner can normally be reached on 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eleni Shiferaw can be reached on (571)272-3867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HASSAN A HUSSEIN/ Examiner, Art Unit 2497
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Prosecution Timeline

Jun 11, 2025
Application Filed
Jul 20, 2026
Non-Final Rejection mailed — §103 (current)

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