Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With respect to claims 1-5, 7 and 10-11, the above claims recite at least one of the limitations of “a first square wave circuit” and “a second square wave circuit”. However, such limitations cannot be understood since the original specification and/or drawings do not disclose the use of “square wave” circuitry. As can be seen the circuitry of the original drawings and specification are drawn to “rectangular” wave circuits and not “square” wave circuits. Furthermore no square waveform is disclosed in Figs. 4-6C. Therefore it cannot be understood if the recitation of “square” wave is intended to refer to a “rectangular” wave, since no “square” wave generation circuit is disclosed in the original disclosure.
Claims 2-9 are rejected for at least being dependent upon claim 1 and/or including the claimed “square wave” circuits.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2 and 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (USPN 10,516,388).
With respect to claim 1, Kim et al. discloses, in Figs. 1-2, 21 and 22, a non-sinusoidal signal generation apparatus (one of Figs. 21 and 22, wherein the details of the pulse circuit and slope circuit of Figs. 21 and 22 are disclosed in Figs. 1 and 2, see Col. 16 lines 21-26) comprising:
a first square wave circuit (the positive amplitude square wave generating circuitry, see V1, SW1, Di1 and SW2 of Fig. 2, of each of the pulse generators 410a and 411a of Fig. 21; Alternatively, the positive amplitude square wave generating circuitry, see V1, SW1, Di1 and SW2 of Fig. 2, of each of the pulse generators 510a and 511a of Fig. 22), which can apply, to an output terminal (Vout), two positive voltages (i.e., positive voltage according to V1 of Fig. 2 within 410a of Fig. 21 and positive voltage according to V1 of Fig. 2 within 411a of Fig. 21; Alternatively, positive voltage according to V1 of Fig. 2 within 510a of Fig. 22 and positive voltage according to V1 of Fig. 2 within 511a of Fig. 22);
a second square wave circuit (the negative amplitude square wave generating circuitry, see V2, SW3, Di2 and SW4 of Fig. 2, of each of the pulse generators 410a and 411a of Fig. 21; Alternatively, the negative amplitude square wave generating circuitry, see V3, SW3, Di3 and SW4 of Fig. 2, of each of the pulse generators 510a and 511a of Fig. 22) which can apply, to the output terminal, two negative voltages having different magnitudes (i.e., negative voltage according to V2 of Fig. 2 within 410a of Fig. 21 and negative voltage according to V2 of Fig. 2 within 411a of Fig. 21; Alternatively, negative voltage according to V2 of Fig. 2 within 510a of Fig. 22 and negative voltage according to V2 of Fig. 2 within 511a of Fig. 22); and
a sawtooth wave circuit (410b, see 110b of Fig. 2; Alternatively each 510b-510+N-1b of Fig. 22, see 110b of Fig. 2), which can apply, to the output terminal, two sawtooth wave voltages (e.g., sawtooth voltage output from 510b and sawtooth voltage output from 511b), wherein the sawtooth wave circuit includes an inductor for drawing current from a capacitive load connected to the output terminal (at least one L of 110b of Fig. 2 within at least one of 510b and 511b to pull current from capacitive load CB/chamber).
With respect to claim 1, Kim et al. fails to explicitly disclose, in Figs. 21 and 22, that the amplitude generated from the first square wave generators (410a/510a) generate/have voltage sources that are different than that of the second/additional square wave generators of (411/511a). Kim et al. additionally fails to disclose that the that the amplitude generated from the first sawtooth wave generators (510b) generate/have voltage sources that are different than that of the second/additional sawtooth wave generator (511b). Thus, Kim fails to disclose that the first and second the ”two positive voltages having different magnitudes”, the “two negative voltages having different magnitudes” and the “two sawtooth wave voltages having different magnitudes”.
However, Kim suggests providing multiple different square wave generators (e.g., 210a and 211a of Fig. 2) with different positive square wave voltage amplitudes (V1 and V4) and different negative square wave voltage amplitudes (V2 and V5). Additionally, Kim suggest providing multiple different sawtooth wave generators (e.g., 210b and 211b of Fig. 8) with different voltage level amplitudes (according to V3 and V6) for the purpose of generating an output signal with multiple different amplitudes/pulse waveforms (see Fig. 19).
It would have been obvious to one of ordinary skill in the art to provide different positive and negative voltage amplitudes in each of the square wave generators and each of the sawtooth wave generators of Figs. 21 and 22 such that the two positive voltages having different magnitudes, the two negative voltages having different magnitudes and the two sawtooth wave voltages having different magnitudes, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). One would have been motivated to do so to for the purpose of generating a pulsed output that is capable providing different pulse shapes and pulse amplitudes.
With respect to claim 2, the non-sinusoidal signal generation apparatus of The non-sinusoidal signal generation apparatus of wherein the first square wave circuit comprises a first voltage source circuit (e.g., V1 with SW1 of Fig. 2 within 510a of Fig. 22) and a second voltage source circuit connected in parallel (e.g., V1 with SW1 of Fig. 2, as modified above to be a different magnitude, within 511a of Fig. 22), each of which generates two positive voltages having different magnitudes (as modified above the magnitudes are different), by connecting a negative terminal to a reference terminal (negative terminal of each V1 to ground), wherein the first voltage source circuit comprises a first voltage source and a first switch connected in series (V1 with SW1 of Fig. 2 within 510a of Fig. 22), and the second voltage source circuit comprises a second voltage source and a second switch connected in series (V1 as modified to be different with SW1 of Fig. 2 within 511a of Fig. 22),
wherein the second square wave circuit comprises a third voltage source circuit (V2 with SW3 of Fig. 2 within 510a of Fig. 22) and a fourth voltage source circuit (V2, modified to be a different amplitude, with SW2 of Fig. 2 within Fig. 11a of Fig. 22), each of which generates two negative voltages having different magnitudes (as modified above the magnitudes are different), by connecting a positive terminal to the reference terminal (positive terminal of each V2 connected to ground), wherein the third voltage source circuit comprises a third switch and a third voltage source connected in series (SW2 with V2 of 510a Fig. 22), and wherein the fourth voltage source circuit comprises a fourth switch and a fourth voltage source connected in series (SW with V2, as modified, of 511a of Fig. 22).
With respect to claim 10, claim 10 essentially recites the method of constructing and operating the circuit as recited in claim 1. Thus, claim 10 is rejected for essentially the same reasons as claim 1.
With respect to claim 11, an apparatus for manufacturing a semiconductor device comprising a non-sinusoidal signal generation apparatus and a chamber (Figs. 23 and 24 for manufacturing the circuit of Fig. 22 further details of Fig. 22 disclosed in Fig. 2), wherein the non-sinusoidal signal generation apparatus (Fig. 22 details disclosed in Fig. 2) comprises:
a first square wave circuit (the positive amplitude square wave generating circuitry, see V1, SW1, Di1 and SW2 of Fig. 2, of each of the pulse generators 410a and 411a of Fig. 21; Alternatively, the positive amplitude square wave generating circuitry, see V1, SW1, Di1 and SW2 of Fig. 2, of each of the pulse generators 510a and 511a of Fig. 22), which can apply, to an output terminal (Vout), two positive voltages (i.e., positive voltage according to V1 of Fig. 2 within 410a of Fig. 21 and positive voltage according to V1 of Fig. 2 within 411a of Fig. 21; Alternatively, positive voltage according to V1 of Fig. 2 within 510a of Fig. 22 and positive voltage according to V1 of Fig. 2 within 511a of Fig. 22);
a second square wave circuit (the negative amplitude square wave generating circuitry, see V2, SW3, Di2 and SW4 of Fig. 2, of each of the pulse generators 410a and 411a of Fig. 21; Alternatively, the negative amplitude square wave generating circuitry, see V3, SW3, Di3 and SW4 of Fig. 2, of each of the pulse generators 510a and 511a of Fig. 22) which can apply, to the output terminal, two negative voltages having different magnitudes (i.e., negative voltage according to V2 of Fig. 2 within 410a of Fig. 21 and negative voltage according to V2 of Fig. 2 within 411a of Fig. 21; Alternatively, negative voltage according to V2 of Fig. 2 within 510a of Fig. 22 and negative voltage according to V2 of Fig. 2 within 511a of Fig. 22); and
a sawtooth wave circuit (410b, see 110b of Fig. 2; Alternatively each 510b-510+N-1b of Fig. 22, see 110b of Fig. 2), which can apply, to the output terminal, two sawtooth wave voltages (e.g., sawtooth voltage output from 510b and sawtooth voltage output from 511b), wherein the sawtooth wave circuit includes an inductor for drawing current from a capacitive load connected to the output terminal (at least one L of 110b of Fig. 2 within at least one of 510b and 511b to pull current from capacitive load CB/chamber).
Allowable Subject Matter
Claims 3-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/THOMAS J. HILTUNEN/ Primary Examiner, Art Unit 2836
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