Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1- 20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims of U.S. Patent No. 12.361.868 as shown in the chart below. Although the claims at issue are not identical, they are not patentably distinct from each other because they are covering essentially the same subject matter. This is a provisional nonstatutory double patenting rejection.
Instant application (19/236.228) claim
US Patent 12.361.868 claim
1
1 and 5
2
1 and 2
3
3
4
4
5
5
6
6
7
7
8
8
9
9 and 13
10
9 and 10
11
11
12
12
13
13
14
14
15
15
16
16 and 20
17
16 and 17
18
18
19
19
20
20
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
a panel driver configured to control…
timing controllers configured to identify…
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. The panel driver is described at [0059] as an integrated circuit; and the timing controllers at [0064] are described as field programmable gate arrays or application specific integrated circuits.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 8-12, and 16-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ahn (US 2021.0326092).
Regarding claim 1, Ahn disclose:
An electronic device comprising: a display panel comprising a plurality of regions; a panel driver comprising a plurality of driver circuits, wherein the panel driver is configured to control driving of the display panel; a plurality of timing controllers, wherein each timing controller of the plurality of timing controllers comprises two ports disposed in opposite directions, the plurality of timing controllers are connected to each other through the respective two ports, and each timing controller of the plurality of timing controllers corresponds to a region of the plurality of regions (see Fig. 1c, 4-5; [0064, 0083, 0089, 0116]; display 1000 with a plrual8ity of regions 100; each display panel to include a driver circuit 140 to control driving; plurality of timing controllers 140 with two ports 110/111 and 120/121; in opposite directions connected thereto)
memory storing instructions; and at least one processor configured to execute one or more of the instructions, wherein the one or more of the instructions, when executed by the at least one processor, cause the at least one processor to transmit a first signal in a first direction through the plurality of timing controllers (see [0086, 0145-0149])
wherein the first signal comprises image data and a control instruction for transmitting the image data in the first direction, wherein the plurality of timing controllers are configured to execute one or more of the instructions (see Fig. 2, 4-5; [0079, 0080, 0116]; processor 30-1 to transmit first signal from 30 with image data and control data (e.g., first direction))
wherein the one or more of the instructions, when executed by the plurality of timing controllers, cause the plurality of timing controllers to: based on receiving the first signal, identify an input/output direction of each of the two ports of each timing controller of the plurality of timing controllers corresponding to the first direction; configure the input/output direction of each of the two ports of each timing controller of the plurality of timing controllers to correspond to the identified input/output directions; transmit the first signal in the first direction through the two ports of each timing controller of the plurality of timing controllers (see Fig. 1c, 2, 4-5; [0096]; first signal (first logic parameter) to identify the input/output direction of each portion 110/111 and 120/121 such that each port corresponds to the direction as dictated by 140 and transmit the signal accordingly)
transmit a state signal corresponding to a state of the display panel based on whether at least one of the plurality of timing controllers receives the first signal within a predetermined threshold time (see Fig. 2, 4-5; [0120]; where when a signal is not identified within a predetermined time threshold (period) the execution of a second operation (e.g., ‘the state’ of the display panel) is done in response)
Regarding claim 2, the rejection of claim 1 is incorporated herein. Ahn further disclose:
a first processor and a second processor, wherein the one or more of the instructions, when executed by the first processor, cause the first processor to transmit the first signal, wherein the one or more of the instructions, when executed by the second processor, cause the second processor to transmit a second signal in a second direction opposite to the first direction through the plurality of timing controllers, wherein the second signal comprises the image data and a control instruction for transmitting the image data in the second direction (see Fig. 2, 5; [0069, 0079, 0090, 0118-0119]; first processor 30-1 to transmit first signal; second processor 30-2 to transmit second signal in opposite direction from the first, through timing controllers 140; where second signal comprises image data and control instructions).
wherein the one or more of the instructions, when executed by the plurality of timing controllers, further cause the plurality of timing controllers to, based on receiving the first signal from the first processor, not transmit the second signal in the second direction while the first signal is transmitted in the first direction (see Fig. 2, 4-5; [0120]; where either the first or second signal is transmitted one at a time)
Regarding claim 3, the rejection of claim 2 is incorporated herein. Ahn further disclose:
a first timing controller directly connected to the first processor, a second timing controller directly connected to the first timing controller, a third timing controller directly connected to the second timing controller, and a fourth timing controller directly connected to the second processor, wherein the first direction is a transmission direction of the first signal from the first timing controller to the fourth timing controller, and wherein the second direction is a transmission direction of the second signal from the fourth timing controller to the first timing controller (see Fig. 2; [0067]; direct connection between timing controllers and processors where first and second directions are transmitted in opposite order)
Regarding claim 4, the rejection of claim 3 is incorporated herein. Ahn further disclose:
wherein the two ports of the first timing controller comprise a first port directly connected to the first processor and a second port directly connected to the second timing controller, and wherein the one or more of the instructions, when executed by the first timing controller, cause the first timing controller to, based on receiving the first signal, identify the first port as an input port and the second port as an output port (see Fig. 5; [0117-0120]; direct port connections connected based on input/output).
Regarding claim 8, the rejection of claim 1 is incorporated herein. Ahn disclose:
the plurality of timing controllers are connected to each other in a daisy chain manner through the two ports included in each timing controller of the plurality of timing controllers (see Fig. 2, 5, 6; daisy chain connection of ports).
Regarding claims 9-12 and 16-19, claims 9-12 and 16-19 are rejected under the same rationale as claims 1-4 and 1-4, respectively.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 5-6, 13-14, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ahn in view of Kim (US 2018.0165051).
Regarding claim 5, the rejection of claim 4 is incorporated herein. Ahn further disclose:
based on not receiving the first signal within the predetermined threshold time, receive the second signal, identify the input/output direction of each of the two ports of the fourth timing controller corresponding to the second direction, configure the input/output direction of each of the two ports of the fourth timing controller to correspond to the identified input/output directions of the two ports of the fourth timing controller, and transmit the second signal in the second direction through the two ports of the fourth timing controller (see [0120])
Ahn is not explicit as to, but Kim disclose:
based on receiving the first signal within the predetermined threshold time, transmit in the second direction the state signal related to the state of the display panel (see [0059-0060]; where image data received, but with error; a feedback signal identifying ‘the state’ of the display panel is sent back (e.g., in second direction) to inform of error).
Therefore, prior to the effective filing date of applicant’s invention, it would have been obvious to one of ordinary skill in the art, to combine the known techniques of Kim to that of Ahn, to predictably allow for retransmission of image data in case of a detected error ([0060]).
Regarding claim 6, the rejection of claim 5 is incorporated herein. While Kim further disclose:
the one or more of the instructions, when executed by the plurality of timing controllers, further cause the plurality of timing controllers to, based on one or more timing controllers of the plurality of timing controllers not receiving the first signal within the predetermined threshold time: identify, among the one or more timing controllers not receiving the first signal within the predetermined threshold time, a boundary timing controller that is closest to the first timing controller in the first direction; identify a timing controller among the plurality of timing controllers that is directly connected to the boundary timing controller in the second direction; control the boundary timing controller to transmit the state signal in the first direction; and control the timing controller directly connected to the boundary timing controller in the second direction to transmit the state signal in the second direction (see [0059-0060]; where image data received, but with error; a feedback signal identifying ‘the state’ of the display panel is sent back (e.g., in second direction) to inform of error; where feedback to controllers/processors in both directions would have been obvious to try by one of ordinary skill in the art at the time of applicant’s filing, since there are a finite number of identified, predictable potential solutions (e.g., identifying and alerting processors in both directions of display errors to prevent image display disruptions) to be pursued by one of ordinary skill in the art with a reasonable expectation of success).
Regarding claims 13-14 and 20, claims 13-14 and 20 are rejected under the same rationale as claims 5-6 and 5, respectively.
Claim(s) 7 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ahn in view of Kim (US 2018.0165051).
Regarding claim 7, the rejection of claim 1 is incorporated herein. While Ahn disclose:based on identifying the input/output direction of each of the two ports of each timing controller of the plurality of timing controllers corresponding to the first direction, store information on the identified input/output directions in the memory (see [0086, 0096]; memory used to store image data including directional input/output data).
Ahn is not explicit as to, “based on the display panel being activated after being deactivated, identify the input/output direction corresponding to the first direction of each of the two ports of each timing controller of the plurality of timing controllers based on the information on the identified input/output directions stored in the memory” but in light of [0086] disclosure and in the situation the display was powered on and off (e.g., deactivated) the directional control data stored in non-volatile memory may be accessed and used, once being activated after being deactivated. Thus, it would have been obvious to try by one of ordinary skill in the art at the time of applicant’s filing, since there are a finite number of identified, predictable potential solutions (e.g., non-volatile memory to store device status information) to be pursued by one of ordinary skill in the art with a reasonable expectation of success
Regarding claims 15, claim 15 is rejected under the same rationale as claims, respectively.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH BUKOWSKI whose telephone number is (571)270-7913. The examiner can normally be reached Monday - Friday // 0730-1530.
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/kenneth bukowski/Primary Examiner, Art Unit 2621