DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 7, 9, 13, 15, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (USPN 2022/0301498 A1) in view of Li et al. (US 2022/0415964 A1), further in view of Yeh et al. (USPN 2021/0043129 A1).
As to claim 1, Park teaches a light-emitting module, comprising:
N×M pixel modules arranged in a two-dimensional array wherein N and M are positive integers greater than or equal to 2 (see at least figs. 2, 5: each micro pixel controller 130 together with the plurality of pixels P controlled by that controller corresponds to one pixel module and at least two controller and pixel groupings in both the row and column directions corresponds to N×M arrangement of pixel modules, where N and M are each at least two; and [0061] “the display module 10 may include pixels in an M×N (M and N are integers of 2 or more) array, that is, a plurality of pixels arranged two dimensionally”; [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated”);
wherein each of the pixel modules comprises a plurality of pixels and a driving circuit for controlling the plurality of pixels (see at least fig. 5 and [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated” – note micro pixel controller 130 and its pixel circuits correspond to a driving circuit),
each of the pixels comprises a plurality of light-emitting diodes (see at least figs. 2, 5 and [0063] “The pixel P may include three sub-pixels SP(R), SP(G), and SP(B)”), and
the driving circuit is configured to apply a driving current to the light-emitting diodes in the pixel module (see at least [0114] “the pixel circuit 131P may output a driving current ID for driving the inorganic light-emitting element 120.”, [0123] “The display module 10 according to one embodiment may control the inorganic light-emitting element 120 by combining pulse amplitude modulation (PAM) control for controlling the amplitude of the driving current and pulse width modulation (PWM) control for controlling a pulse width of the driving current.”).
Park does not directly teach wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2, and the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period; and wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Li teaches wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2 (see at least figs. 5 and 6A; [0047] “Each pixel group 40 has K pixel areas 50 arranged adjacent to each other. Each pixel area 50 has J micro-LEDs with different colored lights for displaying different image colors” – note Li’s K pixel areas 50 corresponds to claimed J pixel blocks), and
the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period (see at least figs. 5, 6A-B, [0046] “The driving circuit 30 is electrically connected to the pixel groups 40 to drive the pixel groups 40”; [0048] “The driving circuit 30 has a scan module 31 and a data module 32”; [0049] “In the first driving mode, with further reference to FIG. 6B, the driving circuit 30 sequentially outputs N*K scanning signals S11 to Sn4 to the N*K rows of pixel areas 50 in one frame period through the scan module 31 to sequentially enable the N*K rows of pixel areas 50.”; [0050] “the K scanning signals are respectively outputted to the K pixel area 50 at different times in the first driving mode” – note a plurality of separately addressable pixel areas corresponds to the claimed pixel blocks, that are sequentially enabled at different respective times within a frame period. Li’s sequential activation at different times corresponds to the claimed time-sharing manner).
It would have been obvious to a person having ordinary skill in the art before the effective filing date to apply Li’s known sequential driving technique to Park’s known multi-pixel driving arrangement in order to increase displayed image resolution (see Li [0038], [0041], and [0049]–[0050]). Further, Park teaches that one micro pixel controller 130 controls a plurality of pixels P, with Fig. 5 illustrating four pixels arranged around and controlled by the controller (see Park [0094]). Li teaches organizing display pixels into separately addressable portions or rows and sequentially enabling those portions at different times within one frame period (see Li [0047] and [0049]–[0050]). In the combination, the plurality of pixels controlled by one of Park’s micro pixel controllers is organized into J separately driven pixel groups or blocks, with each block containing pixels controlled by that controller, and those blocks are sequentially enabled at different times according to Li’s driving technique. Thus, the claimed pixel blocks are formed from Park’s plurality of locally controlled pixels, while Li supplies the sequential time-sharing operation of those blocks.
Li does not directly teach wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Yeh teaches wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current (see at least [0003] “control the drive current to an average value (hereinafter referred to as “average current”) so that the average current corresponds to the expected brightness, … and to control the expected brightness by controlling the duty cycle of the LED during the driving period.”; [0005] “in one display period, the N rows of LEDs are sequentially driven, so the driving time of the LEDs of each row will be only one-N of the display period. .. Since the driving time of the LED is short, the pulse current signal must be increased in order to generate sufficient brightness.” – note Yeh’s N sequentially driven rows correspond to the claimed J sequentially driven pixel blocks, therefore, Yeh teaches a working interval having a duty cycle of 1/J; and [0036] “the processing circuit 220 determines that the average current corresponding to the frame display signal Sd is 40 microamperes (2 mA is divided by 50). Then, the processing circuit 220 calculates that the driving duty cycle is 80% (because) according to the preset driving current value (for example, 50 uA, and 50×0.8=40).” - note this is average current = driving current x duty cycle. Therefore, driving current = J x average current).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to apply Yeh’s duty cycle/current relationship to the sequentially driven pixel blocks of Park and Li in order to maintain the intended average current and brightness when each block is driven for 1/J of the period. Yeh teaches increasing the pulse current when sequential driving shortens the driving time ([0005]) and that average current equals driving current multiplied by duty cycle ([0036]). Therefore, at a duty cycle of 1/J, the driving current would predictably be J times the average driving current. Further, in the combination, the number of sequentially driven pixel blocks established according to Li is J. Yeh’s N sequentially driven rows correspond to those J pixel blocks. The letters used by the references are variable designations. When the J blocks are sequentially assigned equal respective working intervals within the time period, each block has a duty cycle of 1/J. Applying Yeh’s disclosed relationship that average current equals driving current multiplied by duty cycle then gives a driving current of J times the average driving current. Therefore, the same number J identifies the number of blocks, the sequential working intervals, the 1/J duty cycle, and the resulting J-times driving current.
As to claim 7, Park teaches a display device, comprising: a light-emitting module, comprising:
N×M pixel modules arranged in a two-dimensional array wherein N and M are positive integers greater than or equal to 2 (see at least figs. 2, 5: each micro pixel controller 130 together with the plurality of pixels P controlled by that controller corresponds to one pixel module and at least two controller and pixel groupings in both the row and column directions corresponds to N×M arrangement of pixel modules, where N and M are each at least two; and [0061] “the display module 10 may include pixels in an M×N (M and N are integers of 2 or more) array, that is, a plurality of pixels arranged two dimensionally”; [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated”);
wherein each of the pixel modules comprises a plurality of pixels and a driving circuit for controlling the plurality of pixels (see at least fig. 5 and [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated” – note micro pixel controller 130 and its pixel circuits correspond to a driving circuit),
each of the pixels comprises a plurality of light-emitting diodes (see at least figs. 2, 5 and [0063] “The pixel P may include three sub-pixels SP(R), SP(G), and SP(B)”), and
the driving circuit is configured to apply a driving current to the light-emitting diodes in the pixel module (see at least [0114] “the pixel circuit 131P may output a driving current ID for driving the inorganic light-emitting element 120.”, [0123] “The display module 10 according to one embodiment may control the inorganic light-emitting element 120 by combining pulse amplitude modulation (PAM) control for controlling the amplitude of the driving current and pulse width modulation (PWM) control for controlling a pulse width of the driving current.”); and
a timing controller configured to generate a timing signal and a data signal to drive one of the pixel modules (see at least figs. 3-4: driver IC 200, main controller 300, timing controller 500, and [0082] “The image data and the control signal output from the main controller 300 may be transmitted to the timing controller 500.”).
Park does not directly teach wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2, and the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period; and wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Li teaches wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2 (see at least figs. 5 and 6A; [0047] “Each pixel group 40 has K pixel areas 50 arranged adjacent to each other. Each pixel area 50 has J micro-LEDs with different colored lights for displaying different image colors” – note Li’s K pixel areas 50 corresponds to claimed J pixel blocks), and
the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period (see at least figs. 5, 6A-B, [0046] “The driving circuit 30 is electrically connected to the pixel groups 40 to drive the pixel groups 40”; [0048] “The driving circuit 30 has a scan module 31 and a data module 32”; [0049] “In the first driving mode, with further reference to FIG. 6B, the driving circuit 30 sequentially outputs N*K scanning signals S11 to Sn4 to the N*K rows of pixel areas 50 in one frame period through the scan module 31 to sequentially enable the N*K rows of pixel areas 50.”; [0050] “the K scanning signals are respectively outputted to the K pixel area 50 at different times in the first driving mode” – note a plurality of separately addressable pixel areas corresponds to the claimed pixel blocks, that are sequentially enabled at different respective times within a frame period. Li’s sequential activation at different times corresponds to the claimed time-sharing manner).
It would have been obvious to a person having ordinary skill in the art before the effective filing date to apply Li’s known sequential driving technique to Park’s known multi-pixel driving arrangement in order to increase displayed image resolution (see Li [0038], [0041], and [0049]–[0050]). Further, Park teaches that one micro pixel controller 130 controls a plurality of pixels P, with Fig. 5 illustrating four pixels arranged around and controlled by the controller (see Park [0094]). Li teaches organizing display pixels into separately addressable portions or rows and sequentially enabling those portions at different times within one frame period (see Li [0047] and [0049]–[0050]). In the combination, the plurality of pixels controlled by one of Park’s micro pixel controllers is organized into J separately driven pixel groups or blocks, with each block containing pixels controlled by that controller, and those blocks are sequentially enabled at different times according to Li’s driving technique. Thus, the claimed pixel blocks are formed from Park’s plurality of locally controlled pixels, while Li supplies the sequential time-sharing operation of those blocks.
Li does not directly teach wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Yeh teaches wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current (see at least [0003] “control the drive current to an average value (hereinafter referred to as “average current”) so that the average current corresponds to the expected brightness, … and to control the expected brightness by controlling the duty cycle of the LED during the driving period.”; [0005] “in one display period, the N rows of LEDs are sequentially driven, so the driving time of the LEDs of each row will be only one-N of the display period. .. Since the driving time of the LED is short, the pulse current signal must be increased in order to generate sufficient brightness.” – note Yeh’s N sequentially driven rows correspond to the claimed J sequentially driven pixel blocks, therefore, Yeh teaches a working interval having a duty cycle of 1/J; and [0036] “the processing circuit 220 determines that the average current corresponding to the frame display signal Sd is 40 microamperes (2 mA is divided by 50). Then, the processing circuit 220 calculates that the driving duty cycle is 80% (because) according to the preset driving current value (for example, 50 uA, and 50×0.8=40).” - note this is average current = driving current x duty cycle. Therefore, driving current = J x average current).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to apply Yeh’s duty cycle/current relationship to the sequentially driven pixel blocks of Park and Li in order to maintain the intended average current and brightness when each block is driven for 1/J of the period. Yeh teaches increasing the pulse current when sequential driving shortens the driving time ([0005]) and that average current equals driving current multiplied by duty cycle ([0036]). Therefore, at a duty cycle of 1/J, the driving current would predictably be J times the average driving current. Further, in the combination, the number of sequentially driven pixel blocks established according to Li is J. Yeh’s N sequentially driven rows correspond to those J pixel blocks. The letters used by the references are variable designations. When the J blocks are sequentially assigned equal respective working intervals within the time period, each block has a duty cycle of 1/J. Applying Yeh’s disclosed relationship that average current equals driving current multiplied by duty cycle then gives a driving current of J times the average driving current. Therefore, the same number J identifies the number of blocks, the sequential working intervals, the 1/J duty cycle, and the resulting J-times driving current.
As to claim 15, Park teaches a driving method for a display device, comprising:
generating a timing signal and a data signal to a driven one of the N×M pixel modules in a two-dimensional array by a timing controller (see at least figs. 2-5: each micro pixel controller 130 together with the plurality of pixels P controlled by that controller corresponds to one pixel module and at least two controller and pixel groupings in both the row and column directions corresponds to N×M arrangement of pixel modules, [0061] “the display module 10 may include pixels in an M×N (M and N are integers of 2 or more) array, that is, a plurality of pixels arranged two dimensionally”, and [0082] “The image data and the control signal output from the main controller 300 may be transmitted to the timing controller 500.”; [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated”);
wherein each of the pixel modules comprises a plurality of pixels and a driving circuit for controlling the plurality of pixels (see at least fig. 5 and [0094] “One micro pixel controller 130 may control two or more pixels P, .. a case in which one micro pixel controller 130 controls four pixels P is illustrated” – note micro pixel controller 130 and its pixel circuits correspond to a driving circuit),
each of the pixels comprises a plurality of light-emitting diodes (see at least figs. 2, 5 and [0063] “The pixel P may include three sub-pixels SP(R), SP(G), and SP(B)”), and
the driving circuit is configured to apply a driving current to the light-emitting diodes in the pixel module, and N and M are positive integers greater than or equal to 2, and applying a driving current to the light-emitting diodes in the corresponding pixel module by the driven one of the driving circuit (see at least figs. 2-5: each micro pixel controller 130 together with the plurality of pixels P controlled by that controller corresponds to one pixel module and at least two controller and pixel groupings in both the row and column directions corresponds to N×M arrangement of pixel modules, where N and M are each at least two; [0061] “the display module 10 may include pixels in an M×N (M and N are integers of 2 or more) array, that is, a plurality of pixels arranged two dimensionally”, [0114] “the pixel circuit 131P may output a driving current ID for driving the inorganic light-emitting element 120.”, [0123] “The display module 10 according to one embodiment may control the inorganic light-emitting element 120 by combining pulse amplitude modulation (PAM) control for controlling the amplitude of the driving current and pulse width modulation (PWM) control for controlling a pulse width of the driving current.”).
Park does not directly teach wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2, and the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period; and applying a driving current to the light-emitting diodes in the corresponding pixel module by the driven one of the driving circuit, wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Li teaches wherein, in one of the pixel modules, the plurality of pixels is divided into J pixel blocks, J is a positive integer equal to or greater than 2 (see at least figs. 5 and 6A; [0047] “Each pixel group 40 has K pixel areas 50 arranged adjacent to each other. Each pixel area 50 has J micro-LEDs with different colored lights for displaying different image colors” – note Li’s K pixel areas 50 corresponds to claimed J pixel blocks), and
the driving circuit is configured to sequentially drive the J pixel blocks in a time-sharing manner such that each of the J pixel blocks is driven at a different timing within a time period (see at least figs. 5, 6A-B, [0046] “The driving circuit 30 is electrically connected to the pixel groups 40 to drive the pixel groups 40”; [0048] “The driving circuit 30 has a scan module 31 and a data module 32”; [0049] “In the first driving mode, with further reference to FIG. 6B, the driving circuit 30 sequentially outputs N*K scanning signals S11 to Sn4 to the N*K rows of pixel areas 50 in one frame period through the scan module 31 to sequentially enable the N*K rows of pixel areas 50.”; [0050] “the K scanning signals are respectively outputted to the K pixel area 50 at different times in the first driving mode” – note a plurality of separately addressable pixel areas corresponds to the claimed pixel blocks, that are sequentially enabled at different respective times within a frame period. Li’s sequential activation at different times corresponds to the claimed time-sharing manner).
It would have been obvious to a person having ordinary skill in the art before the effective filing date to apply Li’s known sequential driving technique to Park’s known multi-pixel driving arrangement in order to increase displayed image resolution (see Li [0038], [0041], and [0049]–[0050]). Further, Park teaches that one micro pixel controller 130 controls a plurality of pixels P, with Fig. 5 illustrating four pixels arranged around and controlled by the controller (see Park [0094]). Li teaches organizing display pixels into separately addressable portions or rows and sequentially enabling those portions at different times within one frame period (see Li [0047] and [0049]–[0050]). In the combination, the plurality of pixels controlled by one of Park’s micro pixel controllers is organized into J separately driven pixel groups or blocks, with each block containing pixels controlled by that controller, and those blocks are sequentially enabled at different times according to Li’s driving technique. Thus, the claimed pixel blocks are formed from Park’s plurality of locally controlled pixels, while Li supplies the sequential time-sharing operation of those blocks.
Li does not directly teach applying a driving current to the light-emitting diodes in the corresponding pixel module by the driven one of the driving circuit, wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current.
Yeh teaches applying a driving current to the light-emitting diodes in the corresponding pixel module by the driven one of the driving circuit, wherein in the time period, a duty cycle of a working interval of the driving current is 1/J, and in the working interval, the driving current for driving the plurality of pixels in each of the pixel blocks is J times an average driving current (see at least [0003] “control the drive current to an average value (hereinafter referred to as “average current”) so that the average current corresponds to the expected brightness, … and to control the expected brightness by controlling the duty cycle of the LED during the driving period.”; [0005] “in one display period, the N rows of LEDs are sequentially driven, so the driving time of the LEDs of each row will be only one-N of the display period. .. Since the driving time of the LED is short, the pulse current signal must be increased in order to generate sufficient brightness.” – note Yeh’s N sequentially driven rows correspond to the claimed J sequentially driven pixel blocks, therefore, Yeh teaches a working interval having a duty cycle of 1/J; and [0036] “the processing circuit 220 determines that the average current corresponding to the frame display signal Sd is 40 microamperes (2 mA is divided by 50). Then, the processing circuit 220 calculates that the driving duty cycle is 80% (because) according to the preset driving current value (for example, 50 uA, and 50×0.8=40).” - note this is average current = driving current x duty cycle. Therefore, driving current = J x average current).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to apply Yeh’s duty cycle/current relationship to the sequentially driven pixel blocks of Park and Li in order to maintain the intended average current and brightness when each block is driven for 1/J of the period. Yeh teaches increasing the pulse current when sequential driving shortens the driving time ([0005]) and that average current equals driving current multiplied by duty cycle ([0036]). Therefore, at a duty cycle of 1/J, the driving current would predictably be J times the average driving current. Further, in the combination, the number of sequentially driven pixel blocks established according to Li is J. Yeh’s N sequentially driven rows correspond to those J pixel blocks. The letters used by the references are variable designations. When the J blocks are sequentially assigned equal respective working intervals within the time period, each block has a duty cycle of 1/J. Applying Yeh’s disclosed relationship that average current equals driving current multiplied by duty cycle then gives a driving current of J times the average driving current. Therefore, the same number J identifies the number of blocks, the sequential working intervals, the 1/J duty cycle, and the resulting J-times driving current.
As to claim 3, the combination of Park, Li and Yeh teach the light-emitting module according to claim 1 (see above rejection), wherein each of the pixels comprises at least three light-emitting diodes (see Park at least [0063] “The pixel P may include three sub-pixels SP(R), SP(G), and SP(B)” and Li at least fig. 6A: 100a, 100b, 100c; [0047]).
As to claim 9, the combination of Park, Li and Yeh teach the display device according to claim 7 (see above rejection), wherein each of the pixels comprises at least three light-emitting diodes (see Park at least [0063] “The pixel P may include three sub-pixels SP(R), SP(G), and SP(B)”).
As to claim 13, the combination of Park, Li and Yeh teach the display device according to claim 7 (see above rejection), further comprising: a plurality of timing signal lines connecting the timing controller with the light-emitting module, the timing signal lines configured to transmit the timing signals to the pixel modules; and a plurality of data signal lines connecting the timing controller with the light-emitting module, the data signal lines configured to transmit the data signals to the pixel modules (see Park at least figs. 3-4, [0082] “The image data and the control signal output from the main controller 300 may be transmitted to the timing controller 500.”, [0083] “The timing controller 500 may convert the image data transmitted from the main controller 300 into image data of a format that may be processed in a driver integrated circuit (IC) 200 (FIG. 4), and generate various control signals such as a timing control signal necessary for displaying the image data on the display panel.”, [0127] “The signal supplied from the driver IC 200 may be transmitted to the micro pixel controller 130 through a side surface line or a via hole line”).
As to claim 16, the combination of Park, Li and Yeh teach the driving method for the display device according to claim 15 (see above rejection), wherein the light-emitting diodes are sub-millimeter light-emitting diodes or micro-light emitting diodes (see Park at least [0053] “a micro-LED having a short side length of about 100 μm”).
Claims 2, 8, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (USPN 2022/0301498 A1) in view of in view of Li et al. (US 2022/0415964 A1), further in view of Yeh et al. (USPN 2021/0043129 A1), and further in view of Song et al. (TW 202418262 A).
As to claim 2, the combination of Park, Li and Yeh teach the light-emitting module according to claim 1 (see above rejection).
Park, Li and Yeh do not directly teach wherein each of the pixel module further comprises: a package body packaging the light-emitting diodes of the pixels and the driving circuit.
Song teaches wherein each of the pixel module further comprises: a package body packaging the light-emitting diodes of the pixels and the driving circuit (see at least [0015] “ample space can be ensured by mounting multiple display pixels and pixel driver circuits on a single substrate and embedding the pixel driver circuits within the substrate.”, [0365] “pixel driving devices… have a pixel driving circuit MPD built into the insulation layer of the driving substrate.”, [0397]–[0398] “multiple light-emitting diodes (LEDs)… can be attached to the areas corresponding to the upper wiring.”, and [0401] “a POD (Pixels On Driver) structure can be realized in which the pixel driver circuit MPD is embedded in the display substrate and multiple light-emitting elements R, G, B are arranged on the upper part of the substrate.” – note “package body” is single substrate / POD structure).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the integrated structure of Song into the pixel modules of Park/Li with the calculations of Yeh in order to reduce wiring complexity (see Song at least [0301] “advantages such as simplified electrical wiring, improved assembly, reduced manufacturing costs, and reduced complexity.”). Such modification would have been a predictable use of prior art elements according to their established functions, namely integrating LEDs and driver circuitry into a single packaged unit.
As to claim 8, the combination of Park, Li and Yeh teach the display device according to claim 7 (see above rejection).
Park, Li and Yeh do not directly teach wherein each of the pixel module further comprises: a package body packaging the light-emitting diodes of the pixels and the driving circuit.
Song teaches wherein each of the pixel module further comprises: a package body packaging the light-emitting diodes of the pixels and the driving circuit (see at least [0015] “ample space can be ensured by mounting multiple display pixels and pixel driver circuits on a single substrate and embedding the pixel driver circuits within the substrate.”, [0365] “pixel driving devices… have a pixel driving circuit MPD built into the insulation layer of the driving substrate.”, [0397]–[0398] “multiple light-emitting diodes (LEDs)… can be attached to the areas corresponding to the upper wiring.”, and [0401] “a POD (Pixels On Driver) structure can be realized in which the pixel driver circuit MPD is embedded in the display substrate and multiple light-emitting elements R, G, B are arranged on the upper part of the substrate.” – note “package body” is single substrate / POD structure).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the integrated structure of Song into the pixel modules of Park/Li with the calculations of Yeh in order to reduce wiring complexity (see Song at least [0301] “advantages such as simplified electrical wiring, improved assembly, reduced manufacturing costs, and reduced complexity.”). Such modification would have been a predictable use of prior art elements according to their established functions, namely integrating LEDs and driver circuitry into a single packaged unit.
As to claim 14, the combination of Park, Yeh and Song teach the display device according to claim 8 (see above rejection), wherein the timing signal and the data signal from the timing controller are transmitted to the pixel module (see Park at least figs. 3-4: driver IC 200, main controller 300, timing controller 500, and [0082] “The image data and the control signal output from the main controller 300 may be transmitted to the timing controller 500.”; and Song at least [0208] “column terminals… connected to the column lines… row terminals… connected to the row lines”, [0370] “the pixel driver circuit (MPD) receives row signals by driving the modulation data of multiple light-emitting elements (R, G, B) through one electrical contact with the display substrate, and receives column signals by driving the clock signals”, [0400] “multiple solder balls or bumps can be formed on the lower surface of the display substrate”, and [0406] “input pad solder balls or bumps corresponding to the input signals can be formed on the display substrate” – note solder balls / bumps formed on lower surface are “pads on a bottom surface” and signals received via terminals and connections are signal transmission through pads).
Response to Arguments
Applicant’s arguments filed 7/24/2026 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
The rejection above does not rely on Park or Yeh to teach dividing the pixels of one pixel module into sequentially driven pixel blocks. Park teaches a micro pixel controller that controls a plurality of pixels within a local pixel-module arrangement, Li teaches organizing pixels into separately addressable portions and sequentially enabling those portions at different times within a frame period, and Yeh is relied upon for the remaining duty-cycle/current relationship. Yeh teaches that N sequentially driven LED rows each operate for 1/N of the display period and that the pulse current must be increased because of the shortened driving time ([0005]). Yeh further teaches that average current equals driving current multiplied by duty cycle ([0036]). In the combination, Yeh’s N corresponds to the J pixel blocks established according to Li. Therefore, each of the J sequentially driven blocks has a duty cycle of 1/J, and applying Yeh’s disclosed equation produces a working-interval driving current equal to J times the average driving current. The 80% example in Yeh is relied upon to establish the general current-duty equation, not as the claimed 1/J duty cycle.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER L ZUBAJLO whose telephone number is (571)270-1551. The examiner can normally be reached Monday - Thursday 10 am - 8 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KE XIAO can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JENNIFER L ZUBAJLO/ Examiner, Art Unit 2627 9/22/2026
/KE XIAO/ Supervisory Patent Examiner, Art Unit 2627
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