Prosecution Insights
Last updated: April 19, 2026
Application No. 19/237,587

DISPLAY PANEL AND DISPLAY APPARATUS

Non-Final OA §103§112
Filed
Jun 13, 2025
Examiner
NGUYEN, JENNIFER T
Art Unit
2629
Tech Center
2600 — Communications
Assignee
Tianma Advanced Display Technology Institute (Xiamen) Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
90%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
833 granted / 1022 resolved
+19.5% vs TC avg
Moderate +8% lift
Without
With
+8.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
16 currently pending
Career history
1038
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
50.6%
+10.6% vs TC avg
§102
29.9%
-10.1% vs TC avg
§112
6.3%
-33.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1022 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Should applicant desire to obtain the benefit of foreign priority under 35 U.S.C. 119(a)-(d) prior to declaration of an interference, a certified English translation of the foreign application must be submitted in reply to this action. 37 CFR 41.154(b) and 41.202(e). Failure to provide a certified translation may result in no benefit being accorded for the non-English application. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 3 recites the limitation "the q1 driving signal lines" in line 2 and "the q2 driving signal lines" in line 3. There is insufficient antecedent basis for these terms in the claim that renders the claim indefinite (Note: claim 3 currently depends on claim 1 that lacks antecedent basis, while claim 2 does possess antecedent basis for these terms). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 16 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2022/0199735) in view of Kim et al. (US 2024/0029639). Regarding claims 1 and 20, Wang discloses a display panel/apparatus (fig. 2, paras. 0081, 0328), comprising a display area (111, para. 0083) and a plurality of driving signal lines (15, paras. 0225 and 0232), wherein the display area (11) comprises a plurality of circuit regions (21, 22, figs. 2, 4C, para. 0083) and a plurality of trace regions (such as region of trace of data line 15, paras. 0225 and 0232) that are alternately arranged along a first direction (such as row direction), one (such as 22) of the plurality of circuit regions (21, 22) comprises a plurality of circuit units (such as 221A11, 221A21 and 221A12, 221A22, fig. 10A, para. 0136) arranged along a second direction (column direction), one of the plurality of circuit units comprises a pixel driving circuit (“light-emitting control driving sub-circuit”, para. 0136), and the first direction intersects with the second direction; wherein the display area further comprises a first plurality of control signal lines (13, 14, fig. 2, para. 0082) electrically connected to the pixel driving circuit; wherein at least part of the plurality of circuit regions (21, 22) comprises a driving circuit (211A), the driving circuit comprises a plurality of driving units (such as 211A1, 211A2, fig. 3A) and the driving circuit (211A) is electrically connected to one of the first plurality of control signal lines (13, paras. 0083-0085); wherein the plurality of driving signal lines (15) extends along the second direction (column direction) and is electrically connected to the driving circuit (211, para. 0099); and wherein along the first direction (row direction, fig. 4A, para. 0100), at least part of the plurality of driving signal lines (such as CB, CK, VGH of CB, CK, VGH, CB’, CK’, VGH’) electrically connected to a same driving circuit (211A) is arranged at a first side of a corresponding driving circuit (211A), and at least another part of the plurality of driving signal lines (such as CB’, CK’, VGH’ of CB, CK, VGH, CB’, CK’, VGH’) is arranged at a second side of the corresponding driving circuit (211A). Wang does not specifically disclose the driving circuit that is at least partially arranged between two adjacent circuit units in the second direction. In a similar field of endeavor of display panel, Kim discloses a driving circuit (BC, fig. 14, paras. 0087, 0089 and 0125) that is at least partially arranged between two adjacent circuit units (PC) in the second direction (column direction). Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the arrangement as taught by Kim in the system of Wang in order to reduce a disposition region of the signal lines in the transmissive part of each of the plurality of horizontal lines, thereby enhancing or increasing a total light transmission rate of the display area AA (para. 0197). Regarding claim 12, Wang further discloses the driving circuit (211A, fig. 4C, paras. 0099-0100) comprises a control module (such as 211A1) and an output module (211A2) that are arranged along the first direction (row direction), the control module (211A1) is arranged at a side of the driving circuit (211A) adjacent to the first side (such as left), and the output module (211A2) is arranged at a side of the driving circuit (211A) adjacent to the second side (such as right); and the driving signal lines comprises at least one first input signal line (such as CB, CK, VGH) electrically connected to the output module (211A1), and the at least one first input signal line (CB’, CK’, VGH’ which are out put signals of CB, CK, VGH) is arranged at a second side of the driving circuit. Regarding claim 16, Wang further discloses the plurality of driving signal lines further comprises a reset signal line (181, para. 0092), a first clock signal line (CK) and a second clock signal line (CB) that are electrically connected to the control module (211A1); and at least one of the reset signal line (181), the first clock signal line (CK) and the second clock signal line (CB) is arranged at a first side of the driving circuit (211A, fig. 4C, para. 0099). Regarding claim 19, Wang further discloses the driving signal lines comprise a third driving signal line (in 211A3, figs. 7A, 7E,) that comprises at least two third sub-driving signal lines transmitting a same signal (such as CB, CK, VGH) and arranged in different trace regions, and two adjacent third sub-driving signal lines of the at least two third sub-driving signal lines are electrically connected through a fourth sub-driving signal line (such as N1, N3); and the third sub-driving signal line extends along the second direction, and the fourth sub-driving signal line extends along the first direction (para. 0116). Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. in view of Kim et al. and further in view of In et al. (US 2023/0317003). Regarding claim 17, the combination of Wang and Kim does not specifically first electrostatic protection circuits electrically connected in one-to-one correspondence to the driving signal lines, wherein the first electrostatic protection circuits are arranged along the first direction. In a similar field of endeavor of display panel, In discloses first electrostatic protection circuits (EPC, fig. 3, para. 0080) electrically connected in one-to-one correspondence to the driving signal lines (DL1-DLm), wherein the first electrostatic protection circuits are arranged along the first direction (row direction). Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the electrostatic protection circuits as taught by In in the system of Wang and Kim in order to effectively prevent the overvoltage/overcurrent from flowing into the display panel DP (para. 0149). Allowable Subject Matter Claims 2, 4-11, 13-15 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 2 identifies the distinct limitations “the driving circuit comprises a control module and an output module that are arranged along the first direction, the control module is arranged at a side of the driving circuit adjacent to the first side, and the output module is arranged at a side of the driving circuit adjacent to the second side; the display panel comprises q1 driving signal lines arranged at the first side of a corresponding driving circuit, and q2 driving signal lines arranged at the second side of the corresponding driving circuit, where q1 < q2; and at least one of the q1 driving signal lines at the first side of the corresponding driving circuit is electrically connected to the control module, and at least one of the q2 driving signal lines at the second side of the corresponding driving circuit is electrically connected to the output module”. Claim 4 identifies the distinct limitations “the at least part of the driving signal lines at the first side of the driving circuit comprise at least two first driving signal line groups, and one of the at least two first driving signal line groups comprises at least one of the driving signal lines; and along the first direction, at least one of the plurality of circuit units is included between two adjacent first driving signal line groups; and/or the at least another part of the driving signal lines at the second side of the driving circuit comprise at least two second driving signal line groups, and one of the at least two second driving signal line groups comprises at least one of the driving signal lines; and along the first direction, at least one of the plurality of circuit units is included between two adjacent second driving signal line groups”. Claims 5-8 are objected for their dependence upon claim 4. Claim 9 identifies the distinct limitations “a first signal line extending along the first direction, wherein the first signal line and the plurality of driving signal lines transmit different signals; wherein the plurality of driving signal lines comprises at least one through hole, and the at least one through hole at least partially overlaps the first signal line along a direction perpendicular to a plane of the display panel; wherein the plurality of driving signal lines comprises a first driving signal line and a second driving signal line, and a line width of the first driving signal line is greater than a line width of the second driving signal line; and wherein an area of the at least one through hole in the first driving signal line is greater than an arca of the through hole in the second driving signal line”. Claim 10 is objected for its dependence upon claim 9. Claim 11 identifies the distinct limitations “the plurality of circuit units comprises at least a first circuit unit and a second circuit unit arranged along the first direction; the driving circuit comprises a first portion and a second portion arranged along the first direction; the first portion corresponds to the first circuit unit, and the second portion corresponds to the second circuit unit; and the driving signal lines further comprise a third driving signal line group arranged between the first portion and the second portion”. Claim 13 identifies the distinct limitations “the driving signal lines comprises at least two first input signal lines; and the driving circuit comprises at least two driving sub-circuits, one of the at least two driving sub-circuits comprises the driving units, the driving units in a same driving sub-circuit are electrically connected to a same first input signal line, and the driving units in different driving sub-circuits are electrically connected to different first input signal lines”. Claim 14 is objected for their dependence upon claim 13. Claim 15 identifies the distinct limitations “the pixel driving circuit comprises a pulse width modulation module that outputs a pulse width setting signal based on a sweep frequency driving signal, to control a light-emitting duration of a light-emitting element; and the first input signal line transmits a sweep frequency input signal, the first control signal comprises the sweep frequency driving signal, and the sweep frequency input signal comprises a ramp signal; or the pixel driving circuit comprises a pulse amplitude light-emitting control module, the driving circuit provides a pulse amplitude light-emitting control signal to the pulse amplitude light-emitting control module, the first input signal line transmits a pulse amplitude light-emitting control input signal, the first control signal comprises the pulse amplitude light-emitting control signal, and the pulse amplitude light-emitting control input signal comprises a square wave signal”. Claim 18 identifies the distinct limitations “the electrostatic protection circuits further at least comprise a second electrostatic protection circuit, and in the second electrostatic protection circuit, a second electrode of a first electrostatic protection transistor, a gate of a second electrostatic protection transistor and a first electrode of a second electrostatic protection transistor are all electrically connected to an output end of driving units of a last stage; and the first electrostatic protection circuit and the second electrostatic protection circuit are arranged along the first direction”. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kim et al. (US 2023/0117897) disclose the first driving circuit 110-1 and the second driving circuit 110-2 are arranged on the driving circuit layer 110 of the display module 100 (fig. 3B, para. 0078). Xue et al. (US 2022/0399378) disclose N main signal sub-lines in the at least two main signal sub-lines are directly electrically coupled to the driving circuit, and configured to provide the signal to the driving circuit (fig. 9, para. 0003). Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER T NGUYEN whose telephone number is (571)272-7696. The examiner can normally be reached Mon-Fri 7:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C Lee can be reached at 5712722963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JENNIFER T NGUYEN/Primary Examiner, Art Unit 2629
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Prosecution Timeline

Jun 13, 2025
Application Filed
Feb 06, 2026
Non-Final Rejection — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
90%
With Interview (+8.0%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 1022 resolved cases by this examiner. Grant probability derived from career allow rate.

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