Prosecution Insights
Last updated: October 26, 2026
Application No. 19/238,005

INFORMATION PROCESSING SYSTEM HAVING IMPROVED COMPUTATIONAL THROUGHPUT OF PROCESSING IN MEMORY BY MAXIMIZING MEMORY BANDWIDTH IN A MULTI-CHANNEL MEMORY THAT SUPPORTS A MEMORY BUS INTERFACE HAVING LIMITED BANDWIDTH

Non-Final OA §112
Filed
Jun 13, 2025
Priority
Apr 07, 2025 — RE 10-2025-0044771
Examiner
BELKHAYAT, ZAKARIA MOHAMMED
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Korea University Research and Business Foundation
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
23 granted / 27 resolved
+30.2% vs TC avg
Strong +28% interview lift
Without
With
+27.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
13 currently pending
Career history
53
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
68.2%
+28.2% vs TC avg
§102
14.1%
-25.9% vs TC avg
§112
12.9%
-27.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 27 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on June 13, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-14 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the plurality of memory controllers" in line 10. There is insufficient antecedent basis for this limitation in the claim. Claim 3 recites the limitation "the CL packet per channel" in lines 6-7. There is insufficient antecedent basis for this limitation in the claim. Claim 10 recites the limitation "the respective channel" in lines 10-11. There is insufficient antecedent basis for this limitation in the claim. Claim 11 recites the limitation “its output terminal” in lines 3-4. There is insufficient antecedent basis for this limitation in the claim. Applicant is suggested to amend “its output terminal” to read “an output terminal of the channel buffer” or similar. Claim 13 recites the limitation "the results" in line 5. There is insufficient antecedent basis for this limitation in the claim. Claim 14 recites the limitation "the results of the execution" in line 5. There is insufficient antecedent basis for this limitation in the claim. Claims 2, 4-9, and 12 depend from claims rejected under 35 U.S.C. § 112 and are seen to contain the same deficiencies as the claims from which they depend. Allowable Subject Matter Claims 1-14 would be allowed if rewritten to address rejections under 35 U.S.C. § 112. Claim 1 includes the limitations of an information processing system comprising: a channel level (CL) burst circuit configured to: control a read or write operation between a channel arbiter and a memory controller, generate a plurality of CL packets based on a memory packet comprising memory control information received from the channel arbiter and operand attribute (O/A) information stored in the CL burst circuit, and transmit the plurality of CL packets to the plurality of memory controllers included in a plurality of channels, respectively, wherein the memory controller performs a task in response to receiving a related CL packet, among the plurality of CL packets, and a response packet of a CL packet that is not a start packet is invalidated by a memory interface and is not transmitted to a host. Reference Kim et al (U.S. Patent Pub. No. 2025/0117323, filed prior to the effective filing date of the instant application) discloses a memory system including per-channel flash controllers which utilize packets. Reference Somanache et al (U.S. Patent Pub. No. 2013/0019053) discloses multiple flash controllers with separate lanes connected to an arbiter. However, neither reference sufficiently teaches or makes obvious the entirety of the claimed limitations, particularly generating a plurality of CL packets based on information from a CL burst circuit and a packet containing information from a channel arbiter and transmitting the packets to a plurality of memory controllers. Therefore, no prior art was found to sufficiently teach the entirety of the limitations as claimed. As such, the claim would be allowable if other rejections are addressed. Claims 2-14 would then be allowable by virtue of dependence on claim 1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAKARIA MOHAMMED BELKHAYAT whose telephone number is (571)270-0472. The examiner can normally be reached Monday thru Thursday 7:30AM-5:30PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571)272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ZAKARIA MOHAMMED BELKHAYAT/Examiner, Art Unit 2139 /REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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Prosecution Timeline

Jun 13, 2025
Application Filed
Oct 09, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+27.8%)
2y 1m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 27 resolved cases by this examiner. Grant probability derived from career allowance rate.

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