Prosecution Insights
Last updated: August 17, 2026
Application No. 19/238,783

Reducing Target Frequency Variation In Oscillator

Non-Final OA §102
Filed
Jun 16, 2025
Priority
Oct 24, 2022 — provisional 63/418,677 +1 more
Examiner
CHANG, JOSEPH
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1062 granted / 1183 resolved
+21.8% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
21 currently pending
Career history
1199
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
33.4%
-6.6% vs TC avg
§102
37.0%
-3.0% vs TC avg
§112
14.7%
-25.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1183 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The annotated version of FIG 1 of this application shows the item-to-item matching for claimed languages. PNG media_image1.png 534 776 media_image1.png Greyscale Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang (US 2014/0320216). The annotated version of FIG 2 of Wang shows one-to-one claimed language matching. PNG media_image2.png 398 534 media_image2.png Greyscale Regarding claim 1, Wang discloses a system (FIG 2), comprising: a first circuit (22, 24, transistor and resistor as shown in the annotated figure above) capable of generating a first voltage (at 31), wherein the first circuit includes an impedance (resistor with 22), and wherein the first voltage includes a first deviation caused by variation (22) of the impedance; a second circuit (25, transistor and resistor as shown in the annotated figure above) capable of generating a second voltage (at 32) that includes a second deviation corresponding to the first deviation of the first voltage (voltages at 31 and 32 change due to I1 and I2); a third circuit (26) capable of generating a third voltage (output of 26) based on a difference between the first voltage (31 or + input of 26) and the second voltage (32 or - input of 26); and a fourth circuit (27) capable of generating an output signal (output of 27 and its feedback signal to 22 via 28) having a frequency based on the third voltage. Regarding claim 15, FIG 2 of Wang shows the system further comprising a filter (23) coupled in between the first circuit and the third circuit. Allowable Subject Matter Claims 16-20 are allowed. Claims 2-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: none of the cited references discloses nor suggests the claimed invention including “a first resistor coupled in parallel with a combination of the second switch, the capacitor, and the first switch” as set forth in claims 2-20. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. CN1141572240A discloses a system (FIG 1-4), comprising: a first circuit (3, 4) capable of generating a first voltage (at node between 3 and 4), wherein the first circuit includes an impedance (R3 with 4), and wherein the first voltage includes a first deviation caused by variation of the impedance (switched capacitor with R3 shown in FIG 4); a second circuit (1 and 2) capable of generating a second voltage (voltage divider at the node between 1 and 2) that includes a second deviation corresponding to the first deviation of the first voltage (broadly interpretation in possibility that the first deviation of the first voltage cause to change the VDD 7 in some degree due to the voltage variation); a third circuit (5) capable of generating a third voltage (VCTRL) based on a difference between the first voltage (- input) and the second voltage (+ input); and a fourth circuit (5) capable of generating an output signal (9) having a frequency based on the third voltage (VCTRL). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joseph Chang whose telephone number is (571)272-1759. The examiner can normally be reached M-F 7:00- 17:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah M Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH CHANG/Primary Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Jun 16, 2025
Application Filed
Aug 04, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12700854
CLOCK GENERATOR AND METHOD OF CLOCK GENERATION
1y 11m to grant Granted Aug 04, 2026
Patent 12695330
Wireless Power Transmitter Increasing Uniformity of Electromagnetic Field Distribution
1y 7m to grant Granted Jul 28, 2026
Patent 12689379
Compensation Technique for the Nonlinear Behavior of Digitally-Controlled Oscillator (DCO) Gain
2y 2m to grant Granted Jul 21, 2026
Patent 12689382
INJECTION LOCKING OSCILLATOR WITH PHASE ROTATION CAPABILITY
2y 1m to grant Granted Jul 21, 2026
Patent 12683551
INJECTION-LOCKED OSCILLATOR
1y 7m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
94%
With Interview (+3.9%)
1y 11m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1183 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month