DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11790684. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims correspond as follows:
Application 19/238,983
U.S. Patent 11790684
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12347224. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims correspond as follows:
Application 19/238,983
U.S. Patent 12347224
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6, 12, 13 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2016/0232395) in view of Hansen (US 2020/0134279).
In regard to claims 1 and 12, Han et al. teach a system for biometric sensing, comprising: a sensor comprising a pixel matrix having two or more pixel arrays as separate segments logically divided in the pixel matrix (fig. 3 elements FS1, FS2 and FS3); a plurality of circuits coupled to the sensor, wherein each circuit is configured to capture image data of a biometric pattern of an object measured by at least one pixel array (FT_IC1-FT_IC3 and paragraph 71), and each pixel array is configured to be independently driven and scanned by one or more of the plurality of the circuits (paragraph 52) but does not teach a plurality of application-specific circuits (ASICs) coupled to the sensor; microcontroller unit (MCU) coupled to the plurality of ASICs and comprising one or more processor and at least one tangible, non-transitory machine readable medium encoded with one or more programs configured to process the image data and/or control operation of the system.
Hansen teaches a plurality of application-specific circuits (ASICs) coupled to the sensor (elements 22 and 23); microcontroller unit (MCU) coupled to the plurality of ASICs and comprising one or more processor and at least one tangible, non-transitory machine readable medium encoded with one or more programs configured to process the image data and/or control operation of the system (element 26 and paragraph 49).
The two are analogous art because they both deal with the same field of invention of input devices.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al. with the multiple ASICs of Hansen. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al. with with the multiple ASICs of Hansen because using multiple ASICs would reduce processing time and save power.
In regard to claim 2, Han et al. teach wherein the pixel matrix comprises from 2 to about 12 pixel arrays (fig. 3, 3 arrays. See also fig. 2 of Shahparnia et al. which defines each crossing point of the electrodes as a pixel).
In regard to claim 3, Han et al. teach wherein the plurality of ASICs and the sensor are disposed together within a biometric sensing device (fig. 3).
In regard to claim 4, Han et al. teach a plurality of supporting circuits, wherein each pixel array is connected with at least one supporting circuit (FPC fig. 3).
In regard to claim 5, Han et al. teach wherein each pixel array is configured to be independently driven and scanned by one or more of the plurality of the circuits (paragraph 71) but does not teach a plurality of switches and driving and scanning through one or more switches.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al. and Hansen with switches. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al. and Hansen with switches because the use of switches in scanning fingerprint sensors is old and well-known. One of ordinary skill in the art would recognize the use of switches would allow for individual sensing of each fingerprint pixel and would provide greater accuracy.
In regard to claim 6, Han et al. teach wherein each pixel array comprises a plurality of pixels arranged in a plurality of rows and a plurality of columns (fig. 3).
In regard to claim 13, Han et al. teach wherein the sensor is a fingerprint sensor, the object is a finger, and the biometric pattern is a fingerprint (paragraph 3).
In regard to claim 19, Hansen teaches a microcontroller unit (MCU) coupled to the plurality of ASICs (fig. 2) and comprising one or more processor and at least one tangible, non-transitory machine readable medium encoded with one or more programs configured to process the image data and/or control operation of the system (paragraph 49).
Claim(s) 7-10, 14 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. in view of Hansen further considered with Dinh (US 2006/0217915),
In regard to claim 7, Han et al. and Hansen teach all the elements of claim 7 except wherein each pixel array comprises thermal sensing pixels and is configured to operate based on the active thermal sensing principle, in which a power heat pulse is applied to each pixel array and a response corresponding to a biometric pattern is measured.
Dinh teaches wherein each pixel array comprises thermal sensing pixels and is configured to operate based on the active thermal sensing principle, in which a power heat pulse is applied to each pixel array and a response corresponding to a biometric pattern is measured (paragraph 34).
The three are analogous art because they all deal with the same field of invention of input devices.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al. and Hansen with the thermal sensing of Dinh. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al. and Hansen with the thermal sensing of Dinh because the sensor of Dinh can be made compact and flexible with simple and cheap production.
In regard to claim 8, Dinh teaches wherein a pixel in each pixel array comprises one or more diodes connected in series between a pixel row line and a pixel column line (fig. 1).
In regard to claims 9 and 15, Han et al. teach a capacitive sensing grid comprising capacitive sensing nodes distributed in each pixel array (fig. 3 and paragraph 14. See also fig. 7 of Dinh which teaches using both thermal and capacitive sensing).
In regard to claim 10, Han et al. teach an auxiliary circuit in a respective ASIC or in the MCU or outside the respective ASIC or the MCU as an independent integrated circuit, wherein the capacitive sensing grid is connected with the auxiliary circuit (FPC in fig. 3).
In regard to claim 14, Dinh teaches wherein each pixel array comprises a plurality of pixels arranged in a plurality of rows and a plurality of columns, and the plurality of pixels comprise thermal sensing pixels (fig. 6).
In regard to claims 16, Han et al. teach wherein the capacitive sensing nodes are mutual capacitance sensing nodes or self-capacitance sensing nodes (paragraph 75).
Claim(s) 11 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. in view of Hansen further considered with Shahparnia et al. (US 2016/0162102).
In regard to claim 11, Han et al. and Hansen teach all the elements of claim 11 except wherein through the MCU, the system is configured to perform steps comprising: detecting a presence of an object having a biometric pattern on the sensor; performing a coarse scan by scanning a fraction of pixels in a pixel array to determine a contact boundary between the object and the sensor; and performing a detailed scan selectively within the contact boundary to provide the image data of the biometric pattern.
Shahparnia et al. teach detecting a presence of an object having a biometric pattern on the sensor (paragraph 71 and fig. 7); performing a coarse scan by scanning a fraction of pixels in a pixel array to determine a contact boundary between the object and the sensor (paragraph 74, determine touch position); and performing a detailed scan selectively within the contact boundary to provide the image data of the biometric pattern (paragraph 79).
The three are analogous art because they all deal with the same field of invention of input devices.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al. and Hansen with the coarse and fine scanning of Shahparnia et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al. and Hansen with the coarse and fine scanning of Shahparnia et al. because it would reduce power consumption.
In regard to claim 20, Han et al. teach a method of using a device or a system comprising a sensor comprising a pixel matrix having two or more pixel arrays as separate segments logically divided in the pixel matrix (fig. 3) but does not teach detecting a presence of an object having a biometric pattern on the sensor; performing a coarse scan by scanning a fraction of pixels in a pixel array to determine a contact boundary between the object and the sensor; and performing a detailed scan selectively within the contact boundary to provide image data of the biometric pattern.
Shahparnia et al. teach detecting a presence of an object having a biometric pattern on the sensor (paragraph 71); performing a coarse scan by scanning a fraction of pixels in a pixel array to determine a contact boundary between the object and the sensor (paragraph 74); and performing a detailed scan selectively within the contact boundary to provide image data of the biometric pattern (paragraph 79).
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. in view of Hansen further considered with Dinh and Liu et al. (US 2021/0365169).
In regard to claims 17, Han et al., Hansen and Dinh teach all the elements of claim 17 except wherein the self-capacitance sensing nodes are passive-matrix addressed, or active-matrix addressed by an array of thin film transistors; and the mutual capacitance sensing nodes are configured to be passive-matrix addressed.
Liu et al. teach wherein the self-capacitance sensing nodes are passive-matrix addressed, or active-matrix addressed by an array of thin film transistors (fig. 6 and paragraph 56).
The four are analogous art because they all deal with the same field of invention of input devices.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al., Hansen and Dinh with the active matrix of Liu et al. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al., Hansen and Dinh with the active matrix of Liu et al. because the active matrix would improve detection accuracy and speed.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. in view of Hansen further considered with Dinh and Cok (US 2017/0010706).
In regard to claim 18, Han et al., Hansen and Dinh teach all the elements of claim 18 except wherein the mutual capacitance sensing nodes are configured to be passive-matrix addressed.
Cok teaches wherein the mutual capacitance sensing nodes are configured to be passive-matrix addressed (paragraph 6, control scheme similar to passive-matrix control used for small displays).
The four are analogous art because they all deal with the same field of invention of input devices.
Before the effective filing date it would have been obvious to one of ordinary skill in the art to provide the apparatus of Han et al., Hansen and Dinh with the passive matrix of Cok. The rationale is as follows: Before the effective filing date it would have been obvious to provide the apparatus of Han et al., Hansen and Dinh with the passive matrix of Cok because the passive matrix addressing would reduce circuit complexity.
Conclusion
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/JOSEPH R HALEY/Primary Examiner, Art Unit 2623
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