DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on 06/17/25 has been considered by the examiner.
Priority
3. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
4. The disclosure is objected to because of the following informalities: on the first line of paragraph [0002], “Electronic” should be changed to --An electronic--. On the second line of paragraph [0005], “a RC delay circuit” should be changed to --an RC delay circuit--. On line 7 of paragraph [0005], the word “generate” should be changed to --output--, and on line 8 of this paragraph, the word “by” should be changed to --in--. On line 15 of paragraph [0005], the word --is-- should be inserted after “capacitor”. On the first line of paragraph [0014], the word “aspect” should be changed to --object--. On line 3 of paragraph [0014], “a RC” should be changed to --an RC --, and note that the same change should also be made on the penultimate line of paragraph [0015]. On line 3 of paragraph [0016], --a-- should be inserted after the word “performs”. On the second line of paragraph [0017], the word “generate” should be changed to --output--. On the second line of paragraph [0018], the word “from” should be changed to --at--, and note that the same change should also be made on the second line of paragraph [0019]. On the second line of paragraph [0025], the word “generate” should be changed to
--output--. On line 3 of paragraph [0032], --a-- should be inserted after the word “performs”. On line 4 of paragraph [0035], the word “generate” should be changed to
--output--. On the first line of paragraph [0038], the word “maintains” should be changed to --is maintained--. On the penultimate line of paragraph [0039], the word “by” should be changed to --in--, and note that the same change should also be made in paragraph [0040], lines 1 and 3, and also on the first line of paragraph [0042]. On the second line of paragraph [0044], the word “through” should be changed to --at--, and on the third line of this paragraph, the word “generate” should be changed to --output--. On the penultimate line of paragraph [0044], the word “from” should be changed to --at--. On line 3 of paragraph [0046], the word “receives” should be changed to --receive--, and note that the same change should also be made on the third line of paragraph [0048]. On line 5 of paragraph [0049], the word “discharge” should be changed to
--discharges--. On the third line of paragraph [0054], the word --are-- should be inserted before “equal”, and on the penultimate line of this paragraph, the word “of” should be deleted. On line 3 of paragraph [0059], the word --are-- should be inserted at the beginning of the line. On the second line of paragraph [0062], the word “by” should be changed to --in--. On line 5 of paragraph [0062], “14” should be changed to --140--. On the first line of paragraph [0064], the word “by” should be changed to --in--. On the second line of paragraph [0066], the word “from” should be changed to --at--, and note that the same change should also be made on the last line of this paragraph. On line 3 of paragraph [0066], the word “generate” should be changed to --output--. On line 5 of paragraph [0071], the word “discharge” should be changed to --discharges--. On line 3 of paragraph [0074], the word “of” should be deleted. On line 4 of paragraph [0076], the word “by” should be changed to --in--. On lines 3 and 4 of paragraph [0078], the word
--are-- should be inserted before “equal”. On the last line of paragraph [0080], the word “biased” should be changed to --bias--. On the penultimate line of paragraph [0081], the word “by” should be changed to --in--, and note that the same change should also be made on the second line of paragraph [0083]. On the first line of paragraph [0084] “Under” should be changed to --under--. On the first line of paragraph [0085], the word
--is-- should be inserted after “MNC”, and on line 3 of this paragraph, the word “by” should be changed to --as--. On line 8 of paragraph [0086] the Chinese characters at the beginning of the line should be deleted. On the first line of paragraph [0087], “an example” should be changed to --examples--, and on line 3 of this paragraph, the comma after “departing” should be deleted. On line 3 of paragraph [0088], the first occurrence of “a” should be changed to --an--.
Appropriate correction is required.
Claim Objections
5. Claims 1, 2, 4, 5, 7 and 9 are objected to because of the following informalities:
On line 4 of claim 1, the word --level-- should be inserted after “state”.
On line 5 of claim 1, the word “generate” should be changed to --output--.
On line 7 of claim 1, “comprised by” should be changed to --included in--.
On line 9 of claim 1, “a” at the beginning of the line should be changed to --an--.
On line 10 of claim 1, the word “from” should be changed to --at--.
On line 13 of claim 1, the word “and” should be changed to --wherein--.
On line 6 of claim 2, the word “receives” should be changed to --receive--.
On line 7 of claim 2, the word “through” should be changed to --at--.
On line 8 of claim 2, the word “generate” should be changed to --output--.
On line 4 of claim 4, “comprised by” should be changed to -- included in--.
On line 5 of claim 4, the word “comprises” should be deleted.
On line 7 of claim 5, the word “through” should be changed to --at--.
On line 3 of claim 7, the word “biased” should be changed to --bias--.
On line 4 of claim 8, the first occurrence of “a” should be changed to --an--.
On line 6 of claim 9, the word “biased” should again be changed to --bias--, and also on this line, the word “being” should be deleted.
On line 7 of claim 9, “comprised by” should be changed to --included in--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-6 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al (USP 7,286,022) in view of any one of Someshwar (USP 4,370,625), Tang (USPAP2019/0238121) and Lai et al (USPAP 2025/0337396).
As to claim 1, Park et al discloses, in figure 1,
an oscillating circuit having a temperature compensation mechanism (the temperature compensation mechanism in Park et al’s figure 1 is provided by the positive temperature coefficient resistive characteristic of resistor 150 and the negative temperature coefficient resistive characteristic of the inherent or obvious transistors within inverter 170, similar to applicant’s temperature compensation mechanism provided by the positive temperature coefficient resistive characteristic of resistor RO and the negative temperature coefficient resistive characteristic of the transistors within inverter 120), comprising:
a NAND gate (NAND gate 160) configured to receive an input signal (the input signal received from inverter 180) and a delayed control signal (the delayed control signal output from inverter 130) to generate an output oscillating signal (the claimed output oscillating signal is the output signal of NAND gate 160), wherein the input signal transits from a low state level to maintaining a high state level to initialize an oscillating behavior (note that the output signal of inverter 180 transits from a logic zero state to a logic one state which is “maintained” for a predetermined amount of time, and such transiting initializes the oscillating behavior of the Park et al oscillating circuit);
a first inverter (inverter 170) configured to receive and invert the output oscillating signal to output an inverted output oscillating signal to a first terminal (terminal NOUT), wherein each of a plurality of first internal elements included in the first inverter has a negative temperature coefficient resistive characteristic (note that the inherent or obvious transistors within inverter 170 have negative temperature coefficient resistive characteristics);
an RC delay circuit (the combination of resistor 150 together with capacitor 140) configured to receive and delay the inverted output oscillating signal from the first terminal to generate a delayed and inverted control signal at a second terminal (terminal N_C2), the RC delay circuit comprising:
an oscillating resistor (resistor 150) electrically coupled between the first terminal and the second terminal, wherein the oscillating resistor has a positive temperature coefficient resistive characteristic; and
an oscillating capacitor (capacitor 140) electrically coupled between the second terminal and a ground terminal (note that the top terminal of capacitor 140 is coupled to ground, i.e., indirectly coupled thereto via transistor 105);
a second inverter (inverter 130) configured to receive and invert the delayed and inverted control signal to generate the delayed control signal; and
a third inverter configured to receive and invert the output oscillating signal to generate a final output oscillating signal (although Park et al does not disclose a third inverter which receives output clock FOUT shown in figure 1 of Park et al, such would have been obvious to one of ordinary skill in the art, the reason being that it was old and well-known in the art before the effective filing date of applicant’s invention to buffer the output clock of a ring oscillator (note figure 2A of Lai et al where such a buffer is used to produce the final output of ring oscillator 200, note that such a buffer obviously comprises a pair of serially connected inverters), and it was also old and well-known in the art before the effective filing date of applicant’s invention to use one or more additional inverters coupled to the output of a ring oscillator for the purpose of generating complementary output clocks, see figure 1 of Someshwar and figure 1 of Tang as two examples of this well-known concept);
wherein the negative temperature coefficient resistive characteristic of the first internal elements and the positive temperature coefficient resistive characteristic of the oscillating resistor together determine a total circuit temperature coefficient characteristic (as noted above, the internal elements of inverter 170 inherently have a negative temperature coefficient resistive characteristic and the resistor 150 has a positive temperature coefficient resistive characteristic, and these two opposite temperature coefficient resistive characteristics will together determine a total circuit temperature coefficient characteristic of the Park et al figure 1 oscillating circuit).
As to claim 2, note that inverter 170 can obviously comprise a PMOS transistor and an NMOS transistor as recited therein, and the remaining limitations set forth in this claim will all be inherent during the operation of the Park et al figure 1 oscillator circuitry.
As to claim 3, note that the time constant of Park et al’s RC delay circuit and inverter 170 will be as recited on line 8 of this claim and no further that the oscillating time. Of the RC delay circuit and inverter 170 will be as recited on the last line of this claim.
As to claim 4, although Park et al does not disclose the claimed compensation capacitor between the output of inverter 130 and ground, such would have been obvious to one of ordinary skill in the art, the reason being that it was old and well-known in the art before the effective filing date of applicant’s invention to couples such a compensation capacitor between the output of an inverter and ground in a ring oscillator, one example of this well-known concept being disclosed by Takahashi et al (USP 6,856,566), note the use of capacitors C1 through C3 in figure 4 of this reference where Takahashi et al teaches that such compensation capacitors can be used to vary the time recycle of the ring oscillator, and one of ordinary skill in the art would have easily recognized that such a compensation capacitor or capacitors could be used in the Park et al figure 1 oscillator circuit for varying the time recycle thereof, thereby providing motivation for including such a compensation capacitor or capacitors in Park et al’s figure 1 (note that the remaining limitations in claim 4 will all be inherent when such a compensation capacitor or capacitors are added to the Park et al figure 1 circuitry).
As to claim 5, note that inverter 130 shown in Park et al’s figure 1 oscillating circuit can obviously comprise a PMOS transistor and an NMOS transistor as recited therein, and the remaining limitations set forth in this claim will all be inherent during the operation of the Park et al figure 1 oscillator circuitry.
As to claim 6, this claim is rejected using the same analysis as set forth above in the rejection of claim 3.
As to claim 10, note that the total circuit temperature coefficient characteristic in Park et al’s figure 1 oscillator circuit will inherently control the final output oscillating signal to have a zero temperature coefficient, similar to the final output oscillating signal having a zero temperature coefficient in applicant’s invention.
Allowable Subject Matter
7. Claims 7-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: none of the prior art of record discloses or suggests the claimed compensation transistor recited in claims 7 and 9, and claim 8 is allowable in view of its dependency on allowable claim 7.
Prior Art Not Relied Upon
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yoshizawa et al and Higuchi et al show additional examples of an RC ring oscillator including a NAND gate.
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH B WELLS whose telephone number is (571)272-1757. The examiner can normally be reached Monday-Friday, 8:30am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGIS J BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KENNETH B WELLS/Primary Examiner, Art Unit 2836 July 24, 2026