DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 20 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Namuduri et al. (US 2024/0339990, hereinafter “Namuduri”)
Namuduri discloses a method of pre-charging a battery system (via 128; see [0004]), comprising:
driving a switching device (112) for selectively coupling (see [0041]) a high voltage battery (24) to a load capacitor (C within 26);
sensing current flowing through the switching device during a pre-charge operation (via 120 and the linear op-amp within 128; see [0062]);
regulating the pre-charge current to a predetermined value (according to the milliamp current reference within 128; see [0062]);
identifying when the pre-charge operation is complete based on the sensed current or voltage across the load capacitor (when the load capacitor is within a few percent of Vs; see [0062]); and
detecting one or more fault conditions including at least one of gate open or short, desaturation of the switching device, undervoltage lockout, overcurrent, or thermal shutdown, and to provide a fault indication output (see [0067], where the controller 320 detects a high current event and alerts the master controller).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 5-10, and 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Namuduri in view of Hussain et al. (US 2011/0025277, hereinafter “Hussain”).
Claim 1: Namuduri discloses a circuit (128, Fig.2) for pre-charging a battery system, comprising:
an isolated gate driver (328, Figs.3A,3B, isolated via 334) configured to drive a switching device (112) for selectively coupling a high voltage battery (24; see [0041]) to a load capacitor (C, within 26; see [0058]);
an integrated isolated current sense amplifier (“linear op-amp circuit” described in [0062], which compares a milliamp reference current with the current sensor measurement) coupled to the switching device (within 110 and controlling the activation of the switching device, thus coupled to it; see [0062]) and configured to sense current flowing through the switching device during a pre-charge operation (see [0062]);
a current limit circuit (the milliamp current reference described in [0062]) coupled to the current sense amplifier (to the linear op-amp circuit; see [0062]) and configured to regulate the pre-charge current to a predetermined value (by providing the reference current to the op-amp, which regulates the current limit during the pre-charge operation; see [0062]);
a charge completion detection circuit configured to identify when the pre-charge operation is complete based on the sensed current or voltage across the load capacitor (see [0062], where a circuit also determines when pre-charge is complete when “Vcap is within several percent of Vs); and
a fault detection circuit (see [0038]) configured to detect one or more fault conditions including at least one of gate open or short, desaturation of the switching device, undervoltage lockout, overcurrent (overcurrent event; see [0038]), or thermal shutdown, and to provide a fault indication output (see [0067], where the controller 320 detects a high current event and alerts the master controller).
Claim 19: Namuduri discloses an apparatus for pre-charging a battery system (128, Fig.2), comprising:
means for driving a switching device for selectively coupling a high voltage battery to a load capacitor (corresponding to the isolated driver within IC 102 in the instant application; see 328, Figs.3A,3B, isolated via 334 of Namuduri and discussion above);
means for sensing current flowing through the switching device during a pre-charge operation (corresponding to the current sense amplifier within IC 102 of the instant application; see the milliamp current reference described in [0062] of Namuduri);
means for regulating the pre-charge current to a predetermined value (corresponding to the programmable current limit circuit within IC 102 of the instant application; see the milliamp current reference described in [0062] of Namuduri and discussion above);
means for identifying when the pre-charge operation is complete based on the sensed current or voltage across the load capacitor (corresponding to the charge completion detection circuit within the IC 102 of the instant application; see [0062] of Namuduri, where a circuit also determines when pre-charge is complete when “Vcap is within several percent of Vs); and
means for detecting one or more fault conditions including at least one of gate open or short, desaturation of the switching device, undervoltage lockout, overcurrent, or thermal shutdown, and to provide a fault indication output (corresponding to the fault detection circuit within IC 102 of the instant application; see [0067] of Namuduri, where the controller 320 detects a high current event and alerts the master controller).
First, Namuduri does not explicitly disclose that the circuit 110 is “integrated” as required by claims 1 and 19 (due to the interpretation under 35 U.S.C. 112(f)). Second, while Namuduri discloses receiving various threshold settings from a master controller in [0067], Namuduri does not explicitly disclose that among those settings is a setting for the pre-charge current limit circuit, thus does not disclose the pre-charge current limit circuit as “programmable”, as required by claims 1 and 19 (due to the interpretation under 35 U.S.C. 112(f)).
Regarding the first difference, the examiner Namuduri does broadly disclose integrating a circuit in [0034], which discusses providing components on an ASIC and [0065], which discloses the microcontroller as a system on a chip. Further, it is the opinion that Namuduri at least implies that the circuit element 128 is an integrated circuit via the use of a block diagram for 128 and the discussion of ASICs in [0035]. One of ordinary skill in the art would have recognized the intrinsic benefit of providing a circuit as an integrated circuit as opposed to discrete elements as providing a reduction of manufacturing cost, reduced size, and ease of manufacture. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided the element 110 of Namuduri within the form of an integrated circuit, as is implied, in order to have provided the benefit(s) of a reduction of manufacturing cost, reduction of size, and/or ease of manufacture.
Regarding the second difference, Hussain discloses in a similar pre-charge application that a pre-charge current amount (determined by 421) may be programmable by a user via data received from a digital controller (480; see [0060]). Hussain discloses that by providing a programmable pre-charge current, the flexibility of a charging device or different types of systems may be increased (see [0005]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided the millimeter current reference corresponding to the pre-charge current limit circuit as programmable, as Hussain discloses a programmable pre-charge current, in order to improve the flexibility of the pre-charge device of Namuduri for different systems.
Claim 5: Namuduri discloses wherein the integrated isolated current sense amplifier is further configured to provide feedback for closed-loop current regulation during the pre-charge operation (see [0062]: “In an embodiment, the gate driver 328 may include a linear op-amp circuit to provide a linear mode gate control signal by comparing a milliamp level reference current to a milliamp level current sensor signal from a low-range current sensor in series with the current sensor 120 or from a dual-range current sensor 120 with appropriate gain thereby controlling the switch module 112 in its linear region to a setpoint corresponding to the milliamp level reference.”).
Claim 6: the combination discloses wherein the programmable current limit circuit includes a user-programmable input for setting the pre-charge current limit (in the combination of Namuduri and Hussain, a user would program the current limit of Namuduri via values provided in the master controller, corresponding to 460 of Hussain, for setting the pre-charge current limit).
Claim 7: the combination discloses wherein the programmable current limit circuit is further configured to adjust the pre-charge current to accommodate a different battery system voltage or load capacitance (see [0062] of Namuduri, which discloses the determined pre-charge current being a function of the DC voltage source, i.e. 400 volts, and [0005] of Hussain, which discloses providing programmable charging currents to accommodate different batteries).
Claim 8: Namuduri discloses wherein the charge completion detection circuit is further configured to detect completion of the pre-charge operation based on the current sensed by the current sense amplifier falling below a predetermined threshold (see [0064], where in some embodiments, termination may be triggered by current threshold comparisons to the current sensor output).
Claim 9: Namuduri discloses wherein the charge completion detection circuit is further configured to detect completion of the pre-charge operation based on the voltage across the load capacitor reaching a predetermined value (see [0064], where in some embodiments, termination may be triggered by voltage comparisons of the DC link capacitor to Vs).
Claim 10: Namuduri discloses wherein the charge completion detection circuit includes an internal detection circuit or external detection circuit for charge completion detection (within 128, thus an “internal detection circuit” and/or including 120, thus also an “external detection circuit”).
Claim 16: Namuduri does not explicitly disclose that the IC is associated with ASIL B. However, Namuduri does disclose the circuit used within the context of an automobile (see Fig.1). As ASIL is a well-known risk classification scheme for road vehicles in the art, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided an IC associated with ASIL B in order to have met safety standards required by the automotive industry.
Claim 17: Namuduri discloses wherein the integrated circuit is configured for use in an electric vehicle or hybrid electric vehicle high voltage battery system (see [0040]).
Claim 18: Namuduri discloses an isolated communication interface (326, Fig.3B) configured to transmit fault or status information to an external microcontroller (see [0055] and [0067]).
Claims 2-4, 11-13, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Namuduri in view of Hussain as applied to claim 1 above, and further in view of ST (“STGAP4S Datasheet”, hereinafter “ST”).
Namuduri discloses the limitations of claim 1, as discussed above, but does not disclose the specifics of the gate driver circuit 328. Therefore, Namuduri does not disclose each of the limitations of claims 2-4. Namuduri further does not disclose the dedicated fault indicator pin (claim 11), that the fault detection circuit is further configured to detect, an undervoltage lockout (claim 13), or a thermal shutdown condition (claim 15).
Claim 2: ST discloses that in a similar isolated gate driver circuit, the gate driver is capable to provide a peak source or sink current of at least 2A to the switching device (see pg.1, “Features”, OUT1 and OUT2). It has previously been held that “"[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). See MPEP 2144.05.II.A. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have provided an isolated gate driver circuit capable of providing a peak source or sink current of at least 2A as the mere discovery of optimum or workable ranges by routine experimentation.
Claim 3: ST discloses wherein the isolated gate driver is further configured to operate at a switching frequency up to 80 kHz (see pg.8, fSW), but not up to 400 kHz. However, it has previously been held that “"[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). See MPEP 2144.05.II.A. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have provided an isolated gate driver circuit capable of a switching frequency up to 300 kHz as the mere discovery of optimum or workable ranges by routine experimentation.
Claim 4: ST discloses wherein the isolated gate driver is implemented in a wide body integrated circuit package (see pg.1, integrated circuit package on the top left) capable of withstanding an isolation voltage value for a defined period (see pg.1, description of ST, and [0054] of Namuduri, each of which disclose isolated gate drivers, thus having a package capable of withstanding an arbitrary isolation voltage for any arbitrary defined period as a function of being isolated between high and low voltage regions). It has previously been held that mere changes in shape that are matters of design choice support a prima facie case of obviousness (see MPEP 2144.04.IV.B). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided the wide body integrated circuit package of ST as the gate driver and associated integrated circuitry of Namuduri as a mere change in shape as a matter of design choice.
Claim 11: ST discloses wherein the fault detection circuit is further configured to provide a dedicated fault indicator output pin (DIAG1 and DIAG2; see pg.47, section 7.14). As the device would be functionally equivalent whether shared pins are used for communicating thresholds and signaling values, as disclosed by Namuduri, or by having a dedicated fault pin, as disclosed by ST, the results of substituting one for the other would have been predictable to one of ordinary skill in the art. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided a dedicated fault pin in place of the shared communication pin of Namuduri as the simple substitution of one known element for another to obtain predictable results.
Claims 12, 13 and 15: ST discloses providing a Miller clamp protection function (pg. 2), an undervoltage lockout detection function for an input supply voltage (see pg.81, Table 75, DIAGxCFGA bit 2) and a thermal shutdown/warning detection function (see pg.81, Table 75, DIAGxCFGA bit 5) in order to design a high reliability system (pg.2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have provided undervoltage lockout detection and thermal shutdown condition detection in order to have provided a high reliability system.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Namuduri in view of Hussain as applied to claim 1 above, and further in view of Gambuzza et al. (US 2024/0364099, hereinafter “Gambuzza”).
Namuduri and Hussain disclose the limitations of claim 1 as discussed above. While Namuduri discloses detecting an overcurrent condition generally (see [0067]), Namuduri does not specifically disclose detecting the overcurrent condition “during the pre-charge operation”, as required by the claim. Gambuzza discloses that an overcurrent condition may also be detected during a pre-charge operation in order to reduce stress or damage to system components (see [0004] and [0028]). Therefore, it would have further been obvious to one of ordinary skill in the art before the effective filing date to have provided the overcurrent detection during pre-charging, e.g. in the PWM pre-charging example, in order to have reduced stressing or damaging components and interconnects.
Conclusion
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/RYAN JOHNSON/Primary Examiner, Art Unit 2836
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